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Embedded Technology
Mobile application reference design
accelerates development
Market requirements for consumer product categories such as smart phones,
portable media devices and personal navigators demand increasing battery
lives, shrinking product packages, and decreasing price points. Embedded
designers need to seek innovative approaches to meet these requirements. One
approach is to move away from discrete solutions to integrated system-on-a
chip (SoC). An integrated SoC for portable devices explored in this article include
a power management subsystem and an audio controller. Technical details on
the integrated design approach for power management and audio controller
functions are described.
By Ron Stieger and David Brooke
E
Inefficiencies of discrete
components
Up until now, the discrete approach to
managing system functions has been more
than adequate. In fact, in some ways, it was the
most efficient approach to the task at hand. One
example of this is in power management. Even
as devices began to require more sophisticated
power management, developers were able to
go to market quickly using a variety of off-theshelf components, likely using components
from different vendors in the same device.
Frequently, power subsystems of even highly
complex circuits were made up of just a couple
of power supplies and a few discrete components, such as LDOs and buck converters.
Such an approach is no longer adequate,
however. Today’s processors feature advanced
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mbedded designers need to seek innovative approaches to meeting the stringent
requirements of emerging consumer products.
One approach is to move away from discrete
solutions to integrated system-on-a-chip
(SoC). When it comes to managing the power,
audio, or other needs of a mobile device, an
all-in-one SoC is a definitive example of how
an integrated solution can offer more benefits
than the sum of its individual parts. Integrated
solutions also speed time to market.
It is possible for designers to use leadingedge SoC chips that offer integrated solutions
for subsystems that were previously only available with discrete designs. Two key integrated
subsystems for portable devices are presented
in relation to a hardware development platform
for developers and manufacturers of smart
phones, PDAs, GPS systems and other portable applications running Windows CE 5.0 or
Windows CE 6.0 on custom embedded devices
using the Monahans applications processor.
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Figure 1. A typical power management IC.
power management capabilities. A discrete
approach is inefficient to reap all of the gains
possible from modern applications processors,
such as the Intel Monahans platform, thus,
wasting battery life and resulting in devices
that are larger than they really need to be.
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At a minimum, a typical handheld device requires several power domains. The
main applications processor needs at least
two power domains to cover a low-voltage
core and high-voltage I/O pins. Additional
domains are required to support the device’s
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memory, display, memory expansion slots,
and other features, such as audio functionality or sensors.
A designer could try to combine domains,
using one set of discrete parts to handle the
power needs for several unrelated functions
of the device. This reduces system complexity, but is inefficient as the different functions
have their own power needs and, therefore,
may not be able to operate as efficiently as
possible. Each domain would have to supply
enough power for the most demanding function attached to it. Power may be wasted on
functions that don’t need quite as much. Also,
you would lose the ability to serve those connected functions independently. They must be
controlled as a group.
This approach involves managing trade offs.
It requires the designer to understand how the
device will be used and its resulting power
needs, and to maximize power savings using as
few discrete components as possible. An effective design may be able to capture the majority
of the power savings capable within the device.
Consider, however, that even an extra 5% or
10% of power savings could potentially result
in several additional hours of battery life.
Another approach would be to separate as
many of the power domains as possible, serving them with their own smart controller and
related discrete voltage regulators to ensure
that each function gets only the power it needs
and can be controlled independently. While
this approach will maximize power savings,
it fails in several other ways.
First, it’s highly complicated. Each set of
discrete components adds a layer of complexity. It takes a tremendous amount of engineering time to choose all the components needed,
and to develop the best process for connecting
them. Also, as the number of components
grows, so, too, does the number of potential
problems. The testing process is greatly extended. With numerous controllers managing
the needs of the device, it takes more time to
track down and trace problems.
Second, it is expensive as each discrete part
has an absolute cost.
Finally, it’s highly inefficient. While this
approach can reap more power savings than a
design that uses far fewer discrete components,
these additional components take up excessive
room within the device. In other words, instead
of wasting power, we waste space.
The delicate balancing act of minimizing
a device’s power needs with as few discrete
components as possible is made even more
challenging with today’s much more efficient
processors. Processors like the Intel Monahans, for example, may have 20 power domains.
This applications processor gives us unprecedented abilities to conserve power, but how
can we take advantage of that functionality
most efficiently?
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Figure 2. A typical mobile handset system.
The integrated solution
Modern processors require a modern power
management solution, and an integrated SoC
(Figure 1) allows us to maximize power savings while minimizing the space used inside
the device. While the integrated chip is larger
than any one of the voltage regulators, it is
smaller than all of the components it replaces.
It is a result of the economies of scale.
With an integrated solution, the voltage
regulator components are combined at the
silicon level. That reduces the need for packaging, resulting in one chip that is denser than
the multiple chips it replaces. Additionally, the
integrated component can share some functionality that would otherwise be duplicated
between the individual voltage regulators,
resulting in further space savings.
By significantly reducing the size of each
of the individual voltage regulators, more
regulators can be included in the device. This
allows us to specifically tune each regulator to
perfectly match the needs of the component it
powers. This ability to highly optimize each
regulator further improves power efficiency
within the end product.
With a greater number of voltage regula-
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tors, we also gain more control over the power
sent to individual components at run-time. If
a particular feature is not in use, it is possible
to reduce or cut power to it.
The ability to manage power needs at such
an intimate level is not unique to an integrated
solution. However, simply adding more voltage regulators and related discrete components
would result in a device that is too large and
too expensive to effectively compete in the
marketplace. It is the size and efficiency of the
integrated approach that makes this high level
of optimization possible. Additional space
savings can be attained by bundling other
components, such as the audio subsystem and
battery charger, on the same integrated chip.
Issues to consider
An integrated power management solution
must be designed to meet the needs of the
applications processor and peripherals it supports (Figure 2). In particular, it must correctly
sequence the individual power supplies. Voltage
domains requiring the highest supplies must be
activated first in order to prevent IC latch up. It
must provide constant power to supplies that
must be “always on” to provide for functions
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such as persistent data storage and sleep capabilities. It also needs to monitor the battery to
ensure the voltage supplied remains in range.
There are a couple of key specifications to
consider. First, consider the quiescent current
of each regulator. While this number may be
small, consider its impact when it is magnified
10 or 20 times by other regulators and functions in the device.
Also, consider the power supply rejection
ratio (PSRR), which measures the level of
disturbance in the power supply after regulation. If the level of disturbance is high, it can
result in unpleasant tones in the audio band
and add modulation on the RF signals, which
can interfere with transmissions and require
expensive filtering.
To achieve high PSRR across a wide frequency band, the LDO error amplifier usually
has its bias current set for the highest output current, which is the worst case operating condition.
As this bias is fixed, and independent of current
demand, this results in the amplifier being overbiased and consuming a higher quiescent current
than required at low current demands. For this
reason, a high-performance LDO design usually
needs to have a low-power sleep mode to reduce
the inefficiency at low current demands.
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Figure 3. Smart Mirror LDO vs. a conventional LDO.
A unique approach to the problem uses a
patented design technique known as the Smart
Mirror LDO regulator, a part with higher
PSRR performance compared to other regulators (Figure 3).
The Smart Mirror regulators mirror the
output current demand back to the bias generator, which allows the bias to be reduced
automatically as demand falls and gives
dynamic quiescent current control. This gives
a regulator with high PSRR and dynamic
performance over a range of operating currents, without being constrained by the usual
design compromise of being overbiased under
all conditions except when under maximum
load. Having an autonomous adaptive bias
control also removes the need for a low-power
operating mode and hence any user intervention to switch to a lower-power mode at low
current demands.
Supplying 10 mA, an LDO using this technique offers typically 99% current efficiency,
consuming less than 20 microamperes. In
addition, power supply rejection is maintained
at higher levels over higher bandwidths—
at 217 Hz, a Smart Mirror regulator offers
more than 80 dB PSRR; at 10 kHz, the PSRR
is still above 60 dB.
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Figure 4. BSQUARE Monahans reference design block diagram.
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other components of
a highly integrated
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power management
IC (PMIC) would typically include high- Figure 5. Windows CE power management architecture.
efficiency buck converters with programmable they can also help speed product development.
output voltages, individually selectable LED Battery life and board size are not issues in the
drivers, programmable battery charger, audio development of a reference platform, but using
drivers, and possibly other functions.
an integrated power management solution can
Buck converters improve the efficiency of still pay sizeable dividends.
the circuit and reduce thermal power dissipaA reference platform is shown in Figure
tion. A dc-dc buck converter with integrated 4. It allows designers to quickly prototype
switches can provide a high current, low-volt- and validate new hardware designs by taking
age supply to the baseband circuit, with syn- advantage of their expansion interfaces:
chronous and asynchronous modes ensuring peripheral expansion bus, cellular expansion
efficiency across a range of current demands. buses for GSM/GPRS and CDMA, SDIO slot
Power efficiencies of more than 90% can be for WLAN 802.11 b/g, a video/camera interachieved compared to approximately 50% for face, a Flash substitution header, and SSP and
an LDO in typical applications. This extends the I2C headers. Plus, it gives the ability to develop
talk and standby time of mobile handsets.
applications and system software (Figure 5)
simultaneously using hardware that is close
Reference platforms
to production level. Using integrated chips
While the primary benefit of using inte- for power and other functions in the reference
grated components is power and space sav- board brings device designers even closer to proings, when paired with a reference platform duction level during the development phase.
Figure 6. The
reference
design offers
a wide open
layout for easy
testing and
debug.
Integrated solutions allow for easier customization, a key benefit for internal platforms
that require flexibility for future designs. It also
provides a tremendous advantage for reference
boards, which could be used to design anything
from a handheld inventory management tool to
a Web-enabled cellular phone.
For example, a display or expansion card
interface may be available with 3.3 V or 1.8 V
interfaces. Instead of specifically building the
power supply circuit to match one state or the
other, the integrated chip allows us to change
voltage in the software. A designer could
change displays or other components without
having to change all of the related power supply
circuitry. This customization makes it much
easier for developers to use a reference board
to test new peripherals or to change peripherals
as a platform design evolves.
This accelerates the time to market since
designers get to develop their devices and
applications using components that are much
closer to what the final production model will
actually include (Figure 6).
The amount of time this saves varies depending on the project, but it allows designers to get
their products to end-users faster and cut development expense. It also allows designers to
respond quicker to changes in the marketplace
and to technology, making them better equipped
to capitalize on new opportunities. RFD
ABOUT THE AUTHORS
Ron Stieger is engineering manager at BSQUARE. His previous experience includes
leading hardware development for highspeed cable testing at Fluke Networks, and
optical and millimeter-wave communications at Terabeam.
David Brooke is marketing manager for
Dialog Semiconductor. He holds a B.Eng in
Electrical and Electronic Engineering from
Bradford University (UK). For the past 16
years, Brooke has been involved in a range
of RF, audio and power products targeted at
mobile radio applications.
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