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ELCN 201 Analog & Digital Electronics Dr. Ahmed Nader Dr. Ahmed Hussein Fall 2013 4/30/2017 Faculty of Engineering Cairo University Grading Final Exam Term work Quizzes Project(s) Mid-Term Exam 40 60 20 20 20 Text book: Microelectronic Circuit Design by Richard C. Jaeger & Travis N. Blalock Website: http://scholar.cu.edu.eg/anader/ Email: [email protected] TA: Eng. Mazen Soliman Office hours: Sunday 4:00 – 5:00 pm Monday 4:00 – 5:00 pm 4/30/2017 Faculty of Engineering Cairo University Introduction Electronic Circuits can be divided into 2 main categories 1- Analog Operational Amplifiers Applications (Linear and Non-linear) Waveform generation (Oscillators), analog multiplier (Mixer), phase detection (PLL) 2- Digital Logic gates (TTL, ECL, CMOS) Applications (Flip Flops, Counters, Memory, ) 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 3 Syllabus Week 1 2 3 4 5 6 7 8 9 10 11 12 Lecture/Studio Topic Small signal model (BJT + MOS) Linear amplification Single stage amplifiers (CE/CS,CB/CG,CC/CD) Differential amplifiers Multistage amplifiers Frequency Response: transfer function Short circuit time constant method Miller effect and HF analysis Current Sources Advanced Current Sources Digital logic Digital logic Digital logic 13 Digital logic 14 4/30/2017 Faculty of Engineering Cairo University Assignment 1 1 2 3 4 5 5 Lecture 1 Small-Signal Modeling and Linear Amplification (Chapter 13) Dr. Ahmed Nader Adapted from presentation by Richard C. Jaeger Travis N. Blalock 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 5 Chapter Goals Understanding of concepts related to: • Transistors as linear amplifiers • dc and ac equivalent circuits • Use of coupling and bypass capacitors and inductors to modify dc and ac equivalent circuits • Small-signal voltages and currents • Small-signal models transistors (BJT and MOS) • Amplifier characteristics such as voltage gain, input and output resistances and linear signal range • Identification of common-source and common-emitter amplifiers • Rule-of-thumb estimates for voltage gain of common-emitter and common-source amplifiers. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 6 Review: Operation Regions of Bipolar Transistors Base-Emitter Junction Base-Collector Junction Reverse Bias Forward Bias Forward Bias Forward-Active Region (Good Amplifier) Saturation Region (Closed Switch) Reverse Bias Cutoff Region (Open Switch) Reverse-Active Region (Poor Amplifier) Binary Logic States 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 7 i-v Characteristics of Bipolar Transistor: Common-Emitter Output Characteristics For iB = 0, transistor is cutoff. If iB > 0, iC also increases. For vCE > vBE, npn transistor is in forward-active region, iC = bF iB is independent of vCE. For vCE < vBE, transistor is in saturation. For vCE < 0, roles of collector and emitter reverse. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 8 i-v Characteristics of Bipolar Transistor: Common-Emitter Transfer Characteristic Defines relation between collector current and base-emitter voltage of transistor. Almost identical to transfer characteristic of pn junction diode Setting vBC = 0 in the collector-current expression yields S BE T v iC I exp V 1 Collector current expression has the same form as that of the diode equation 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 9 Common-Emitter Voltage Transfer Characteristic 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 10 NMOS Transistor: Saturation Region • • • 4/30/2017 If vDS increases above triode region limit, channel region disappears, also said to be pinched-off. Current saturates at constant value, independent of vDS. Saturation region operation mostly used for analog amplification. Faculty of Engineering Cairo University Chap 13 - 11 NMOS Transistor: Saturation Region (contd.) K W 2 n i V v D TN GS 2 L v v V DSAT GS TN 4/30/2017 v v V DS GS TN for is also called saturation or pinch-off voltage Faculty of Engineering Cairo University Chap 13 - 12 Introduction to Amplifiers • BJT is used as an amplifier when biased in the forward-active (active) region • FET can be used as amplifier if operated in the saturation (pinch-off) region • In these regions, transistors can provide high voltage, current and power gains • Bias is provided to stabilize the operating point in a desired operation region • Q-point also determines – Small-signal parameters of transistor – Voltage gain, input resistance, output resistance – Maximum input and output signal amplitudes – Power consumption 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 13 BJT Amplifier BJT is biased in active region by dc voltage source VBE. Q-point is set at (IC, VCE) = (1.5 mA, 5 V) with IB = 15 mA. Total base-emitter voltage is: vBE VBE vbe Collector-emitter voltage is: vCE 10iC RC 4/30/2017 This is the load line equation. Faculty of Engineering Cairo University Chap 13 - 14 BJT Amplifier (cont.) If changes in operating currents and voltages are small enough, then iC and vCE waveforms are undistorted replicas of input signal. Small voltage change at base causes large voltage change at collector. Voltage gain is given by: Vce 1.65180 Av 206180206 V 0.0080 8 mV peak change in vBE gives 5 mA be change in iB and 0.5 mA change in iC. Minus sign indicates 1800 phase shift V 0.5 mA change in iC produces a 1.65 between input and output signals. change in vCE . 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 15 MOSFET Amplifier MOSFET is biased in active region by dc voltage source VGS. Q-point is set at (ID, VDS) = (1.56 mA, 4.8 V) with VGS = 3.5 V. Total gate-source voltage is: vGS VGS vgs 1 V p-p change in vGS gives 1.25 mA p-p change in iD and 4 V p-p change in vDS. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 16 Coupling and Bypass Capacitors C1 and C3 are large-valued coupling capacitors or dc blocking capacitors whose reactance at the signal frequency is designed to be negligible. • AC coupling through capacitors is used to inject ac input signal and extract output signal without disturbing Q-point • Capacitors provide negligible impedance at frequencies of interest and provide open circuits at dc. 4/30/2017 C2 is a bypass capacitor that provides a low impedance path for ac current from emitter to ground, thereby removing RE (required for good Q-point stability) from the circuit when ac signals are considered. Faculty of Engineering Cairo University Chap 13 - 17 dc and ac Analysis • DC analysis: – Find dc equivalent circuit by replacing all capacitors by open circuits and inductors by short circuits. – Find Q-point from dc equivalent circuit by using appropriate largesignal transistor model. • AC analysis: – Find ac equivalent circuit by replacing all capacitors by short circuits, inductors by open circuits, dc voltage sources by ground connections and dc current sources by open circuits. – Replace transistor by small-signal model – Use small-signal ac equivalent to analyze ac characteristics of amplifier. – Combine end results of dc and ac analysis to yield total voltages and currents in the network. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 18 dc Equivalent for BJT Amplifier • All capacitors in original amplifier circuits are replaced by open circuits, disconnecting vI , RI , and R3 from circuit. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 19 ac Equivalent for BJT Amplifier RB R1 R2 10k 30k R RC R3 4.3k100k 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 20 DC and AC Equivalents for MOSFET Amplifier dc equivalent Full circuit ac equivalent 4/30/2017 Simplified ac equivalent Faculty of Engineering Cairo University Chap 13 - 21 Small-Signal Operation of Diode • The slope of the diode characteristic at the Q-point is called the diode conductance and is given by: gd gd iD v D ID VT Q point IS VD ID IS exp VT VT VT ID 0.025V 40ID for ID IS • gd is small but non-zero for ID = 0 because slope of diode equation is nonzero at the origin. 1 r • Diode resistance is given by: d gd 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 22 Small-Signal Operation of Diode (cont.) v V v iD I exp D 1 ID id IS exp D d 1 V V T T V 2 3 v v v v 1 1 ID id IS exp D 1 IS exp D d d d ... V V 2 VT 6 VT VT T T S Subtracting ID from both sides of the equation, d S T 2 3 v 1 vd 1 vd id (ID I ) ... V 2 VT 6 VT For id to be a linear function of signal voltage vd , vd 2VT 0.05V or vd 5 mV requirement for small-signal operation of the diode. This represents the d S T id (ID I ) 4/30/2017 v = gdvd iD ID gdvd V Faculty of Engineering Cairo University Chap 13 - 23 Current-Controlled Attenuator Magnitude of ac voltage vo developed across diode can be controlled by value of dc bias current applied to diode. From ac equivalent circuit, From dc equivalent circuit ID = I, For RI = 1 k, IS = 10-15 A, r 1 vi r R R 1 I rd 1 vo v i (I I )R S I 1 VT d i d I vo v If I = 0, vo = vi, magnitude of vi is limited to only 5 mV. If I = 100 mA, input signal is attenuated by a factor of 5, and vi can have a magnitude of 25 mV. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 24 Small-Signal Model of BJT y12 y21 Using 2-port y-parameter network, ib y11vbe y12vce ic y vbe y22vce y22 21 The port variables can represent either time-varying part of total voltages and currents or small changes in them away from Q-point values. 4/30/2017 y11 ib v ce v 0 be ic v be v 0 ce ic v ce v 0 be ib v be v 0 ce i B vCE 0 Q point iC v BE IC VA VCE Q point i B v BE IC VT Q point iC vCE Q point IC b oVT bo is the small-signal commonemitter current gain of the BJT. Faculty of Engineering Cairo University Chap 13 - 25 Hybrid-Pi Model of BJT Transconductance: IC gm y21 40IC VT Input resistance: r • The hybrid-pi small-signal model is the intrinsic representation of the BJT. • Small-signal parameters are controlled by the Q-point and are independent of geometry of the BJT 1 b oVT b o y11 I C gm Output resistance: 1 VA VCE VA ro y22 IC IC 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 26 Small-Signal Current Gain and Amplification Factor of BJT Amplification factor is given by: bo gmr 1 I bF C F F C Q point 1 b b i bo > bF for iC < IM , and bo < bF for iC > IM , however, bF and bo I VA VCE VA VCE mF g ro V I VT C For VCE << VA, VA mF 40VA VT m C T mF represents maximum voltage gain individual BJT can provide and doesn’t change with operating point. are assumed to be equal. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 27 BJT Small Signal Parameters 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 28 Equivalent Forms of Small-Signal Model for BJT • Voltage -controlled current source gmvbe can be transformed into current-controlled current source, vbe ibr gmvbe gmibr boib v ic boib ce boib ro • Basic relationship ic = bib is useful in both dc and ac analysis when BJT is in forward-active region. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 29 Small-Signal Operation of BJT v iC I exp BE V T S C BE T V iC IC ic IS exp V 2 be T exp v V 3 vbe 1 vbe 1 vbe IC ic I 1 ... VT 2 VT 6 VT be C T 2 3 v vbe 1 vbe 1 ic iC IC I ... V 2 VT 6 VT For linearity, ic should be proportional to vbe with vbe 2VT or vbe 0.005V vbe I ic IC 1 IC C vbe IC gmvbe VT VT Change in ic that corresponds to small-signal operation is: ic gm vbe 0.005 vbe 0.200 IC IC VT 0.025 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 30 Small-Signal Model for pnp BJT • For pnp transistor iB IB -ib iC IC -ic bF IB bF ib • Signal current injected into base causes decrease in total collector current which is equivalent to increase in signal current entering collector. • Identical to that of npn transistor 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 31 Small-Signal Analysis of Complete C-E Amplifier: ac Equivalent • Ac equivalent circuit is constructed by assuming that all capacitances have zero impedance at signal frequency and dc voltage sources are ac ground. • Assume that Q-point is already known. RB R1 R2 4/30/2017 Faculty of Engineering Cairo University Chap13 - 32 Small-Signal Analysis of Complete C-E Amplifier: Small-Signal Equivalent Input applied to Base Output appears at Collector Emitter is common (through RE) to both input and output signal - Common-Emitter (CE) Amplifier. RL RC R3 AvtCE is the terminal voltage gain of the CE amplifier. v v v v AvtCE vo vo vb AvtCE vb i b i i 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 33 Common-Emitter (CE): Terminal Voltage Gain Solving for ib and substituting, bo R o L Avt v b o /gm (b o 1)R E b v For bo 1 and bo gmr Using alternate small-signal model form and test source vb to drive the base terminal of the transistor, neglecting ro, g R m L ACE vt 1 g R m E v o b oib RL v b ib r (ib b oib )RE ib [r (bo 1)RE ] 4/30/2017 What is the current gain? Faculty of Engineering Cairo University Chap 14 - 34 Common-Emitter (CE): Input Resistance and Signal Source Voltage Gain (bo 1)RE is the impedance in the emitter side of the transistor reflected to the base side. Rewriting the previous equation, we can find the impedance looking into the base terminal: vb Rib r (b o 1)RE ib Combining equations, the overall voltage gain can be written as: v b A A ib gm RL RB || Rib 1 gm RE RI RB || Rib CE v r (1 gm RE ) assuming b o 1 and b o gm r 4/30/2017 vb RB || Rib ib RI RB || Rib Faculty of Engineering Cairo University CE vt Chap 14 - 35 C-E Amplifier Voltage Gain Example with RE = 0 • Problem: Calculate voltage gain • Given data: bF = 100, VA = 75 V, Q-point is (1.45 mA, 3.41 V), R1 = 10 k, R2 = 30 k, R3 = 100 k, RC = 4.3 k,RI = 1k. • Assumptions: Transistor is in active region, bO = bF. Signals are low enough to be considered small signals. • Analysis: gm 40IC 40(1.45mA) 58.0 mS RB R1 R2 7.5k RL ro RC R3 3.83 k ro VA VCE IC b V 100(0.025V ) r o T 1.72 k IC 1.45mA 75V 3.14V 54.1 k 1.45mA L Av gm R RB r RI RB r 130 or 42.3 dB R (RB r ) 8.57 mV vi (0.005V ) I RB r 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 36 Small-Signal Model Simplification • For max gain RI RB r and RE 0, AvCEgm RL gm ro RC R3 • For maximum gain we set R3 >> RC and load resistor RC << ro. If we assume IC RC = VCC with 0 < < 1 I R Av Avt gm RC C C 40VCC VT Typically, = 1/3, since common design allocates one-third power supply across RC. To further account for other approximations leading to this result, we use: • • Av 10VCC Also, if the load resistor approaches ro (RC and R3 infinite), voltage gain is limited by amplification factor, mf of BJT itself. gm R R CE L For large RE, voltage gain can be aproximated as: Avt L 1 gm R R E E 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 37 38 General Concept Amplifier Amplifier 4/30/2017 Amplifier © Ahmed Nader, 2013 C-E Amplifier Output Resistance • Output resistance is the total equivalent resistance looking into the output of the amplifier at coupling capacitor C3. Input source is set to 0 and a test source vx is applied at output. vx vr ve (ix b i)ro ve 0 ve ix [(R r )|| R ] E th R E i ix (current division) R r R E th b R vx (R r )|| R 0 E R = r 1 ic i 0 R r R E th x E th b R r [1 g (R ||r )] 0 E r 1 m E 0 R r R 0 E th 4/30/2017 R m r b r ic 00 f Faculty of Engineering Cairo University (if R >> r ) E Chap 13 - 39 Sample Analysis of C-E Amplifier Analysis: To find the Q-point, dc equivalent circuit is constructed. 105 IB VBE (bF 1)IB(1.6104 ) 5 IB 3.71 mA IC 65IB 241 mA IE 66IB 245 mA • Problem: Find voltage gain, input and output resistances. • Given data: bF = 65, VA = 50 V • Assumptions: Active-region 5104 IC VCE (1.6104 )IE (5) 0 operation, VBE = 0.7 V, small signal operating conditions. VCE 3.67 V 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 40 Sample Analysis of C-E Amplifier (cont.) Next we construct the ac equivalent and simplify it. Rin RB r 6.23 k gm 40IC 9.64103 S boVT r 6.64 k IC VA VCE ro 223 k IC 4/30/2017 Rout RC ro 9.57 k Av vo vi 3 gm (Rout R ) Faculty of Engineering Cairo University Rin in RI R 84.0 Chap 13 - 41 Small-Signal Model for the MOSFET y11 y12 Using 2-port y-parameter network, ig y11vgs y12vds id y21vgs y22vds y21 The port variables can represent either time-varying part of total voltages and currents or small changes in them away from Q-point values. y22 ig v gs v ds 0 ig v ds gs 0 id v gs v ds 0 id v ds vGS v v gs 0 iG 0 Q point iG v DS 0 Q point iD vGS 2ID VGS VTN ID Q point iD v DS Q point 1 VDS 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 42 Small-Signal Parameters of MOSFET Transconductance: gm y21 • Since gate is insulated from channel by gate-oxide input resistance of transistor is infinite. • Small-signal parameters are controlled by the Q-point. • For same operating point, MOSFET has lower transconductance and lower output resistance that BJT. 2I D VGS VTN 2K n I D Output resistance: ro 1 1 VDS 1 y22 I D I D Amplification factor for VDS<<1: m f gmro 1 VDS I D 2K n ID 1 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 43 Small-Signal Operation of MOSFET K n 2 v V for vDS vGS VTN | Letting vGS VGS vgs : 2 GS TN K 2 2 iD ID id n VGS VTN 2v gs VGS VTN v gs 2 K 2 id n 2v gs VGS VTN v gs 2 iD For linearity, id should be proportional to vgs: vgs 0.2VGS VTN Since the MOSFET can be biased with (VGS - VTN) equal to several volts, it can handle much larger values of vgs than corresponding the values of vbe for the BJT. Change in drain current that corresponds to small-signal operation is: id ID 4/30/2017 gm ID vgs 0.2(VGS VTN ) 0.4 VGS VTN 2 Faculty of Engineering Cairo University Chap 13 - 44 Body Effect in Four-terminal MOSFET Drain current depends on threshold voltage which in turn depends on vSB. Back-gate transconductance is: i i gmb D D v BS v SB Q point Q point i V gmb D TN (gm) gm V v TN SB Q point 0 < < 1 is called back-gate tranconductance parameter. Bulk terminal is a reverse-biased diode. Hence, no conductance from bulk terminal to other terminals. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 45 Small-Signal Model for PMOS Transistor • For PMOS transistor vSG VGG - vgg iD ID -id • Positive signal voltage vgg reduces sourcegate voltage of the PMOS transistor causing decrease in total current exiting drain, equivalent to an increase in the signal current entering the drain. 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 46 Summary of FET and BJT Small-Signal Models 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 47 Small-Signal Analysis of Complete C-S Amplifier: ac Equivalent • ac equivalent circuit is constructed by assuming that all capacitances have zero impedance at signal frequency and dc voltage sources represent ac grounds. • Assume that Q-point is already known. RG R1 R2 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 48 Small-Signal Analysis of Complete CS Amplifier: Small-Signal Equivalent Noting similarity to CE case, Terminal voltage gain between gate and drain is found as: vd vo gm RL A v v g g 1 g R m E CS vt With r infinite, RiG is also infinite, therefore overall voltage gain from source vi to output voltage across RL is: v v v v Av vo vo vg AvtCS vg i g i G m L I G Av g R 4/30/2017 Faculty of Engineering Cairo University R R R i Chap 13 - 49 C-S Amplifier Voltage Gain: Example • Problem: Calculate voltage gain • Given data: Kn = 0.5 mA/V2, VTN = 1V, = 0.0133 V-1, Q-point is (1.45 mA, 3.86 V), R1 = 430 k, R2 = 560 k, R3 = 100 k, RD = 4.3 k,RI = 1 k. • Assumptions: Transistor is in active region. Signals are low enough to be considered small signals. R R R 243kΩ • Analysis: gm 2K I (1 V ) 1.23mS G 1 2 n DS DS 1 V ro DS 54.5kΩ RL ro RD R3 3.83kΩ I D 2I R D 0.48V G 4.69 13.4dB v 0.2V V 0.2 Av gm R i TN L R R GS Kn I G 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 50 Small-Signal Model Simplification • If we assume RI << RG Av Avt gm RL gm ro RD R3 This implies that total signal voltage at input appears across gate-source terminals. • Generally R3 >> RD and load resistor << ro. Hence, total load resistance on drain is RD. For this case, common design allocates half the power supply for voltage drop across RD and (VGS - VTN ) = 1V Av gm RD I D RD VDD VGS VTN 2 • Also, if load resistor approaches ro, (RD and R3 infinite), voltage gain is limited by amplification factor, mf of the MOSFET itself. 4/30/2017 Faculty of Engineering Cairo University Chap13 - 51 C-S Amplifier Input Resistance • Input resistance of C-S amplifier is much larger than that of corresponding C-E amplifier. vx ix RG Rin RG 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 52 C-S Amplifier Output Resistance • Output resistance is calculated in a manner similar to that of CE amplifier with r infinite. RiD ro (1 gm RE ) Rout RD || RiD RD || ro (1 gm RE ) 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 53 Sample Analysis of C-S Amplifier Analysis: dc equivalent circuit is constructed and analyzed Since IG 0, V I1 DS 6 510 V 10 2104 (ID I1) K ID n (0.4VDS VTN )2 2 VDS 5 V VGS 2 V ID 250 mA DS • • Problem: Find voltage gain, input and output resistances. Given data: Kn = 500 mA/V2, VTN = 1V, = 0.0167 V-1 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 54 Sample Analysis of C-S Amplifier (cont.) Next we construct the ac equivalent and simplify it. Rin RG1 RG2 1 M gm 2K n I DS (1 VDS ) 5.20104 S ro 1 VDS I D Rout ro RD RG3 18.2 k 260 k Av vo vi 3 I gm (Rout R ) Rin in R R 7.93 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 55 Summary CE and CS Characteristics 4/30/2017 Faculty of Engineering Cairo University Chap 13 - 56 Signal Range Constraints Minimum output voltage set by active region constraints of Q, maximum set by drop across RC. For a sine wave with peak VM, we can express the limits as: 4/30/2017 VM min[ IC RC ,(VCE VBE )] BJT VM min[ ID RD ,(VDS (VGS VTN ))] Faculty of Engineering Cairo University FET Chap 13 - 57