Download ac load line analysis

BJT AMPLIFIER
ac
Load Line Analysis
Maximum Symmetrical Swing
Common-emitter amplifier with
emitter bypass capacitor
DC Load line: KVL on C-E loop
V   I C RC  VCE  I E ( RE1  RE 2 )  V 
1  
1  
 I C ( RE1  RE 2 )  V  , when IE  
 IC
 I C RC  VCE  
  
  
1  


 I C ( RE1  RE 2 )
V  V  VCE  I C RC  
  
1  
  1
For Q - point, when   1, 
  
So, V  V   VCEQ  I CQ ( RC  RE1  RE 2 )
Slope 
-1
RC  RE1  RE 2
AC Load Line - KVL on C-E loop
ic RC  vce  ie RE1  0
Assuming ic  ie
vce  ic RC  ic RE1  ic ( RC  RE1 )
-1
Slope 
RC  RE1
Example
Determine the dc and ac load line. VBE=0.7V, β=150, VA=∞
Solution

To determine dc Q-point, KVL around B-E loop
V   I BQ RB  VEB  I E RE  I BQ RB  VEB  (1   ) I BQ RE
I BQ
V   VEB

 5.96 A
RB  (1   ) RE
Then I CQ  I BQ  0.894mA & I EQ  (1   ) I BQ  0.9mA
For Q - point, VCEQ  (V   V  )  I CQ RC  I EQ RE  6.53
-1
1
Slope 

RC  RE 15k
I CQ  0.894mA ;VECQ  6.53V
r 
VT
I CQ
gm 
ro 
I CQ
VT
 4.36k
 34.4mA / V
VA

I CQ
vo  ve  ( g m v )( RC // RL )  ic ( RC // RL )
dc & ac load line
Maximum Symmetrical Swing

Steps to design a BJT amplifier
 Write DC load line equation (relates of ICQ & VCEQ)
 Write AC load line equation (relates ic, vce; vce = - icReq,
Req = effective ac resistance in C-E circuit)
 Generally, ic = ICQ – IC(min), where IC(min) = 0 or some
other specified min collector current
 Generally, vce = VCEQ – VCE(min), where VCE(min) is
some specified min C-E voltage
 Combination of the above equations produce
optimum ICQ & VCEQ values to obtain maximum
symmetrical swing in output signal
Example
Determine the maximum output symmetrical swing for the ac load
line in previous figure.
Solution

From the dc & ac load line, the maximum negative swing in the Ic is
from 0.894 mA to zero (ICQ). So, the maximum possible peak-to-peak ac
collector current:
ic  2( I CQ  I C (min))  2(0.894)  1.79 mA

The max. symmetrical peak-to-peak output voltage:
| vce || ic | Req | ic | ( RC || RL )  (1.79)(5 || 2)  2.56 V

Maximum instantaneous collector current:
iC  I CQ 
1
| ic | 0.894  0.894  1.79 mA
2
BJT AMPLIFIER
Common-collector
Amplifier
Common-base Amplifier
C-C Small Signal Voltage Gain
Common
Collector Circuit
Small Signal
Equivalent
Circuit
I o  (1   ) I b
Vo  I o (ro // RE )
Vin  I b r  Vo  I b [r  (1   )( ro // RE )]  I b Rib
Rib  [r  (1   )( ro // RE )]
 Ri 
Vs
Vin  
 Ri  Rs 
Small signal voltage gain
Vo
(1   )( ro // RE )  Ri 


Av 

Vs r  (1   )( ro // RE )  Ri  Rs 
C-C Input & Output Impedance
Summing currents at output node
V V
Vx
I x  g mV  x  x 
RE ro r  R1 // R2 // Rs
Ro 
Vx
Ix


r
Vx
V  
r

R
//
R
//
R
1
2
s 
 
V V
Vx
therefore, I x   g mV  x  x 
RE ro r  R1 // R2 // Rs


g m r
V V
Vx
Vx  x  x 
I x  
RE ro r  R1 // R2 // Rs
 r  R1 // R2 // Rs 
Note that   g m r
 1 1
Ix 
1 
1
 
 
 
Vx  r  R1 // R2 // Rs  RE ro Ro
 r  R1 // R2 // Rs 
 // RE // ro
therefore, Ro   
1




Example

Calculate
 the small signal voltage gain,
 the input and output resistance.
Assume the transistor & circuit parameter are;β=100, VCC=5V,
VBE=0.7V, VA=80V and ro=100kΩ.
C-C Small Signal Current Gain

Can be determine by using the input resistance & the concept of
current dividers. A  I e
i
Ii
 R1 // R2 
 I i
I b  
 R1 // R2  Rib 
 R1 // R2 
 I i
I o  (1   ) I b  (1   )
 R1 // R2  Rib 
 ro 
 I o
I e  
 ro  RE 
Therefore,



If assume that R 1//R 2  R ib and ro  R E , then
Ai 
 R1 // R2  ro
Ie

 (1   )
Ii
 R1 // R2  Rib  ro  RE
Ai  (1   )
Common Base Amplifier
C-B Small Signal Equivalent Circuit
C-B Small Signal Voltage Gain
Vo  ( g mV )( RC // RL )
g mV 
V V Vs  (V )


 0 [KCL Equation at node E]
r RE
RS
1 
Vs
1
1 


V 



since   g m r

RE RS 
RS
 r
 r


// RE // RS 
1 


V
1  r
AV  o  g m ( RC // RL )   // RE // RS 
Vs
RS  1  

then, V  
Vs
RS
AV  g m ( RC // RL ) [as R S approaches zero]
C-B Small Signal Current Gain
V V
I i  g mV  
 0 [KCL Equation at node E]
r RE
 r

V   I i 
// RE 
1 

 RC 

I o  ( g mV )
 RC  RL 
 RC  r

I

then, Ai  o  g m 
// RE 
Ii

 RC  RL  1  
g m r

Ai 

  [as R L approaches zero and RE approaches infinity]
1  1 
Input Impedance
KCL at the input
1  
V

I i  I b  g mV 
 g mV  V 
r
 r 
Input resistance
V  r 
  re
Rie 
 
Ii  1   
Output Impedance
v s has been set equal to zero.
KCL at the emitter
g mV 
V V V


0
r RE RS
This implies V  0, means g m V  0
The output resistance
Ro  RC
Summary & Comparison
Configuration
Common
Emitter
Common
Collector
Common Base
Voltage Gain
Av > 1
Av  1
Av > 1
Current Gain
Ai > 1
Ai > 1
Ai  1
Input
Resistance
Moderate
(kΩ)
High
(50-100kΩ)
Low
(Ω)
Output
Resistance
Moderate to
High
Low
Moderate to
High