Download Reference

King Fahd University of Petroleum and Minerals
Hafr Al-Batin Community College
Laboratory Manual
PHYS 162
Solid-State Devices
Prepared by
Dr. Muhammad H. Rais and Md. Zahed M. Khan.
Modified by Mahmoud Mousa
Electrical & Electronics Engineering Technology Unit
Third Edition 2010
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: I
Preface
This is the second edition of the manual for the course “Solid-state Devices” (PHYS 162). These
experiments have been designed to provide the students broaden their knowledge in semiconductor
devices like different types of diodes and transistors and their applications in industry. Most of the
experiments have been designed from “Laboratory Exercises for Electronic Devices” by David Buchla with
some modifications.
The first edition of the manual was prepared by Dr. Muhammad H. Rais, E & E. E. T Unit
In the second edition, three more experiments (expt no 2, 3 and 8) are added by Mohammed
Zahed M. Khan.
Comments and suggestions are welcome from both instructors and students that will help in
designing new experiments or modifying the existing ones.
Dr. Muhammad H. Rais
and
Mohammed. Zahed M. Khan
E & E. E. T Unit
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: II
Acknowledgment
The author acknowledges the support of HBCC-KFUPM in compiling this lab manual for their help
in providing the resources and all these experiments with some modifications have been taken from the
lab manual named " Laboratory exercises for Electronic Devices", Conventional flow version, David
Buchla, 6th edition, prentice Hall.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: III
Laboratory Policy And Guidelines
The Lab Report
Each student should have his own report. The lab reports are intended to serve two equally important
purposes. First, they indicate your technical comprehension of the topics addressed in the labs, and
second, they indicate your ability to present and discuss your results in a clear and concise manner. You
will be graded on both aspects of your report.
The suggested format for your lab report is given below.
1. Objectives: State clearly what you set out to achieve in this lab. If this differs from what you
finally achieved, explain it in the "Conclusions" section. Please do not copy the objectives
verbatim from the lab handout. Think about it, interpret it, and explain it the best you can, in
your own words.
2. Parts: List all the parts you used in the design.
3. Design and Test Procedure: For each subsection of the lab, explain the following:
(a) Step-by-step description of what you did. Include as many details as possible, and
once again, write it in your own words.
(b) All necessary calculations. Please make sure your figures are consistent, legible and
well labeled.
4. Results and Answers to Questions: For each subsection of the lab, present your results in a
clear and concise manner (label graph axes, include all units of measurement). Note down all
your observations, even if you were not specifically asked for them in the handout. Interpret
your results and discuss the accuracy of your measurements. Additionally, answer all questions
listed in the lab handout.
5. Conclusions: In this section you should attempt to answer the questions: What did you learn
from this lab? What did you do wrong (or what went wrong)? How could you have improved
upon your design and test procedures? Were your results as expected or did you find
something unusual. Try not to include information that you have included in previous sections.
The Lab Report will count as 30% of the grade and is due at the beginning of the subsequent lab
experiment.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: IV
Safety in the laboratory
The experiments in this lab book are designed for low voltages to minimize electric shock hazard;
however, one should never assume that electric circuits are safe. A current of a few mi1liamps through
the body can be lethal. In addition, electronic laboratories often contain other hazards such as chemicals
and power tools. For your safety, you should review laboratory safety rules before beginning a course in
electronics. In particular, you should:
1. Avoid contact with any voltage source. Turn off power before working on circuits.
2. Remove watches, jewelry, rings, and so forth before working on circuits - even those circuits with low
voltages - as burns can occur.
3. Know the location of the emergency power-off switch.
4. Never work alone in the laboratory.
5. Keep a neat work area and handle tools properly. Wear safety goggles or gloves when required.
6. Ensure that line cords are in good condition and grounding pins are not missing or bent. Do not
defeat the three-wire ground system in order to make "floating" measurements.
7. Check that transformers and instruments that are plugged into utility lines are properly fused and
have no exposed wiring. If you are not certain about a procedure, check with your instructor before
you begin.
8. Report any unsafe condition to your instructor.
9. Be aware of and follow laboratory rules.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: V
Contents
EXPERIMENT # 1: THE DIODE CHARACTERISTICS………………………………………………………………………2
EXPERIMENT # 2: RECTIFIER CIRCUITS-1 (HALF-WAVE RECTIFIER)…………………………………………….6
EXPERIMENT # 3: RECTIFIER CIRCUITS-2 (FULL-WAVE RECTIFIER)…………………………………………….10
EXPERIMENT # 4: DIODE LIMITING CIRCUITS……………………………………………………………………………14
EXPERIMENT # 5: DIODE CLAMPING CIRCUITS………………………………………………………………………….18
EXPERIMENT # 6: THE ZENER REGULATOR………………………………………………………………………………..21
EXPERIMENT # 7: BIPOLAR JUNCTION TRANSISTOR CHARACTERISTICS……………………………………..25
EXPERIMENT # 8: BIPOLAR TRANSISTOR SWITCHES………………………………………………………………….29
EXPERIMENT # 9: BIPOLAR TRANSISTOR BIASING……………………………………………………………………..34
EXPERIMENT # 10: THE COMMON EMITTER AMPLIFIER………………………………………………………………40
EXPERIMENT # 11: MULTISTAGE AMPLIFIERS…………………………………………………………………………….45
EXPERIMENT # 12: CLASS B PUSH PULL AMPLIFIERS………………………………………………………………….50
EXPERIMENT # 13: JFET CHARACTERISTICS ……………………………………………………………………………..55
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 1
Experiment # 1
The Diode Characteristic
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 2
Experiment # 1
The Diode Characteristic
Reading:
Floyd, Electronic Devices, Section 1-1 through 1-10.
Objective:
1. Measure and plot the forward- and reverse-biased V-I characteristics for a diode.
2. Perform a diode test with an ohmmeter.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: one 330 , and one 1.0 M
-
Diode: one signal diode 1N4001
Summary of theory:
When a p-type material and n-type material are made on the same crystal base, a diode is
formed from the pn junction. When pn junction is formed, electrons and holes diffuse across the junction,
creating a barrier potential, which prevents further current without an external voltage source. If the
negative terminal of the source is connected to the n-type material and the positive terminal is connected
to p-type material, the diode is said to be forward-biased and it conducts. If the positive terminal of the
source is connected to the n-type material and the negative terminal is connected to the p-type material,
the diode is said to be reverse-biased and the diode is a poor conductor.
Diode can be simplified with three basic models, we are considering only two here. The ideal
model considers the diode as a one-way valve or as an open or closed switch. If it forward biased, the
switch is closed; if it is reverse-biased the switch is open. The second practical model, adds the forwardbiased “diode drop” needed to overcome the barrier potential. For a silicon diode, this is approximately
0.7V; for germanium, the drop is approximately 0.3V.
Procedure:

Measure and record the values of the resistors listed in Table 1-1. Check your diode with DMM
(digital multimeter) by measuring the forward- and reverse-resistance by reversing the meter
leads across the diode.
Table 1-1
Component
Listed value
R1
330 
R2
1.0 M
Measured Value
D1 forward resistance
D1 reverse resistance
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 3
Figure 1-1

Construct the forward biased circuit shown in Figure 1-1. The line on the diode indicates the
cathode side of the diode. Set the power supply for zero volts.

Monitor the forward voltage drop, VF, across the diode. Slowly increase Vs to establish 0.45V
across the diode. Measure the voltage across the resistor, VR1, and record it in Table 1-2.

The diode forward current, IF, can be found by applying ohm‟s law to R1. Compute IF and enter
the computed current in Table 1-2.

Repeat steps 3 and 4 for each voltage listed in Table 1-2.
Table 1-2
VF
VR1 (measured)
IF (computed)
0.45 V
0.50 V
0.55 V
0.60 V
0.65 V
0.70 V
0.75 V
Figure 1-2

Connect the reverse-biased circuit shown in Figure 1-2. Set the power supply to each voltage
listed in Table 1-3. Apply Ohm‟s law to the resistor and compute the reverse current in each
case. Enter the computed current in Table 1-3.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 4
Table 1-3
Vs (measured)
VR (measured)
IR (computed)
5.0 V
10.0 V
15.0 V

Graph the forward- and reverse-biased curves on a graph paper shown below.
-15V
-10V
-5V
0
0.1V
0.2V
0.3V
0.4V
0.5V
0.6V
0.7V
0.8V
Plot 1-1
Figure 1-3
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 5

You can plot the diode‟s forward characteristics on your oscilloscope by connecting the circuit
shown in Figure 1-3. Channel 1 senses the voltage drop across the diode; channel 2 shows a
signal that is proportional to the current. The scope is placed in the X-Y mode. The signal
generator ground must not be the same as the scope ground. Channel 2 must be inverted to
display the signal in the proper orientation.
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 6
Experiment # 2
Rectifier circuits 1 (Half-wave Rectifier)
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 7
Experiment # 2
Rectifier circuits 1 (Half-wave Rectifier)
Reading:
Floyd, Electronic Devices, Section 2-1 through 2-3.
Objective:
1. Construct half-wave rectifier circuits and compare the input and output voltage.
2. Connect a filter capacitor to the above circuit and measure the ripple voltage and ripple
frequency.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: two 2.2k
-
Diode: one signal diode 1N4001
-
One ac center-tapped transformer.
-
One 100µF capacitor.
Summary of theory:
Rectifiers are diodes used to change ac into dc. As you saw in experiment 1, diodes work like a
one way valve, allowing current in only one direction. When ac is applied to a diode, the diode is forward
biased for one-half of the cycle and reverse biased for the other half cycle. The output waveform is a
pulsating dc waveform (or half-wave rectified) as illustrated in figure 2-1. This pulsating dc waveform
can be then be filtered to convert it to constant dc.
Rectifiers are widely used in power supplies to provide the dc voltage necessary for almost all
active devices to work. The three basic rectifier circuits are the ha1f-wave, the center-tapped full-wave,
and the full-wave bridge rectifier circuits. The most important parameters for choosing diodes for these
circuits are the maximum
forward current, IF, and the peak inverse voltage rating (PlV) of the diode. The peak inverse voltage is
the maximum voltage the diode can withstand when it is reverse-biased. The amount of reverse voltage
that appears across a diode depends on the type of circuit in which it is connected. Some characteristics
of the first two rectifier circuits will be investigated in this and next experiment.
Procedure:

Measure the resistance value of the resistor and the forward resistance of the diodes and note in
table 2.0.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 8

Connect the half-wave rectifier circuit shown in Figure 2-2. (Safety note -the ac line voltage must
not be exposed; the transformer should be fused as shown.) Notice the polarity of the diode. The
line indicates the cathode side (the negative side when forward- biased).

Connect the oscilloscope so that channel 1 is across the transformer secondary and channel 2 is
across the output (load) resistor. The oscilloscope should be set for LINE triggering as the
waveforms to be viewed in this experiment are synchronized with the ac line voltage. View the
input voltage, V
in
, and output voltage, Vout, waveforms for this circuit and sketch them on Plot 2-
1 below. Label voltage and time on your sketch.

Measure the secondary rms voltage and the output peak voltage. Remember to convert the
oscilloscope reading to rms voltage. Record the data in Table 2-1.

The output isn't very useful as a dc voltage source because of the pulsating output. Connect a
100 µF filter capacitor in parallel with the load resistor (RJ. Check the polarity of the capacitor,
the negative side goes toward ground.

Measure the dc load voltage, Vout(DC)' and the peak-to-peak ripple voltage, Vr(pp) in the output. To
measure the ripple voltage, switch the oscilloscope to AC COUPLING. This allows you to magnify
the small ac ripple voltage without including the much larger dc level. Measure the ripple
frequency. The ripple frequency is the frequency at which the waveform repeats. Record all data
in Table 2-1.
Table 2-0
Component
Listed value
RL
2.2k
Measured Value
D1 forward resistance
D2 Forward resistance
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 9
Table 2-1
Without Filter capacitor
With filter capacitor
Computed
Measured
Computed
Measured
Vsec(rms)
Vsec(rms)
Vp(out)
Vp(out)
Measured
Vout(DC)
Vr(pp)
Ripple
frequency
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 10
Experiment # 3
Rectifier circuits 2 (Full-wave Rectifier)
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 11
Experiment # 3
Rectifier circuits 2 (Full-wave Rectifier)
Reading:
Floyd, Electronic Devices, Section 2-1 through 2-3.
Objective:
3. Construct full-wave rectifier circuits and compare the input and output voltage.
4. Connect a filter capacitor to the above circuit and measure the ripple voltage and ripple
frequency.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: two 2.2k
-
Diode: two signal diode 1N4001
-
One ac center-tapped transformer.
-
One 100µF capacitor.
Summary of theory:
Rectifiers are diodes used to change ac into dc. As you saw in experiment 1, diodes work like a
one way valve, allowing current in only one direction. When ac is applied to a diode, the diode is forward
biased for one-half of the cycle and reverse biased for the other half cycle. The output waveform is a
pulsating dc waveform (or half-wave rectified) as illustrated in figure 2-1. This pulsating dc waveform
can be then be filtered to convert it to constant dc.
Rectifiers are widely used in power supplies to provide the dc voltage necessary for almost all
active devices to work. The three basic rectifier circuits are the ha1f-wave, the center-tapped full-wave,
and the full-wave bridge rectifier circuits. The most important parameters for choosing diodes for these
circuits are the maximum
forward current, IF, and the peak inverse voltage rating (PlV) of the diode. The peak inverse voltage is
the maximum voltage the diode can withstand when it is reverse-biased. The amount of reverse voltage
that appears across a diode depends on the type of circuit in which it is connected. Some characteristics
of the first two rectifier circuits will be investigated in this and next experiment.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 12
Procedure:

Measure the resistance value of the resistor and the forward resistance of the diodes and note in
table 2.0.

Connect the full-wave rectifier circuit shown in Figure 2-3. (Safety note -the ac line voltage must
not be exposed; the transformer should be fused as shown.) Notice the polarity of the diode and
that the ground for the circuit is changed. The oscilloscope ground needs to be connected as
shown in the diagram.

Connect the oscilloscope so that channel 1 is across the transformer secondary and channel 2 is
across the output (load) resistor. The oscilloscope should be set for LINE triggering as the
waveforms to be viewed in this experiment are synchronized with the ac line voltage. View the
secondary voltage, V
sec
, and output voltage, Vout, waveforms for this circuit and sketch them on
Plot 2-2 below. Label voltage and time on your sketch.

Measure the secondary rms voltage and the output peak voltage. Remember to convert the
oscilloscope reading to rms voltage. Record the data in Table 2-1.

Connect a 100 µF filter capacitor in parallel with the load resistor (RJ. Check the polarity of the
capacitor, the negative side goes toward ground.

Measure the dc load voltage, Vout(DC)' and the peak-to-peak ripple voltage, Vr(pp) in the output.
Measure the ripple frequency. Record all data in Table 2-1

Investigate the effect of the load resistor on the ripple voltage by connecting a second 2.2kload
resistor in parallel with Rl in the circuit in figure 2-3. Measure the ripple voltage. What can you
conclude about the effect of the additional load current on the ripple voltage.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 13
Table 2-0
Component
Listed value
RL
2.2k
Measured Value
D1 forward resistance
D2 Forward resistance
Table 2-1
Without Filter capacitor
With filter capacitor
Computed
Measured
Computed
Measured
Vsec(rms)
Vsec(rms)
Vp(out)
Vp(out)
Measured
Vout(DC)
Vr(pp)
Ripple
frequency
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 14
Experiment # 4
Diode Limiting Circuits
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 15
Experiment # 4
Diode Limiting Circuits
Reading:
Floyd, Electronic Devices, Section 2-4.
Objective:
1. Explain the limiting circuit.
2. Calculate and measure the voltage limits of both biased and unbiased limiting circuits.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: two 10 k, and one 47 k
-
Diode: two signal diode 1N914 or equivalent
Summary of theory:
Diodes are frequently used in applications such as wave shaping, mixers, detectors, protection
circuits, and switching circuits. Diode limiting circuit (is also called clipping circuit) is used to prevent a
waveform from exceeding some particular limits, either negative or positive. For example, assume it is
desired to remove the portion of sine wave that exceeds +5.0 V. The bias voltage, VBIAS, is set to a
voltage 0.7 V less than the desired clipping level. The circuit in Figure 2-1 will limit the waveform because
the diode will be forward biased whenever the signal exceeds +5.0 V. This places VBIAS in parallel with
RL and prevents the input voltage from going above +5.0 V. When the signal is less than +5.0 V, the
diode is reversed biased and appears to be an open circuit. If, instead, it was desired to clip the
waveform below some specified level, the diode can be reversed and VBIAS is set to 0.7 V greater then
the desired limiting level.
Figure 2-1
Procedure:

Connect the circuit shown in Figure 2-2. Connect the signal generator to the circuit and set it for
6.0Vpp sine wave at a frequency of 1.0 kHz with no dc offset. Observe the input and output
waveforms on the oscilloscope by connecting it as shown. Notice that R2 and RL form a voltage
divider, causing the load voltage to be less than the source voltage. R1 will provide a dc return
path in case the signal generator is capacitively coupled.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 16
Figure 2-2

Add the diode to the circuit as shown in Figure 2-3. Look carefully at the output waveform.
Notice the zero volt level. Sketch the input and output waveforms in the space provided. Label
your plot for current and voltage. Then measure the waveform across R2. (On the oscilloscope,
this is accomplished by placing the probes from each channel on both sides of R2. The channels
are set to the same vertical sensitivity (VOLTS/DIV).
Figure 2-3
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 17
Plot 2-1

Remove the cathode from ground and connect it to the power supply as shown in Figure 2-4.
Vary the voltage from the supply and describe the results.
Figure 2-4

Reverse the diode in the circuit of Figure 2-4. Vary the dc voltage and describe the results.
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 18
Experiment # 5
Diode Clamping Circuits
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 19
Experiment # 5
Diode Clamping Circuits
Reading:
Floyd, Electronic Devices, Section 2-4.
Objective:
1. Explain the clamping circuit.
2. Predict and measure the effect of a dc bias voltage on a clamping circuit.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: one 47 k
-
Diode: two signal diode 1N914 or equivalent
-
Capacitor: one 47F
Summary of theory:
Diodes are frequently used in applications such as wave shaping, mixers, detectors, protection
circuits, and switching circuits. Diode clamping circuits are used to shift the dc level of a waveform. If a
signal has passed through a capacitor, the dc component is blocked. A clamping circuit can restore the dc
level. For this reason these circuits are sometimes called dc restorers. Diode clamping action is illustrated
in Figure 3-1 for both positive and negative clamping circuits. The diode causes the series capacitor to
have a low-resistance charging path and a high-resistance discharging path through RL. As long as the RC
time constant is long compared to the period of the waveform, the capacitor will be charged to the peak
value of the input waveform. This action requires several cycles of the input signal to charge the
capacitor. The out put load resistor sees the sum of the dc level on the capacitor and the input voltage.
Figure 3-1
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 20
Procedure:

Connect the circuit shown in Figure 3-2. Couple the oscilloscope with dc coupling and observe
the output voltage. Vary the input voltage. Write down the observations in conclusion.
Figure 3-2

Add a dc voltage to the diode by connecting the power supply as shown in Figure 3-3. Sketch
the output waveform on Plot below. Show the dc level on your sketch.
Figure 3-3

Find out what happens if the positive dc voltage is replaced with a negative dc source. Write
down your observations in conclusion.
Plot 3-1
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 21
Experiment # 6
The Zener Regulator
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 22
Experiment # 6
The Zener Regulator
Reading:
Floyd, Electronic Devices, Section 3-1 through 3-2.
Objective:
1. Measure and plot the characteristic curve of a zener diode.
2. Test a zener regulator circuit for the effect of a changing source and a changing load.
Apparatus:
-
Oscilloscope
-
Digital multimeter
-
Project board
-
Resistors: one 220 , one 1.0 k one 2.2 k
-
Potentiometer: one 1.0 k.
-
Zener diode: one 5V 1N4733 (or equivalent)
Summary of theory:
When a sufficiently large reverse bias voltage is applied to a zener diode, the reverse current will
suddenly increase. This sudden increase happens at a voltage called the zener voltage, VZ. A zener diode
is a special diode designed to operate in this break down region.
The zener voltage is a precise voltage that varies according to the type of zener; typically it is a
few volts but can be several hundred volts. Zener is used in applications that require a constant voltage
such as voltage regulators and in certain meters where they are used as a reference voltage for
comparison. Ideally, the zener breakdown characteristic is a straight vertical line, but in practice, a small
ac resistance is present. The ac resistance is found by dividing a change in voltage by a change in current
measured in the vertical breakdown region. The ac resistance is typically from 10Ω to 100 Ω.
Procedure:

Measure and record the values of the resistors listed in Table 4-1.
Table 4-1

Resistor
Listed value
R1
220 
R2
1.0 k
RL
2.2 k
Measured Value
Observe the zener characteristic curve by setting up the circuit shown in Figure 4-1, put scope in
the X-Y mode. Sketch the voltage and current (V-I) curve. The 1.0 kΩ resistor changes the
scope‟s y-axis into current axis (1.0 mA per volt). Label your plot for current and voltage.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 23
Figure 4-1
Plot 4-1

A common application of zener diodes is in regulators. In this step, you will investigate a zener
regulator as the source voltage is varied. Connect the circuit shown in Figure 4-2. Set VS to each
voltage listed in Table 4-2 and measured the output (load) voltage, Vout.
Figure 4-2
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 24
Table 4-2
VS
Vout
IL
VR1
IS
IZ
(measured)
(computed)
(computed)
(computed)
(computed)
2.0 V
4.0 V
6.0 V
8.0 V
10.0 V

From the measurements in step 3, complete Table 4-2. Apply Ohm‟s law to compute the load
current, IL, for each setting of the source voltage. The voltage across R1 (VR1) can be found by
applying Kirchhoff‟s Law (KVL) to the outside loop. It is the difference between the source
voltage, VS, and the output voltage, Vout. Note that IS through R1 and can be found using Ohm‟s
law. Find the zener current, IZ, by applying Kirchhoff‟s Current Law (KCL) to the junction at the
top of the zener diode.

In this step, you will test the effect of a zener regulator working with a fixed source voltage with
a variable load resistance figure 4-3. Often, the load is an active circuit in which the current
changes because of varying conditions. Set the power supply to a fixed +12.0 V out put and
adjusts the potentiometer ( RL) for maximum resistance.

With the potentiometer set to 1.0 kΩ (maximum resistance) measured the load voltage ( Vout) and
records the voltage in Table 4-3. Compute the other parameters listed on the first row as before.
(Use Ohm‟s law for IL, KVL for VR1, Ohm‟s law for IS, and KCL for IZ).
Figure 4-3
Table 4-3
RL
Vout
(measured)
IL (computed)
VR1
IS
IZ
(computed)
(computed)
(computed)
1.0 k
750 
500 
250 
100 
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 25


From the data in Table 4-3, plot the output voltage as a function of load resistance.
From your result, what is the smallest load resistor that can be used and still maintain regulation.
Plot 4-2
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 26
Experiment # 7
Bipolar Junction Transistor Characteristics
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 27
Experiment # 7
Bipolar Junction Transistor Characteristics
Reading:
Floyd, Electronic Devices, Section 4-1 through 4-4.
Objective:
1. Measure and plot the collector characteristic curves for a bipolar junction transistor.
2. Use the characteristic curves to determine the DC of the transistor at a given point.
Apparatus:
-
Digital multimeter
-
Project board
-
Resistors: one 100 , and one 33 k
-
Transistor (npn): one 2N3904 (or equivalent)
Summary of theory:
A bipolar junction transistor (BJT) is a three terminal device capable of amplifying an ac signal.
The three terminals are called the base, emitter, and the collector. BJTs consist of a very thin base
material sandwiched in between two of the opposite materials. They are available in two forms, either
npn or pnp. The sandwiched materials produced two pn junctions. These two junctions form two-diodesthe emitter-base diode and the base-collector diode.
BJTs are current amplifiers. A small base current is amplified to a larger current in the collectoremitter circuit. An important characteristic is the dc current gain, which is the ratio of collector current to
base current. This is called the dc beta (DC) of the transistor. Another useful characteristic is the dc
alpha. The dc alpha is the ratio of the collector current to the emitter current and is always less than 1.
For a transistor to amplify, power is required from dc sources. The dc voltages required for
proper operation are referred to as bias voltages. The purpose of bias is to establish and maintain the
required operating conditions. For normal operation, the base-emitter junction is forward-biased and the
base-collector junction is reverse-biased. Since the base-emitter junction is forward-biased, it has
characteristic of a forward-biased diode. A silicon bipolar transistor requires approximately 0.7V of voltage
across the base-emitter junction to cause base current.
Procedure:

Measure and record the resistance values of the resistors listed in Table 5-1.
Table 5-1
Resistor
Listed value
R1
33 k
R2
100 
Phys 162: Solid State Devices
Measured Value
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 28
Figure 5-1

Connect the common-emitter configuration illustrated in Figure 5-1. Start with both power
supplies set to 0V. The purpose of R1 is to limit the base current to a safe level and to allow
indirect determination of the base current. Slowly increase VBB until VR1 is 1.65V. This sets up a
base current of 50A, which can be shown by applying ohm‟s law to R1.

Without disturbing the setting of VBB, slowly increase VCC until +2.0V is measured between the
transistor‟s collector and emitter. This voltage is VCE. Measure and record VR2 for this setting.
Record VR2 in Table 5-2 in the column labeled Base current = 50 A.
Table 5-2
Base Current = 50 A
VCE
Base Current = 100 A
Base Current = 150 A
VR2
IC
VR2
IC
VR2
IC
(measured)
(computed)
(measured)
(computed)
(measured)
(computed)
(Measured)
2.0 V
4.0 V
6.0 V
8.0 V

Compute the collector current, IC, by applying Ohm‟s law to R2. Use the measured voltage, VR2,
and the measured resistance, R2, to determine the current. Note that the current in R2 is the
same as IC for the transistor. Enter the computed collector current in Table 5-2 in the column
labeled Base current = 50A.

Without disturbing the setting of VBB, increase VCC until 4.0 V is measured across the transistor‟s
collector to emitter. Measure and record VR2 for this setting. Compute the collector current by
applying Ohm‟s law as in step above. Continue in this manner for each of the value of VCE listed
in Table 5-2.

Reset VCC for 0 V and adjust VBB until VR1 is 3.3 V. The base current is now 100 A.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 29

Without disturbing the setting of VBB, increase VCC until 2.0 V. Measure and record VR2 for this
setting in Table 5-2 in the column labeled Base current = 100A. Compute IC (collector current)
for this setting by applying Ohm‟s law to R2. Enter the computed collector current in Table 5-2.

Increase VCC until VCE is equal to 4.0 V. Measure and record VR2 for this setting. Compute IC as
before. Continue in this manner for each of the value of VCE listed in Table 5-2.



Reset VCC for 0 V and adjust VBB until VR1 is 4.95 V. The base current is now 150 A.
Complete Table 5-2 by repeating above steps for 150 A of base current.
Plot three collector characteristic curves using the data tabulated in Table 5-2. The collector
characteristic curve is a graph of VCE versus IC for a constant base current. Choose a scale for IC
that allows the largest current observed to fit on the graph. Label each curve with the base
current it represents. Graph the data on Plot 5-1 below.
Plot 5-1

Use the characteristic curve you plotted to determine the DC for the transistor at a VCE of 3.0 V
and a base current of 50 A, 100 A, and 150 A. Then repeat the procedure for a DC at a VCE of
5.0 V. Tabulate your results in Table 5-3.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 30
Table 5-3
Current Gain,  DC
VCE
IB = 50 A
IB = 100 A
IB = 150 A
3.0 V
5.0 V
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 31
Experiment # 8
Bipolar Transistor Switches
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 32
Experiment # 8
Bipolar Transistor Switches
Reading:
Floyd, Electronic Devices, Section 4-5 and 4-6.
Objective:
1. Construct and test a basic one transistor circuit for its switching characteristics.
2. Explain how the measurements can determine if a transistor is cutoff or saturated.
3. Add a second transistor to the circuit in objective 1 and measure the switching threshold.
4. Add hysteresis to the circuit and test both switching thresholds.
Apparatus:
-
Digital multimeter, Project board
-
One 10 kpotentionmeter, one LED
-
Resistors: one 1.0 k, one 330 , and two 10 k
-
npn Transistor: two 2N3904
Summary of theory:
An important application of transistors is in switching circuits used in digital systems and
applications. The first large-scale used of the digital circuits was in telephone systems. Today, computers
form the most important application of the switching circuits. Although nearly all of these circuits are
digital integrated circuits, discrete transistor switching circuits are used when it is necessary to supply
higher currents of different voltages that can be furnished directly from the digital IC.
When transistors are used in switching applications, they are usually operated in either cutoff or
in saturation. Cutoff refers to the condition where the transistor acts as an open switch; saturation occurs
when the transistor acts as a closed switch. If the transistor is in cutoff, there is no current in the
collector circuit; if it is saturated; it is conducting as much as possible.
In this experiment, you will construct and test a one-transistor switching circuit, then make
improvements. The improvements include 1. Avoiding the gradual switching of the one transistor circuit
by adding another (second) transistor, 2. Raising the voltage threshold where switching occurs and 3.
Adding hysteresis. The switching threshold refers to the input voltage where the output changes from
one state to another. In a switching circuit, hysteresis refers to two different thresholds, depending in
whether the output is already saturated or already in cutoff. The advantage of hysteresis is that the
switching is less susceptible to noise.
Procedure:

Measure and record the resistance values of the resistors listed in Table 8-1.
Table 8-1
Resistor
Listed value
RB
1.0 k
RC
1.0 k
Phys 162: Solid State Devices
Measured Value
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 33

RC1
10 k
RE
330 
A simple one-transistor amplifier circuit is shown in Figure 8-1. It can easily be set for operation
into cutoff and saturation by varying the potentiometer (R1). Compute the collector-emitter
voltage (VCE) at cutoff and saturation and the voltage across the collector resistor at saturation
(VRC). Compute ISAT by assuming a 2.0 V drop across the LED and 0.1 V across the transistor.
Show the computed values in Table 8-2.

Connect the circuit of Figure 8-1 and observe the effect of varying the potentiometer. Set the
potentiometer to the minimum value and measure V CE at cutoff (the LED should be off). Then set
the potentiometer for the maximum (The LED must be on), and measure V CE (saturation) and the
voltage across the 1.0 kcollectorresistor, VRC (saturation). Record the values in Table 8-2 and
compare to the computed values from the above step.
Figure 8-1
Table 8-2
Quantity
Computed
Measured
Value
Value
VCE(Cutoff)
VCE(Sat)
VRC(Sat)
ISat

Connect the two transistor circuit shown in Figure 8-2. Notice that the 1.0 kpotentiometer is
now the collector resistor for Q2. Set the potentiometer so the VIN is a minimum (0 V). Since Q 1 is
off LED should be on. Measure VIN and VOUT and record the readings in Table 8-3 in the first two
rows. Slowly increase VIN while watching the LED. You should observe that there is no dim
condition for the LED- it will suddenly go off as the input voltage is increased. Record VIN and
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 34
VOUT at the threshold where the LED just turns off. Notice that the output voltage indicates Q 2 is
either in saturation or in cutoff.
Figure 8-2
Table 8-3
Quantity
Measured Value
VIN (LED on)
VOUT (LED on)
VIN (LED off or threshold)
VOUT (LED off or threshold)
Figure 8-3

Modify the circuit from the above step by adding the 330 resistor; then test it according to the
procedure shown. The modified circuit is shown in Figure 8-3. Set the potentiometer so that V IN
is minimum (0 V). The LED should be on. Measure VIN and VOUT and record the readings in Table
8-4. The readings of V OUT will be higher that in the previous circuit. Test the upper threshold by
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 35
monitoring VIN as you slowly increase VIN. You will see that the LED goes out suddenly. Record
this as the upper threshold voltage. Measure and record V OUT and confirm that the transistor is in
cutoff. Now slowly reduce VIN. Notice that the LED stays out until the voltage is much lower.
When it comes on, record VIN and VOUT at this lower threshold.
Table 8-4
Quantity
Measured Value
VIN
VOUT
VIN (upper threshold)
VOUT (upper threshold)
VIN (lower threshold)
VOUT (lower threshold)
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 36
Experiment # 9
Bipolar Transistor Biasing
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 37
Experiment # 9
Bipolar Transistor Biasing
Reading:
Floyd, Electronic Devices, Section 5-1 through 5-4.
Objective:
5. Construct and analyze three types of transistor bias circuits: base bias, voltage-divider bias, and
collector-feedback bias.
6. Select appropriate bias resistor for each type of bias.
Apparatus:
-
Digital multimeter
-
Project board
-
Resistors: (one of each): 470, 2.0 k, 6.8 k, 33 k, 360 k, and 1.0 M
-
npn Transistor: three 2N3904
Summary of theory:
For a transistor to amplify signals, it is necessary to forward bias the base-emitter junction and to
reverse bias the base-collector junction. The purpose of bias is to provide dc voltages to set up the
proper quiescent (no signal) conditions for circuit operation.
There are four common bias circuits for bipolar transistors. The four circuits are: (1) base bias, (2)
emitter bias, (3) voltage-divider bias, and (4) collector feedback bias. These basic bias circuits are
illustrated in Figure 6-1 for npn transistors. These bias methods apply to pnp transistors by reversing
voltage polarities. The key for either type of transistor is that the base-emitter junction is forward biased
and the base collector junction is reverse biased.
Base bias is the simplest form because it uses a single power supply and resistor. It is satisfactory
for switching applications but is generally unsatisfactory for linear circuits due to b dependency.
Emitter bias overcomes the difficulty of b dependency, but requires a positive and negative power
supply.
Voltage divider bias is widely used because it is stable yet requires only one power supply. When
the divider current much larger than the base current, the small base current can be ignored, simplifying
the analysis. This is called „stiff‟ bias.
Figure 6-1 Type of bias for bipolar transistors
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 38
The step to solve for the dc parameters for the common-emitter amplifier with stiff voltage-divider bias
are given as follows:
1. Mentally remove the capacitors from the circuit since they appear open to dc. For this circuit,
this will cause the load resistor, RL, to be removed (See Figure 6-2 (a)).
2. Solve for base voltage, VB, by applying the voltage divider rule to R1 and R2 as illustrated in
Figure 6-2 (b).
3. Subtract the 0.7 V forward-bias drops across the base-emitter diode from VB to obtain the
emitter voltage, VE, as illustrated in Figure 6-2 (c).
4. The dc current in the emitter circuit is found by applying Ohm‟s law to RE. The emitter
current, IE is approximately equal to the collector current, Ic. The transistor appears to be
current source of approximately IE into the collector circuits as shown in Figure 6-2 (d).
Figure 6-2
Steps in solving a Common –Emitter amplifier with stiff voltage divider
Collector-feedback bias uses a form of negative feedback to stabilize the Q point.
Procedure:

Measure and record the resistance values of the resistors listed in Table 6-1.
Table 6-1

Resistor
Listed value
RB
1.0 M
RC
2.0 k
Measured Value
You will test each of the tree transistors, one at a time, in a base bias circuit. The manufacturer‟s
specification sheet for a 2N3904 transistor indicates that DC can range from 100 to 400.
Assuming the DC is 200, compute the parameter listed in Table 6-2 for the base bias circuit
shown in Figure 6-3. Start by computing the voltage across the base resistor, VRB, and the
current in this resistor, IB. Using DC find the collector current, IC, the voltage across the collector
resistor, VRC and the voltage from collector to ground, VC.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 39
Table 6-2
DC
Computed
Parameter
Value
Measured Value
Q1
Q2
Q3
VRB
IB
IC
VRC
Figure 6-3

Label each of three npn transistors as Q1, Q2, and Q3. Construct the circuit shown in Figure 6-3
using Q1. Measure the voltages listed in Table 6-2 for Q1. Then remove Q1 from the circuit and
test the other two transistors in the same circuit. Record all measurements in Table 6-2.

Test voltage-divider bias for the same three transistors. Start by measuring and recording the
values of the resistors listed in Table 6-3.
Table 6-3

Resistor
Listed value
R1
33 k
R2
6.8 k
RE
470 
RC
2.0 k
Measured Value
Compute the parameters listed in Table 6-4 for the circuit shown in Figure 6-4. The method is
outlined in the box shown in the summary of theory.
Table 6-4
DC
Computed
Parameter
Value
Measured Value
Q1
Q2
Q3
VB
VE
IEIC
VRC
VC
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 40
Figure 6-4

Construct the circuit shown in Figure 6-4 using transistor Q1. Measure the voltages listed in
Table 6-4 for Q1. Then remove Q1 from the circuit and test the other two transistors in the same
circuit. Record all measurements in Table 6-4.

In this step, you will compare the same three transistors in a collector-feedback circuit. Measure
and record the values of the resistors listed in Table 6-5.
Table 6-5

Resistor
Listed value
RB
360 k
RC
2.0 k
Measured Value
Compute the parameters listed in Table 6-6 for the circuit shown in Figure 6-5. To find the
approximate collector and emitter currents, you can write Kirchhoff‟s voltage law around the base
path as follows:
 VCC  I E RC  I B R B  V BE  0 ,
Substituting for IB, I B 
IE
 DC
,
V  VBE
And solving for IE, we obtain: I E  I C  CC
.
RC 
RB
 DC
Assume the DC is 200 for the calculation. Then find the voltage across the collector resistor, VRC, and the
collector voltage, VC.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 41
Figure 6-5

Construct the circuit shown in Figure 6-5 using transistor Q1. Measure the voltages listed in
Table 6-6 for Q1. Then remove Q1 from the circuit and test the other two transistors in the same
circuit. Record all measurements in Table 6-6.
Table 6-6
DC
Computed
Parameter
Value
Measured Value
Q1
Q2
Q3
IC
VRC
VC
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 42
Experiment # 10
The Common-Emitter Amplifier
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 43
Experiment # 10
The Common-Emitter Amplifier
Reading:
Floyd, Electronic Devices, Sections 6-1 through 6-3.
Objective:
1. Compute the dc and ac parameters for a common-emitter (CE) amplifier.
2. Build a CE amplifier circuit and measure the dc parameters, the ac input resistance, and the
voltage gain. Observe the phase relationship between the input and output signals.
Apparatus:
-
Digital multimeter
-
Project board
Resistors: (one of each): 100, 300and  k,
(Two of each): 1.0 k, and 10 k
Capacitors: one 47 F, and one 1.0 F,
Potentiometer: one 10 k.
Summary of theory:
In a common-emitter (CE) amplifier, the input signal is applied between the base and emitter and
out signal is developed between the collector and emitter. The transistor‟s emitter is common to the input
and output circuits, hence, the term common emitter. A CE amplifier is shown in Figure 7-1 (a).
Figure 7-1(a & b)
To amplify ac signals, the base-emitter junction must be forward-biased and the base collector
junction must be reverse-biased. The bias establishes and maintains the proper dc operating conditions
for the transistor.
After analyzing the dc conditions, the ac parameters for the amplifiers can be evaluated. The
equivalent circuit is drawn in Figure 7-1(b). The capacitors appear to be an ac short. Thus, the ac
equivalent circuit does not contain RE2 in this example. Using the superposition theorem, VCC is replaced
with short, placing it at ac ground. The analysis steps are:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 44
5. Replace all capacitors with a short and place VCC at ac ground. Compute the ac resistance
of the emitter, re‟, from the equation:
re' 
25mV
IE
6. Compute the amplifier voltage gain. Voltage gain is the ratio of the output voltage divided
by the input voltage. The input voltage is across the ac emitter resistance to ground
which, in this example, re‟ +RE1. The output voltage is taken across the ac resistance
from collector to ground. Looking from the transistor‟s collector, RL appears to be in
parallel with RC. In addition, Ic is approximately equal to Ie. For the circuit in Figure 7-1
(b), the output voltage divided by the input voltage can be written:
Av 
I c ( RC R L )
( RC R L )
Vout

 '
'
Vin
I e (re  R E1 ) (re  R E1 )
7. Compute the total input resistance seen by the ac signal:
R(in)tot  R1 R2  ac (re'  RE1 )
Notice that the ac resistance of the emitter circuit is multiplied by ac when it brought into the
base circuit.
Procedure:

Measure and record the resistance values of the resistors listed in Table 7-1.
Table 7-1
Resistor
Listed value
R1
10 k
R2
4.7 k
RE1
100 
RE2
330 
RC
1.0 k
RL
10 k
Measured Value
Table 7-2
DC
Computed
Measured
Parameter
Value
Value
VB
VE
IE
VC
VCE

Compute the dc parameters listed in Table 7-2 for the CE amplifier shown in Figure 7-2. Note
that VB, VE, and VC are with respect to circuit ground. Use the sum of RE1 and RE2 times IE to
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 45
compute the dc emitter voltage, VE. Compute Vc subtracting VRC from VCC. Enter your computed
values in Table 7-2.
Figure 7-2

Construct the amplifier shown in Figure 7-2. The signal generator should be turned off. Measure
and record the dc voltages listed in Table 7-2.

Compute the ac parameters listed in Table 7-3. The input signal, Vin, is set for 300 mVpp. This is
both Vin and the ac base voltage, Vb. Multiply Vin by the computed voltage gain to calculate the ac
voltage at the collector; this is both Vc and Vout. If you do not know the ac for the input
resistance calculation, assume a value of 100.

Turn on the signal generator and set Vin for 300 mVpp at 1.0 kHz with the generator connected to
the circuit. Use the oscilloscope to set the proper voltage and check the frequency. Measure the
ac signal voltage at the transistor‟s emitter and at the collector. Note that the signal at the
emitter is less than the base (why?). Use Vin and the ac collector voltage (Vout) to determine the
measured voltage gain, Av. The measurement of Rin
(tot)
is explained below. Record the ac
measurements in Table 7-3.
Table 7-3
AC
Computed
Measured
Parameter
Value
Value
Vin=Vb
Ve
r’e
Av
Vout = Vc
Rin (tot)
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 46
Figure 7-3

The measurement of Rin (tot) is done indirectly since it is an ac resistance that cannot be measured
with an ohmmeter. The output signal (Vout) is measured with an oscilloscope and recorded with
the amplifier operating normally (no clipping or distortion). A rheostat ( Rtest) is then inserted in
series with the source as shown in Figure 7-3. The rheostat is varied until Vout drops to one half
the value prior to inserting Rtest. With this condition, Vin=Vout and Rin
(tot)
must be equal to Rtest.
Rtest can then be removed and measured with an ohmmeter. Using this method, measure Rin (tot)
and record the result in Table 7-3.

Restore the circuit to that of Figure 7-2. With a two-channel oscilloscope, compare the input
and output waveforms. What is the phase relationship between Vin and Vout?
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 47
Experiment # 11
Multistage amplifiers
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 48
Experiment # 11
Multistage amplifiers
Reading:
Floyd, Electronic Devices, Sections 6-6 through 6-7.
Objective:
1. Compute the ac parameters for a multistage amplifier.
2. Construct the two-stage transistor amplifier measure the ac parameters including the input
resistance, output resistance, voltage gain, and power gain.
Apparatus:
-
Digital multimeter
-
Oscilloscope
Transistors: one 2N3904 npn transistor (or equivalent)
and one 2N3906 pnp transistor (or equivalent)
Capacitors: two 0.1 F, three 1.0 F
Resistors: (one of each): 220 , 1.0 , 2.0 k, 4.7 k, 6.8 k, 10 k, 33 k, and 47 k (two of each):
22 k, 100 k, and 330 k
Potentiometer: one 100-k
Summary of theory:
A single stage of amplification is often not enough for a particular application. The overall gain
can be increased by using more than one stage. Frequently, the first stage is a low noise voltage
amplifier, which is followed by additional voltage or power amplification.
The two stage linear amplifier is shown in Figure 9-1. It uses two common emitter (CE) circuits,
with pnp and npn transistors connected in a cascade amplifier. RA and RB is not considered part of the
amplifier, but is only used to attenuate the input
gnal from the function generator by a known factor.
Figure 9-1
The ac parameters for the amplifier can now be analyzed. The ac analysis steps are:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 49
1. Replace all capacitors with a short. The ac resistance in the emitter circuit includes the unbypassed emitter resistor and the ac resistance of the transistor. Compute the ac emitter
resistance of each transistor, re' , from the equation:
re' 
25mV
IE
2. Compute the input and output resistance of Q1. The input resistance includes the bias resistors in
parallel with the ac resistance of the emitter circuit reflected into the base circuit. The output
resistance is simply the value of the collector resistor.


Rin(Q1)  R1 R2  ac (re'  RE 2 )
3. Compute the input and output resistance of Q2. As before, the input resistance includes the bias
resistors and the ac emitter resistance reflected into the base circuit. The output resistance is
again the collector resistor.


Rin(Q 2)  R3 R4  ac (re'  RE 4 )
4. Compute the unloaded gain, Av (NL), of each stage. The unloaded voltage gain for the common
emitter transistors can be written:
Av ( NL ) 
Vout
I c RC
R

 ' C
'
Vin
I e (re  Re( ac) ) (re  Re( ac) )
5. Compute the overall gain of the amplifier. It is easier to calculate the voltage gain of a multistage
amplifier by computing the unloaded voltage gain for each stage, then including the loading effect
by computing voltage dividers for the output resistance and input resistance of the following
stage. This idea is illustrated in Figure 9-2. Each transistor is drawn as an amplifier consisting of
an input resistance, Rin, an output resistance, Rout, along with its unloaded gain, Av. The, the
overall loaded gain, Av, of this amplifier can be found by:


Rin 2
 Av 2
Av'  Av1 
 Rout1  Rin 2 
Figure 9-2
Note that if a load resistor was added across the output, an additional voltage divider consisting of the
output resistance of the second stage and the added load resistor is used to compute the new gain.
Procedure:

Compute the ac parameters listed in Table 9-1. The gain for each stage is not loaded. The
output resistance of Q1 (Rout
(Q1))
is simply the collector resistor; the input resistance of Q2 is
determined by the procedure given in the summary of theory.

Compute the overall gain of the amplifier using the computed gains from Table 9-1 and the
input and output resistance between the stages (see step 5 of the ac analysis in the summary of
theory). Enter the computed overall gain, Av‟, on the first line of Table 9-2. Using this value,
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 50
compute the expected output voltage; enter the computed output voltage on the list line of
Table 9-2.
Table 9-1
AC
parameter
re' (Q1)
Computed
Value
re' (Q 2)
Av ( NL)(Q1)
Av ( NL)(Q 2)
R(out)Q1
R(in)Q2
Table 9-2
AC
parameter
Av'
Computed
Value
Measure Value
R(in)Q1
R(out)Q2
V(in)Q1
10 mV
V(out)Q2

Connect the function generator voltage to the divider composed of RA and RB as shown in Figure
9-1. (Note the purpose of these resistors is to attenuate the generator signal by a known
amount; they will not be considered part of amplifier. Turn on the function generator and set Vs
for a 0.5 Vpp sine wave at 100 kHz. (Check voltage and frequency with the oscilloscope). The ac
base voltage of Q1 is Vin; it is shown as 10mVpp (based on the voltage divider). Measure the ac
signal voltage at the amplifier output (V
out (Q2))
and record the value on the last line of Table 9-
2. Then use Vin and Vout to find the measured overall gain, Av‟. Record and measured overall gain
in the first line of Table 9-2.

The measurement of the total input resistance, Rin (tot), is done indirectly by the method as shown
in Experiment 7 using a variable test resistor.
Figure 9-3
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 51

In this step, you will measure the output resistance of the amplifier. The computed output
resistance is the same as RC2, the load resistor of Q2. You can measure the output resistance of
any amplifier by measuring the loading effect caused by adding a load resistor. It is not
necessary that the load resistor be equal to the output resistance. Consider the model of an
amplifier shown in Figure 9-2. Assume that you want to indirectly measure Rout2. Think of the
amplifier as a Thevenin source with the Thevenin resistance represented by the output
resistance. You can find this resistance by measuring the unloaded output voltage and the new
output voltage when a known resistance is placed on the output. Use this idea to develop the
equation for the output resistance of the amplifier. Then make the measurements and solve for
the output resistance.
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 52
Experiment # 12
Class B Push-Pull Amplifiers
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 53
Experiment # 12
Class B Push-Pull Amplifiers
Reading:
Floyd, Electronic Devices, Sections 9-2.
Objective:
1. Construct a push-pull amplifier driven by a common-emitter voltage amplifier.
2. Predict and measure performance characteristics of the circuit constructed in objective 1.
Apparatus:
-
Digital multimeter
-
Project board
-
Function generator
-
Oscilloscope
Resistors: one 330 , one 2.7 k and one 68 k
Resistors: two 10 k
Capacitor: one 1.0 F,
Transistors: one 2N3906 pnp, and two 2N3904 npn,
Diodes: two 1N914 (or equivalent),
Potentiometer: one 5.0 k.
Summary of theory:
The efficiency of a power amplifier is the ratio of the average signal power delivered to the load
to the power drawn from the supply. Amplifiers that conduct continuously is called Class „A‟ amplifiers and
are not particularly efficient (typically less than 25 %). For small signals, this isn‟t important, but when a
larger amount of power must be delivered, class „B‟ amplifiers are much more efficient. In class B
operation, a transistor is on during 50 % of the cycle (half-wave operation). By combining two transistors
that alternately conduct on positive and negative half-cycles of the input waveform, a very efficient
amplifier can be made. This type of amplifier is called push-pull amplifier. An example, using common
collector amplifiers, is shown in Figure 10-1(a). The key to its high efficiency is the fact that the circuit
dissipates very little quiescent (standby) power because both transistors are off when no signal is
present.
Figure 10-1
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 54
The push-pull circuit shown uses complementary (npn and pnp) transistors. One transistor is active for
the positive part of the signal (pushing), while the other is active for the negative portion of the signal
(pulling).
A problem with this basic circuit is that the output signal is one diode drop behind the input. This
is because the signal must overcome the base-emitter diode drop for each transistor before it will
conduct. The output signal follows the input except for the 0.7 V diode drops on both the positive and
negative excursion. This causes distortion on the output called crossover distortion. Using diodes to bias
the transistors into slight conduction as illustrated in Figure 10-1(b) can eliminate crossover distortion.
This type of bias is called the diode current mirror bias. The forward-biased diodes will each have
approximately the same 0.7 V drops as the base emitter junction. If the diode is matched to the
transistor‟s base-emitter diode, the current in the collector circuit is equal (“mirrors”) the current in the
diode.
In addition to eliminating crossover distortion, the current mirrors offer another advantage. If the
temperature increases, the output current will tend to increase. If the diodes are identical to the baseemitter junction, and in the same thermal environment, any thermal change will tend to be compensated
by the diodes, thus maintaining stable bias.
Procedure:

Measure and record the values of the resistors listed in Table 10-1.
Table 10-1
Resistor
Listed value
RL
330 
R1
10 k
R2
10 k
R3
68 k
R4
2.7 k
Measured
Value
Figure 10-2
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 55

Construct the push-pull amplifier shown in Figure 10-2. The amplifier uses the input signal from
the generator to bias the transistor on. Set the generator for a 10 Vpp sine wave at 1.0 kHz. Be
sure that there is no dc offset from the generator. The dual positive and negative power supplies
offer the advantage of not requiring large coupling capacitors.

Sketch the input and output waveforms you observe on Plot 10-1. Show the amplitude difference
between the peak input waveform and the output waveform and note the cross over distortion on
your plot. Label the plot for voltage and time.
Plot 10-1

Add the diode current mirror bias shown in Figure 10-3. Compute the dc parameters listed in
Table 10-2. The dc emitter voltage will be zero V if each half of the circuit is identical and there is
no dc offset from the generator. The current in R1 can be found by applying Ohm‟s law to R1.
This current is nearly identical to ICQ because of current mirror action.
Figure 10-3
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 56

Compute the ac parameters listed in Table 10-3. Compute the maximum undistorted output
voltage (Vp) and current Ip. With dual power supplies, the output can swing nearly to positive and
negative VCC. Then compute the peak output current based on the load resistance. The ac power
is found by Pout = 0.5 Ip (out) Vp (out). By substituting for Ip, the ac power out can also be expressed
as:
V2
p(out )
Pout 
2 RL

6.
With the signal generator off, apply power, and measure and record the dc parameters
listed in Table 10-2.
Table 10-2
DC
Computed
parameter
Value
Measured Value
VE
VB1
VB2
IR1 = ICQ

Turn on the signal generator and ensure that there is no dc offset. While viewing Vout, adjust the
generator for the maximum unclipped output. Enter Vp (out) in Table 10-3.
Table 10-3
AC
Computed
Parameter
Value
Measured Value
Vp (out)
Ip (out)
P (out)
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 57
Experiment # 13
JFET Characteristics
Score:
Student Name: _________________
Student ID: ____________________
Date: _________________________
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 58
Experiment # 13
JFET Characteristics
Reading:
Floyd, Electronic Devices, Sections 7-1 through 7-2.
Objective:
1. Measure and graph the drain characteristics curves for a junction field-effect transistor (JFET).
2. Measure VGS (off) and IDSS for a JFET.
3. Connect a JFET as a two terminal constant current source to maintain constant illumination in an
LED.
Apparatus:
-
Digital multimeter
-
Project board
JFET: one 2N5458 n-channel JFET (or equivalent)
Resistors: (one of each): 100 , and 10 k
LED: one Red
Summary of theory:
The bipolar junction transistor (BJT) uses base current to control collector current. Unlike the
BJT, the field effect transistor (FET) is a voltage-controlled device that uses an electrostatic field to
control current. The FET begins with a doped piece of silicon called a channel. On one end of a channel is
a terminal called the source and on the other end of the channel is a terminal called the drain. Current in
the channel is controlled by a voltage applied to a third terminal called the gate. Field-effect transistor are
classified as either junction-gate (JFET) or insulated-gate (IGFET) devices. The JFET has a reverse-biased
diode at the gate whereas the IGFET uses a thin glass-insulating layer. Since the gate circuit of either
type of FET draws almost no current, the input resistance is extremely high. Both types have similar ac
characteristics but differ in biasing methods.
The gate of a JFET is made of the opposite type of material than the channel, forming a pn
junction between the gate and channel. Application of a reverse bias on the junction decreases the
conductivity of the channel, reducing the source-drain current. The JFET comes in two forms, n-channel
and p-channel. The n-channel is distinguished on drawings by an inward arrow on the gate connection
while the p-channel has an outward point arrow on the gate as shown in Figure 10-1.
Figure 10-1
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 59
The characteristic drain curves for a JFET shows several important differences from the BJT. In
addition to fact that the JFET is a voltage-controlled device, the JFET is a normally on device. In other
words, a reverse bias voltage must be applied to the gate source pn junction in order to close off the
channel and prevent drain-source current. When the gate is shorted to the source, there is maximum
allowable drain-source current. This current is called IDSS foe drain-source current with gate shorted.
Another important difference is that the JFET shows a region on its characteristic curve where drain
current is proportional to the drain source voltage. This region, called the ohmic region, has important
application as a voltage controlled resistance.
A useful specification for estimating the gain of a JFET is called the transconductance, which
abbreviated gm. The transconductance can be found by dividing a small change in the output current by
a small change in the input voltage. That is:
gm 
I D
VGS
Procedure:

Measure and record the value of the resistors listed in Table 10-1.
Table 10-1
Resistor
Listed
Measured
value
Value
R1
330 
R2
10 k
Figure 10-2

Construct the circuit shown in Figure 10-2. Start with VGG and VDD at 0 V. Connect a voltmeter
between the drain and source. Keep VGG at 0 V and slowly increase VDD until VDS is 1.0 V.

With VDS at 1.0 V, measure the voltage across R2 (VR2). Compute the drain current, ID, by
applying Ohm‟s law to R2. Note that the current in R2 is the same as ID for the transistor. Use the
measured voltage, VR2, and the measured resistance, R2, to determine ID. Enter the measured
value of VR2 and the computed ID in Table 10-2 under the columns labeled gate voltage = 0 V.
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 60
Table 10-2
VDS
Gate Voltage= 0 V
VR2
ID
Gate Voltage= -0.5 V
VR2
Gate Voltage= -1.0 V
ID
VR2
ID
Gate Voltage= -1.5 V
VR2
ID
1.0 V
2.0 V
3.0 V
4.0 V
6.0 V
8.0 V

Without disturbing the setting of VGG, slowly increase VDD until VDS is 2.0 V. Then, measure and
record VR2 for this setting.


Repeat step 4 for each value of VDS listed in Table 10-2.
Adjust VGG for -0.5 V. This applies -0.5 V between the gate and source because there is almost no
gate current into the JFET and almost no voltage drop across R1. Reset VDD until VDS = 1.0 V.
Measure VR2 and compute ID as before. Enter the values in Table 10-2 under the columns labeled
gate voltage = -0.5 V.

Without changing the setting of VGG, adjust VDD for each value of VDS listed in Table 10-2.
Compute the drain current at each setting and enter the voltage and current values in Table 10-2
under the columns labeled gate voltage = -0.5 V.



Now, adjust VGG for -0.1 V. And repeat above process.
Adjust VGG for -1.5 V. Repeat VDD until VDS = 1.0 V.
The date in Table 10-2 represent four drain characteristic curves for your JFET. The drain
characteristic curve is a graph of VDS versus ID for a constant gate voltage. Plot the four drain
characteristic curves on Plot 10-1. Label each curve with the gate voltage it represents.
Plot 10-1
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 61

In this step you will determine the value of VGS (off). Set VDD for + 12 V and VGG for 0 V. Monitor
the voltage across R2 and slowly increase the negative gate voltage. When the voltage across R2
reaches zero, note the gate voltage. Record this value in Table 10-3 as VGS (off). Record IDSS from
reading Plot 10-1.
Table 10-3
Measured JFET Parameters
VGS (off) =
IDSS =
Figure 10-3

In this step, you can observe a JFET connected as a two terminal constant current source.
Construct the circuit shown in Figure 10-3. Monitor the drain voltage while you increase the drain
power supply from 0 V to +15 V. Notice the drain voltage where constant current begins.
Conclusion:
Phys 162: Solid State Devices
Lab Manual (Second Edition 2005)
E.E.E.T Unit
Page: 62