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An Integrated Approach to Architecture and Operating Systems
Chapter 14
Epilogue: A Look Back at the Journey
©Copyright 2008 Umakishore Ramachandran and William D. Leahy Jr.
14.1 Processor Design
• High-level language (HLL) constructs play a key role in
instruction set design and related architectural
features of processor
HLL Construct/Feature
Architectural features
Arithmetic/logic instructions, addressing modes
Data types
Different operand granularity, multiple precision
arithmetic and logic instructions
Conditional statements, loops
Conditional and unconditional branch instructions
Procedure call/return
Stack, link register
System calls, error conditions
Traps, exceptions
Efficient execution of HLL
programs (expressions,
parameter passing, etc.)
General Purpose Registers
14.1 Processor Design
• For a given instruction set architecture there are still
choices to be made for implementation
– Pipelining and other design features for speed
– Low cost designs where performance is less important
than speed
14.2 Process
• The process is a convenient abstraction for remembering all
relevant details of a running program
• A uniprocessor can run only one program at a time
• The OS gives the illusion of each process having its own processor
to run on
• The architecture provides mechanisms, namely, trap and interrupt,
for taking control back from the currently running program to make
a scheduling decision using one of several algorithms
• Reviewed data structures needed by OS for implementing such
• Trap mechanism also allows a user level program to avail itself of
system provided utilities (such as file systems and print capability)
to enhance functionality of the program, via system calls.
• The models we provided are more simplistic than those used in real
14.3 Virtual Memory System and
Memory Management
• Memory system is crucial to performance of
processor and provides memory allocation,
protection and isolation, sharing, and efficient
memory utilization using items such as
– Fence register
– Bounds registers
– Base and limit registers
– Paging
14.3 Virtual Memory System and
Memory Management
• Need kernel mode to allow OS to setup areas
in memory for processes to use
• Need item such as page replacement policies
and working set maintenance for effficency
• Operating system must be quick…provide
resources and then get out of the way
• Sophisticated memory management schemes
require little additional hardware
14.4 Memory Hierarchy
• Related to memory systems is memory hierarchy.
• Caching systems are designed to take advantage
of temporal and spatial locality.
• Caching is used everywhere.
Multilevel memory caches
Web caches
14.5 Parallel Systems
• Parallelism is fundamental to human thinking and
therefore to algorithms and programs
• Exploiting parallelism has been a goal since the
early days of computing
• Currently multicore processors are a major are of
• Key to a computer scientist is understanding the
principles involved. Some examples
– Atomic read-modify-write primitive
– Cache coherence in a multiprocessor
14.6 Input/Output Systems
• A computer system is useless unless it can
interact with the outside world. Key concepts
– Programmed I/O
– Interrupts
– Memory mapped I/O
– Device drivers
– Disk
– Network
14.7 Persistent Storage
• Key topics include
– File systems
– Allocation strategies
– Naming and aliasing schemes
– Attributes
– Scheduling
14.8 Network
• Key hardware concepts
• Key software concepts
Protocol stacks
Sequence numbers
Scatter/gather of packets
End to end acknowledgement
14.9 Concluding Remarks
• Overall, the field of system architecture, the meeting
point between hardware and software is an intriguing
and fascinating area.
• This area is unlikely to dry up for a long time since the
application of computing in everyday life is growing by
leaps and bounds.
• To keep pace with this growth in demand, the system
architect has to continuously innovate and produce
new computing machines that are faster, cheaper,
consume less power, and offer more services.
• We hope this textbook serves as a launching pad for
future system architects.