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CHAPTER 2
ASSEMBLY AND
MACHINE LANGUAGES
The chapter contains
 Instruction Set
 Assembly Language
 Machine language and its fields
 R, I and other formats
.1 MACHINE LANGUAGE AND FIELDS
The data or instruction, in short, whatever we store inside a computer is always written in
the form of 0 and 1. If you were able to look inside any parts of the computer, you would
see nothing except 0 and 1. 0. Zero means 0 voltage and 1 means 3 voltage at a transistor
terminal. Anything whether it is mathematics or Physics or any other information, must
be written into 0 and 1 inside a computer. Writing 0 ad 1 is called machine language.
Computer understands only this language. This language is called machine language
Here we will be dealing with MIPS processor. Te reason being that instructions and data
are represented easily for MIPS processor. MIPS processor has word size of 32 bits, and
each instruction and data will therefore contain thirty-two bits.
The bits are grouped into number of fields. The fields in MIPS instruction are either 6 or
4 or 2. Te instruction are named, depending upon the numb of fields in the instruction as
shown below
Number of fields in Format by
the instruction
which the
instruction
are
remembered
6
R
R stands
register
4
I
I stands for
Immediate
2
J
J stands or
Jump
Below a 32-bit machine language instructions is given. The machine language instruction
contains 1and 0s only a you have seen. If you count it there are 32 bits in this instruction.
All instructions have 32 bits.
00000010000100011001000000100000
The above instruction is said to be given in binary form. Because it contains only two
types of bits, either 0 or 1. Binary means two types either 0 or 1.
Operation code
(op-code)
rs
rt
rd
shamt
function
26-32
21-25
16 -20
10 -15
6 -10
0-5
We have shown above 6 fields, the fields names and the number of bits contained in them
For instance the first field (counting from the right) is called function field and it
contains 6 bits from 0 to 5 (counting 0 as well). It is easy to remember that corner fields
are 6 bits long; those that are inside are 5 bits long.
Rather than write or speak 32 bits, a difficult job, , it is easy to tell what instruction bits
are, if we convert them into hex or decimal forms. It is easy to convert the bits into hex
form. In hex form the bits in each field are grouped into four bits. We may have to do the
padding to convert them into groups of 4
Let us write the above instruction of 32 bits into hex form
Function field of the above instruction = 100000 = 0010 0000 (after padding with
zeros on the left hand side to make 8 bits, I mean groups of 4) ) = 2 0 (hex form)
Function field = 100000 = 3210 ( in decimal form)
1.2 Field names are: starting from the right
 Function code
 Shamt. Shamt is made up of two words shift amount Note if you have a word
and you shift it by one bit to the left it gets multiplied by 2. You shift it again by
one bit, the original word gets multiplied by 4.
 rs is called first register source operand, because it is in the first place from
the left (see instructions field above)
 rt is called 2nd register source operand
 rd is called destination register operand
 Operation field
Operation and function fields together determine what the computer is supposed to
do and they exist at the two ends of the fields
1.3 TYPES OF INSTRUCTION
There are three types of the instructions namely R , I ad J
R
. R type instructions have 6 fields, which has been explained above
I
. I type instructions have 4 fields; the right three fields are combined into one
field. The right most field has therefore 16 bits
J type instruction have 2 fields; the right five fields are combined into one field
; it has 26 bits
J
In the following some instructions are shown along with their types
R, I and J type instruction filed.
Below 15 assembly language instructions are shown. The types of the instruction, op
code, function field codes and shamt values are shown
Note that
R types always have 3 registers
I always have two registers
J always have one registers
As is evident from table given below
Means
format
1. add
Add
R
2. sub
Subtract
R
0
3. lw
Load
word
I
35
4. sw
Store
word
I
43
5. and
And
R
0
6. or
or
R
0
7. nor
Nor
R
0
8. andi
And
immediate
I
12
name
Opcode
0
rs
rt
rd
shamt
function
Some
value
less
than 31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less tan
Some
value
less
than 31
Some
value
less
than 31
0
32
34
SOME
CONSTANT
SOME
CONSTANT
Some
value
less
than 31
Some
value
less
than 31
Some
value
less
than 31
36
37
39
SOME
CONSTANT
31
Some
value
Some
value
less tan
31
Some
value
less
than 31
31
Some
value
less tan
31
Some
value
less tan
31
Some
value
less
than 31
Some
value
less tan
31
Some
value
less tan
31
9. ori
Or
immediate
I
13
10.sll
Shift ef
logical
R
0
11.srl
Shift right
logical
R
0
12.beq
Branch if
equal
I
4
13.bne
Branch f
not equal
Set
on
less than
I
5
SOME CONSTANT
R
0
Some
value
less
than 31
Jump
J
2
14.slt
15.j
SOME
CONSTANT
Some
value
less
than 31
Some
value
less
than 31
0
2
SOME CONSTANT
42
Below are given the op-code and function code of the R instructions given in the top table
Function
Op-Code
Add
Subtract
And
Or
nor
Sll
srl
slt
Jr
0
0
0
0
0
0
0
0
0
Function
Code
32
34
36
37
39
0
2
42
8
The following 6 instruction are called arithmetic instructions because they belong to
arithmetic. Arithmetic is a branch of mathematics that deals with addition, subtraction
multiplication and division In explanation column, note that first register, $s1, is the
destination register unlike in the fields shown above where the destination register is last
of all the registers.
ARITHMETC INSTRUCTIONS
add
Code
add
Registers
$s1, $s2,
$s3
explanation
$s1=$s2+$s3
3 operands;
overflow
detected
subtract
sub
$s1, $s2,
$s3
add immediate
addi
$s1, $s2,
100
add unsigned
addu
$s1, $s2,
$s3
subtract unsigned
subu
$s1, $s2,
$s3
add immediate
add iu $s1, $s2,
unsigned
100
Let us explain the 1st , 3rd and 5th instructions
$s1=$s2-$s3
$s1=$s2+100
$s1=$s2+$s3
$s1=$s2-$s3
$s1=$s2+100
3 operands;
overflow
detected
+ constant;
overflow
detected
3 operands;
overflow
detected
3 operands;
overflow
detected
+ constant;
overflow
detected
SOME IMPORTANT INSTRUCTIONS
add $s1, $s2, $s3
It means add the CONTENTS of the register $s3 into the CONTENTS of $s2 and
place the result in register $s1. $ sign indicates we are talkig about registers in the
register file. Suppose the instruction is add $16, $17, $18, it means add
whatever is written in the register number 17 into whatever is written in the register
number 17 and put the result in register number 16.
Overflow word is mentioned in the table of instructions. Overflow will be detected by the
computer itself, if any and error message will appear. . Overflow means when the data
for destination register turns out to be more than 32 bits. Note overflow word appears
in all the instructions of the above table
In the 3rd instruction we use immediate word. That is we do not take the word form the
register. it is taken form the instruction directly. That is why it is called immediate. Such
words are also called constant. Note only two register numbers appear in these
instructions
In the 5th instruction we use the word unsigned. Remember the number are presented
inside the computer as 2’s complement or unsigned. Positive numbers and unsigned do
not pose any problem. Negative numbers do. Negative numbers are treated differently.
There is a separate instruction for the negative numbers.
2.4 The Word Size and Overflow
The MIPS processor word size is 32 bits. It means that all of its instruction are stored in
the computer processor as 32 bits long; that is when calculations are made each of the
operands must contain exactly 32 bits. If the first bit on right hand side is counted as bit
number 0, then the last bit would be bit number 31.
For quick calculation, remember if a word is 10 bits long and the word is unsigned, it
maximum value is 1K, for 20 bits, the max value is 1M, and for 30 bits the maximum is
1G. Thus if you are given unsigned word which is 32 bits long; you can immediately say
that 30 bits mean 1G, so 31 would mean 2G and 32 bits would mean 4G.
Following is another category of the assembly language. This category is called DATA
TRNSFER instructions. Because in these instructions a data is either transferred form
memory to processor or from the processor to the memory . Note there are two registers
in these instructions $s1 and $s2 and a constant number. Let us explain the first two
instructions, I mean the load word and store word
DATA TRANSFER INSTRUCTIONS
code
Registers
load word
lw
$s1, 100($s2)
explanation
$s1=Memory[$s2+100]
store word
sw
$s1, 100($s2)
Memory[$s2+100]=$s1
load half unsigned
lhu
$s1, 100($s2)
$s1=Memory[$s2+100]
store half
sh
$s1, 100($s2)
Memory[$s2+100]=$s1
load byte unsigned
lbu
$s1, 100($s2)
$s1=Memory[$s2+100]
store byte
sb
$s1, 100($s2)
Memory[$s2+100]=$s1
load upper immediate
lui
$s1, 100
$s1=100*216
Word from
memory to
register
Word from
register to
memory
Half word from
memory to
register
Half word from
register to
memory
Byte from
memory to
register
Byte from
register to
memory
Load constant in
upper 16 bits
lw $to, 32 ($s3)
The instruction means
 add constant 32 into the contents of register $s3
 reach the memory location whose address has been calculated above
 and transfer the contents from the calculated location in memory to register $t0
$s3 contains the base address of the array. The base address means the starting address of
the array. The register which contains the base address is also called index register; that
is the address where the array starts or its first element is stored. An offset 32 is added
into it and ten the word is transferred ito $t0,
SW $t0, 48 ($s3)
sw stands for the store word and it is the reverse of the load operation. It means transfer
a data from a register in the register to the memory. sw $t0, 48 ($s3) means store the
word from register t0 into memory location whose address is obtained by adding the
contents of $s3 and 48.
REGISTER SPILLOVER: If you feel that 32 registers of cache will not be enough then
the frequently used data is kept inside the register file and the less frequently used data
is placed in memory. This scheme is called register spillover.
Register $s3 is used here as a base register. The contents of base register are added to a
constant provided in assembly language instruction outside the bracket containing the
base register.
Load always transfers the data from the memory to a register in the register file and save
transfers the data in the reverse direction, that is, from a register in the register file to a
location in the main memory.
If the destination register contains a data, the load instruction will destroy it unless the
data is saved by a certain previous instruction.
lui $s1, 100
This instruction will put the decimal 100 into upper side of register $s1
Suppose we want to fill a register $s1 with a constant which has 32 bits. Unfortunately
there is no assembly language instruction available in MIPS which can accept 32 bits;
maximum they can take is 16 bits. To do so we break the 32 bit constant into RHS 16 bits
and LHS 16 bits. Suppose the LHS decimal value is 61 and RHS decimal value is 2304
RHS = 0000 0000 0011 1101 =6110
LHS = 0000 1001 0000 0000 = 230410
Now we write two instructions lui and ori instead of one, to fill the register with 32 bitsconstant
lui $s1, 61
Ori
$s1, $s1, 2304
2.10 LOGICAL
operation
and
or
nor
and immediate
or immediate
What
operation?
and
or
nor
andi
ori
The register
or constant
$s1,$s2,$s3
$s1,$s2,$s3
$s1,$s2,$s3
$s1,$s2,100
$s1,$s2,100
meaning
$s1=$s2 & $s3
$s1=$s2 ! $s3
$s1= ~($s2 ! $s3)
$s1=$s2 & 100
$s1=$s2 ! 100
shift left logical
shift right logical
sll
srl
$s1,$s2,10
$s1,$s2,10
$s1=$s2 << 10
$s1=$s2 >> 10
The “&” and “I” sign represent respectively “and” and “or” operations
In each instruction in the above table $s1, $s2, and $s3 or constant are mentioned. In
immediate instructions the constant value is given instead of $s3. “and” and “or”
operation is conducted on ($s2 and $s3) or ($s2 and constant).
sll and srl perform shifting operation on register $s2 and save the result on $s1. Thus the
destination register is always the first one in the assembly language, You must have noted
that the first register is always used a destination register not only in this type of
instruction but also in the above tables.
“and” operation applies masking a word. Only those bits of the word which we are
interested in remain unchanged, the rest become zero. For instance if we want the last 4
bit from the right (word = 1111 0101) of the word to change to “0” , the rest remaining
the same, the mask should be
Word to be masked= 1111 0101
Mask =0000 1111
After anding operation the word will become : 0000 0101 (its first 4 bits remain
unchanged and the rest become zero)
EXAMPLES
For example in 8 bits words in the following table we want the last (counting from the
left) bits of the word to become zero. AND is used to force all the bits in the LHS into
0. You decide which ones are to be converted. We prepare the mask first, say 0000 1111
and save it a certain register then use AND operation between the mask and the word.
Two examples are given below.
So the AND operation is used to Convert 1 into 0
Mask
Word
0000 1111
1111 1111
After “AND” operation
the word becomes
0000 1111
OR operation is used to convert a group of bits in “1” Let us prepare a mask : 0000
1111
Mask
Word
1111 1111
1111 1111
After “or” operation the
word becomes
1111 1111
NOT operation reverses each bit: 1 becomes 0 ad 0 becomes 0. No instruction is issued to
the computer; computer knows what to do. NO mask is prepared
0000 1111
1111 0000
NOR operation (Nor operation): it means first do the OR operation and then NOT
Word1
0000 0000
1111 0000
Word 2
1010 0111
1010 0111
NOR
0101 1000
0101 1000
To remember it use the following :
AND mask is used to convert certain bits a word which were 1 into zero
OR mask is used to convert certain bits a word which were 0 into one
NOR mask is used to convert certain bits a word which were 1 into zero
2.11 CONDITIONAL BRANCH. There are 6 instructions in this category which are
given below in the tabular form. There is always a condition given in the branching
instruction. This condition is given in the bracket on explanation side. If the condition is
satisfied, that is it is true, then the operation will be performed otherwise no operation is
performed. In case the operation is not performed the processor will go on its normal
route,
branch on equal
beq
$s1,$s2, 25
branch on not equal
bne
$s1,$s2, 25
set on less than
slt
$s1,$s2,$s3
set on less than
immediate
set less than
unsigned
set less tan immediate
unsigned
slti
$s1,$s2, 100
sltu
$s1,$s2,$s3
sltiu
$s1,$s2, 100
2.12 UNCIONDITINAL JUMP
jump
jump register
jump ad link
EXAMPLE
j
jr
jal
j 2500
jr $ra
jal 2500
if ($s1= =$s2) goto
PC+4+100.
if ($s1 != $s2) goto
PC+4+100.
set $s1 to 1 if ($s2 <
$s3) else make it zero
set $s1 to 1 if ($s2 <
100) else make it zero
set $s1 to 1 if ($s2 <
$s3) else make it zero
set $s1 to 1 if ($s2 <
100) else make it zero
Note 25
translates to
25*4=100
,, ,, ,,
Does any problem of the word even the novel of love or war can be written into
assembly language. Certainly it is not possible to write the novel into assembly language.
because the assembly language instructions are broken down into 5 categprie,
2.14. DECISION MAKING/ IF ELSE THEN/
CONDITIONAL JUMP/ UNCONDITIONAL JUMP
Often you have to make decision for instance:
If I is equal to j, the add h into j; if I is not equal to j then subtract h from j,
diagrammatically it can be shown as below and the assembly language will be
beq $s1, $s2, L1
# if contents of $s1 and $s2 are equal then branch to instruction
which has been labeled L1; else continue with the next instruction
The computer finds it easy to do it in the reverse direction.
bnq $s1, $s2, L1
# if contents of $s1 and $s2 are not equal then branch to L1; else
continue with the next instruction
There is another thing which is called unconditional Jump. This is unconditional
because there is no condition to be tested. Branching must take place. To distinguish
conditional form unconditional, the unconditional jump has been named as
J exit
When the program reaches this instruction
the jumping takes place to exit whatever.
REGISTER NAMES
$zero
$vo-$v1
$a0 to $a3
$t0- to $t7
$s0- to $s7
$t8- to $t9
$gp
$sp
$fp
0
2-3
4-7
8-15
16-23
24-25
28
29
30
Global pointer
Stack pointer
Frame pointer
$ra
31
Return address
EXAMPLE
Instruction 1 &4 work together. The LOOPING continues until $s3 and $s5 are
equal. When they become equal the LOOP is broken and the execution starts from
EXIT onward
The instruction are executed in a loop and the loop continues as long as the
condition is not satsfied
$s3 contains the memory locations. $S3 is converted into instructions by multiplying
with 4. Then $s6 is added into it because s6 contains the jump size. And then
transferred to $t0. Now $to is compared to “exit location”
1)
LOOP
: sll $t1 , $s3, 2
2)
add
$t1, $t1 ,$s6
3)
lw
$to, 0($t1)
4)
bne
$t0, $s5 ,exit
5)
6)
7)
Addi
J
Exit :
$s3,$s3,i
Loop
Multiply $s3 by 4 and
put in $t1
Add $t1 and $s6 and
put in $t1
Put $t1 in $t1
If $t0 and $s5 are not
equal then go to
EXIT
Jump to loop
Multiply $s3 by 4 and put in $t1
Add $s6 into $t1 and put in $t1
Put $t1 in $t1
If $t0 and $s5 are not equal then go to EXIT
Jump to loop
2.16 STACKS / PROCEDURE / FUNCTION
Your program executes the instruction in order. That is, first it executes instruction #1,
then instruction #2, then instruction #3, then instruction #4 and so on. Such execution is
called sequential. All the program run sequentially. Often during the program’s
sequential run, the program has to leave its sequence and make a jump to another short
program to get its job done. The program it jumps to is called procedure or function,
The program form where jump is made is called caller and the procedure it jumps to is
called callee. A caller, say, has been written by you to do addition of a very long list of
numbers and somewhere in the middle of your program you require program to do
multiplication of two numbers and then do addition. The jump is made to the callee
which has been written to do multiplication of two numbers. This strategy, to go to a
callee for multiplication of two numbers has at least one advantage. You do not have to
write instructions for multiplication. If you have to write so, your program will become
bigger in size; you may also make certain errors in multiplication instruction. Why blither
for multiplication of two number if a certain program had already been written and it has
been well tested. Always the programmer swill do this. The will use short programs
written by others to get the jobs done. Before your program makes a jump to another
program called procedure following things must be doine
1. The data to callee must be provided by the caller upon which it has to do work.
2. The data must be placed where the callee can have access to. In fact four registers
have been reserved for this purpose and they are called $a0, $a1, $a2 and $a3. a
stands for the XXX
3. Then caller should be called to do its work; The caller calls callee by issuing
instruction jal XXX The jal stands for jump and link and giving instruction
number to which jump should be made.
4. The calle would evidently want few registers to use. These register may already
be in use by the caller. So they are saved first so that when callee finishes its job
the original values of the registers be restored. If there are, say, ten registers to be
saved we will save them,. In MIPS these register same 10 in n e rand they are
designated $s. S stand for saved registers,
5. The callee, after finishing its jib tells the caller to resume its job as it has finished
its work. To do this callee follows the instruction
6. Jr XXX. The jr stands for jump to register whose address is given by XXX.
2.17 Nested Procedure
If a caller has called procedure #1 and before procedure#1 is complete, procedure #1 calls
another procedure #2, it will be called a case of nested procedure; the procedure #2
before its completion may call another procedure #3; so on and so forth. Nested
procedures are not uncommon. The point to remember in the case of nested procedure is
how to save the registers in the stack so that when a certain procedure finishes its task
and goes to its caller it should present the exactly the same environment to the.
Diagrammatically the nested procedure can be shown like
Picture
2.18 ADDRESSING MODES
There are plenty of addressing mode; five of them are important, and they are mentioned
below
1.
2.
3.
4.
5.
Register Addressing
Base or Displacement addressing
Immediate Addressing
PC relative Addressing
Pseudodirect Addressing
These modes can best be described diagrammatically
Mode
Register addressing
Base
or
addressing
Diagram
Explanation
All three operands are in
registers
Two operands are in
registers and the third one
is a constant.
Two operands are in
registers and the third one
is a constant
Pc address is formed
Displacement
Immediate Addressing
PC relative Addressing
Pseudodirect Addressing
JUMP and unconditional branch INSTRUCTIONS
j
jr
jlr
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
The figure below shows the breakup of the machine language instruction into six fields.
To explain the operation of a processor on a machine language instruction we give below
once again a machine language instruction of add.
1st field;
6 bits long;
Op field;
Instr [31:26]
Fig. 4.3.
2nd field;
5 bits long;
Register rs;
Instr [25:21]
3rd field;
5bits long;
Register rt;
Instr [20:16]
4th field;
5 bits long;
Register rd;
Instr [16:12]
5th field;
5 bits long;
Shamt;
Instr [11:7]
6th field;
6 bits long;
Function;
Instr [6:0]
The register rs and rt are called the first source register and the second source register
respectively in this instruction and rd is called destination register . You would have
noted that the sequence is different in the assembly language instruction. In machine
language instruction destination register comes last of all the three register whereas in the
assembly language instruction it come first of al the three registers
4.3 UNDERSTANDING THE REGISTER FILE OF THE DIAGRAM
Taken out
EXERCISE
Below is given a traditional loop in C language.
Convert it into first assembly language and then into
machine language
The loop in C language is
while (save[i] = = k)
i += 1
The C language program is repeatedly looping across a certain number of
instructions. Each time it completes one loop, the program adds 1 into i. When i and
k become equal, the looping stops.
Variables contained
$to, $t1, $s3, $s5, $s6, EXIT
ASSUME THAT
$s3 contains i,
$s5 contains k, and
$s6 contains the Base of the Array
We convert the above program in assembly language first
SR # Instruction
meaning
1. Loop: sll $t1, $s3, 2
Multiply i by 4 because we are dealing with
instructions which have four bytes.. Put the
result into $t1.
2.
add $t1, $t1, $s6
3.
lw $t0, 0($t1)
Shifting the contents of $s3 by 2 means
multiplying the contents of $s3 by 4.
Add the contents of $s6 into the contents of
register $t1 and leave the result in t1.
Add 0 into contents of $t1 and put the result
in $t0. This is in effect just transferring the
4.
5.
bne $t0, $s5, Exit
addi $s3, $s3, 1
6.
7.
j Loop
Exit
8000
sll $t1,
$s3, 2
0
19
9
0
9
$s3
22
$t1
9
opcode
35
$t1
9
$s6
8
$t1
Opcode
5
$t1
8
$t0
21
2
Opcode
addi
8
$s3, $s3,
1
opcode
jump
2
$t0
19
$s5
19
1
$s3
$s3
8004
add $t1,
$t1, $s6
8008
lw $t0,
0($t1)
8012
8016
8020
bne $t0,
$s5, Exit
0
value of $t1 into $t0
If $t0 and $t5 are not equal then go to EXIT.
Add 1 into the contents f $s3 and leave the
result in $s3
Jump to Loop
4
0
Mutiply by
4
0
32
0
2000
opcode
8024
EXERCISE
Write down the assembly language instructions for the following high level language
instruction
g = h + A[8]
Where h is a variable whose value has been given. A is the base address of a certain
array and we add its 8th element and the variable h and put the result into register g
We suppose that:
$s1 should contain g
$s2 contains h
$s3 contains base of the array A
8 is the 8th element of the array A
$t0 is used for calculation
ASWER
lw $to, 8 ($s3)
add $s1, $s2, $to
8004
8004
lw $t0,
8($s3)
.
35
19
8
opcode
0
$s3
18
$t0
8
17
$s2
$t0
$s1
add
$s1, $s2,
$t0
opcode
0
32
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
Register file as shown in the figure is shown with 4 bullet points on the left and two
bullet-points on the right. On the left hand side automatically top two bullet points
receive the two register addresses whose contents appear on the right hand side bullet
points as shown in the diagram below. The 3rd point, on left had side, receives the
register number for write-up whose contents should be applied to the 4th point ( as in the
load instruction) The). Also note that the as you go from the bottom to the top along the
bullet points the bits as applied go in order from below to the top. Thus
top bullet point
2nd bullet point
3rd bullet pint
4th bullet point
Fig 4.4.
[21-25]
[16-20]
[11-16]
Data for writing
The bits [ 26-31] are not applied to the register block. They enter control block.
The instruction filed are systematic in their applications.
In the case of R type instruction (ADD, SUB, AND, OR, NOR, SLT etc) 2nd, 3rd and 4th
fields get applied to it. The 15 bits are to go inside the block. Nothing as constant and 6
bits go to the top of the block outside it
In the case of I type which has 4 fields (like load and store instructions) 10 bits are to
be applied inside the block. Fifteen bits are applied as constant and are shown below
register block.
R type instruction; R stands for the register, All the instructions given in the following
table have three registers $s1, $s2 and $s3.
Operation
instruction
meaning
add
sub
and
or
nor
slt
add $s1, $s2, $s3
sub $s1, $s2, $s3
and $s1, $s2, $s3
or$ s1, $s2, $s3
nor $s1, $s2, $s3
slt $s1, $s2, $s3
$s1=$s2 + $s3
$s1=$s2 - $s3
$s1=$s2 & $s3
$s1=$s2 ! $s3
$s1=$s2 ~!$s3
If ($s2 < $s3) then $s1 = 1
else $s1=0
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
First of all, the processor reaches the Program counter and reads its content; It then
approaches instruction repository and gives it the instruction number. The repository
output is the instruction itself. This gets applied to the register file in such a way that each
field of the instruction automatically gets applied to relevant part of the register file
shown in the diagram. The field of instruction [25:21] gets applied to rs part, The field
of instruction [20:16] gets applied to rt part, and so on. In fact all the 7 instruction which
require three registers or which are of type R can perform very well on the above diagram
shown in fig 4.1
If the instruction is of such a type like lw as shown in the following table then the
diagram would look like the one given below.
1st field;
6 bits long;
Op field;
Instr [31:26]
The value of
this field is 35
2nd field;
5 bits long;
Register rs is
the base
register
Instr [25:21].
In assembly
language it is
called $s2
3rd field;
5bits long;
Register rt is the
destination register
16 bits address
Instr [20:16].
In assembly
language it is
called $s1
Fig. 4.6.
The assembly language instruction are as below for the load instruction
instruction
meaning
lw $s1 = 100 ($s2)
$s1 = Memory [$s2 + 100]
sw $s1 = 100 ($s2)
Memory [$s2 + 100] =$s1
Fig. 4.7.
The load instruction adds the contents of $s2 and 100. 100 is first converted into a 32 bit
word a then added into the contents of $s2
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
Remember restrictions when converting a number into 2’s complement? These
restriction are again shown below.
Restrictions: for 4-bit word size the maximum positive (or unsigned number) we can
write in 2’s complement is : 2n-1 -1 where n= 4 for word size 4.
In this case the maximum is 7. another way of quickly telling the maximum number
which can be converted into 2’s complement is . . . . ( 1000)
Similarly : for 8-bit words the maximum positive or unsigned number we can write in 2’s
complement is : 2n-1 -1 where n=8 for word size of 8. In this case the maximum is 127.
Some examples of converting decimal number into 2’s complement are given below.
Note that:
Word size has been mentioned as 8
All the words given in the table below are within limits . That is the words are less
than +127 and -128 and they conform to the restrictions
Word (in
decimal) or
radix 10
Binary representation in 8
bits
2’s complement
+5
-5
0000 0101
1111 1011
+128
0000 0101
+5
= 0000 0101
Invert = 1111 1010
Add 1 = 1111 1011
So -5 = 1111 1011
0000 0111
+7 = 0000 0111
Invert= 1111 1000
Add 1= 1111 1001
So -7 is 1111 1001
0111 1111
+127 = 0111 1111
Invert= 1000 0000
Add1= 10000 0001
Beyond the limit
-128
---
+7
-7
+127
-127
XXXXXXXXXX
0000 0111
1111 1001
0111 1111
10000 0001
--1000 0000