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IET Generation, Transmission & Distribution
Research Article
Improved equal current approach for reference
current generation in shunt applications under
unbalanced and distorted source and load
conditions
ISSN 1751-8687
Received on 13th April 2014
Accepted on 13th August 2015
doi: 10.1049/iet-gtd.2015.0753
www.ietdl.org
Snehal Panjabrao Gawande 1 ✉, Manoj R. Ramteke 2, Nivedita Pande 3
1
Yeshwantrao Chavan College of Engineering, Nagpur, India
Visvesvaraya National Institute of Technology, Nagpur, India
3
Rajiv Gandhi College of Engineering and Research, Nagpur, India
✉ E-mail: [email protected]
2
Abstract: This study emphasises on a new comprehensive approach for generating the reference compensator currents
for distribution static compensator (DSTATCOM) under unbalanced and distorted source and load conditions. A shunt
connected DSTATCOM is configured using a three level neutral point clamped inverter topology to achieve load
compensation. The behaviour of shunt compensator is analysed using synchronous detection method (SDM) and its
different approaches. To overcome the drawbacks of SDM, improved equal current (IEC) SDM with the extraction of
fundamental positive sequence component is proposed. Moreover, the performance of the proposed algorithm is
compared with the most robust and widely accepted instantaneous reactive power theory. The proposed control
algorithm works more effectively under magnitude and phase unbalance as well as distorted source conditions. The
detail simulation and experimental results are presented to validate the superiority of the proposed method.
1
Introduction
Recently, a couple of developments have been reported regarding the
number of custom power devices to alleviate the power quality
disturbances in the distribution networks. The quality of power in
the three-phase, four-wire system is largely contaminated due to
increase in the number of sensitive loads. Therefore, to enhance
the performance of distribution network, distribution static
compensator (DSTATCOM), a shunt connected custom power
device [1] is suggested as the most preferred solution.
The performance of the shunt compensator not only depends on
dc link or interface inductor but also on the control strategy used,
which can provide effective compensation under the unbalanced
and distorted load (and source). Various control algorithms such as
instantaneous PQ theory, synchronous reference frame (SRF)
theory [2], averaged global control (AGC) theory and
instantaneous symmetrical component (ISC) theory etc., are
proposed in the literature [3]. Instantaneous PQ theory and their
derived versions proposed in [4–9] have certain limitations
concerning the percentage total harmonic distortion (THD). All the
above said algorithms are well-established to operate under the
unbalanced and distorted load conditions. However, the
generalised approach of these control strategies is unable to deal
with the unbalance and distortions in the source voltages.
Moreover, these concepts have certain limitations such as
decomposition of current into orthogonal components instead of
power components and limitations to ideal compensation when
particular source power factor (PF) is desired. A synchronous
detection method (SDM) has been developed [10–13], to alleviate
the problems of earlier mentioned algorithms, which includes three
different approaches, that is, equal current (EC), equal power (EP)
and equal impedance method. All the three methods are competent
enough to compensate only for source magnitude unbalance but
are incapable to mitigate the phase unbalance and distortions in
the source. Moreover, for generating compensator reference
currents it requires synchronisation of all the three phases. To
IET Gener. Transm. Distrib., pp. 1–11
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enhance the EC approach, a modified EC criterion is proposed
[13]. However, this algorithm can only compensate for source
magnitude and phase unbalance and not for the source distortions.
Moreover, to contend with the distortions in the source voltages,
ISC theory along with the extraction of positive sequence
components is suggested. This algorithm works efficiently under
the distorted source condition but with slightly higher THDs in the
source currents.
Therefore, to overcome the limitations of the algorithms cited
above, in this paper, improved equal current (IEC) SDM with the
extraction of fundamental positive sequence component is
proposed. Moreover, to show the effectiveness of the suggested
scheme, the performance is compared with the other two
approaches of SDM and most yardstick instantaneous active
reactive power (PQ) theory. An extensive digital simulation and
experimental results are provided to prove the supremacy of the
proposed algorithm over the other approaches.
2
System configuration
Three-phase, four-wire (3p4w) system of 400 V (L-L) comprising of
three-level neutral point clamped (NPC) [14, 15] based
DSTATCOM structure is shown in Fig. 1. The compensator is
connected in shunt at the point of common coupling (PCC) via
interface reactor, Rf + jXf. At PCC, along with the compensator,
source and loads are connected. The unbalance is introduced
through the unbalanced ac load and the non-linearity is produced
by the three-phase uncontrolled rectifier drawing a current of 1.83
A. However, the different source conditions are considered to
analyse the compensator performance.
The switching signals for the three-level NPC inverter are
generated using hysteresis current control [16] because of its ease
of implementation, peak current limiting capability, load
independence and better dynamic performance. For three-level
switching, a zero voltage level should be applied at appropriate
1
Fig. 1 DSTATCOM compensated system
Fig. 2 Switching dynamics and control
a Switching dynamics of three-level NPC VSI and switching pulses
b Control scheme for proposed algorithm
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Table 1 System parameters
System parameters
as (3)
Values (ratings)
Plavg = Vsa isa + Vsb isb + Vsc isc
balanced: 325.269 V (peak-to-peak) each,
magnitude unbalanced: Vsam = 325.269 V, Vsbm =
390.269 V, Vscm = 260.269 V phase unbalance: + 20°
(phase-b), −30° (phase-c) distortion: 2nd and 3rd
harmonics
unbalanced R-L loads
Za = 150 Ω, 100 mH Zb = 75 Ω, 100 mH Zc = 45 Ω,
10 mH
non-linear load
three phase uncontrolled rectifier feeding load of
300 Ω, 100 mH
1 Ω, 30 mH
interface inductor (Rf,
Lf )
2200 µF (each)
DC capacitors (Cdc)
DC-link voltage
Vdcref1 = Vdcref2 = Vdc = 500 V, Vdcref = 1000 V
hysteresis band (±h)
±0.2 A
dead zone (±δ)
±0.05 A
PI controller gains
Kp = 0.05, Ki = 0.005
(3)
supply voltages
instants. A dead band (δ) is introduced in hysteresis band (h) to avoid
switching towards two-level. Keeping δ always lower than h,
minimises the tracking error. If ‘S’ is the switching function, then
the generalised gating pulse generation logic for three-level NPC
inverter is given by (1).
⎫
If (ii ref − ii ) . 0 then,
⎪
⎪
⎪
⎪
For (ii ref − ii ) ≥ h, S = 1
⎪
⎪
⎬
For (ii ref − ii ) ≤ d, S = 0
Else if (iiref − ii ) , 0 then,
⎪
⎪
⎪
For (ii ref − ii ) ≤ −h, S = −1 ⎪
⎪
⎪
⎭
For (ii ref − ii ) ≥ d, S = 0
(1)
Reference current generation algorithm
Synchronous detection method
As discussed earlier, the control algorithms such as SRF, AGC, ISC
theory etc. are not viable under unbalanced and distorted source
voltages. Thus, SDM is generally implemented, which can offer
better compensation profile under such conditions, to certain
extent. Two approaches of SDM-EC and EP [10–13] are employed
in this paper and briefly explained in the following section.
3.1.1 EC criteria: In EC approach, it is assumed that the peak
magnitude of source currents should be equal after compensation,
that is,
Isam = Isbm = Iscm = Ism
(2)
The average load power (Plavg) supplied by the source can be written
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(4)
where, Vam, Vbm, Vcm are the peak values of system voltages and
VT = Vam + Vbm + Vcm
Hence, reference compensating currents are expressed as (5)
which can be extracted by subtracting the reference source currents
from the load currents.
⎫
i∗ca = ila − i∗sa ⎬
i∗cb = ilb − i∗sb
⎭
i∗cc = ilc − i∗sc
(5)
3.1.2 EP criteria: EP criterion follows the assumption that, after
compensation, each phase is to be loaded with equal real power.
Thus
(6)
where, Plavg is the average value of the real power and is expressed as
(7)
Plavg = Vsa isa + Vsb isb + Vsc isc
(7)
Real power of each phase is computed by considering the peak
values of system voltages as shown in (8)
⎫
Plavg ∗Vam
⎪
⎪
⎪
⎪
Vam + Vbm + Vcm ⎪
⎪
⎪
⎬
Plavg ∗Vbm
Pb =
⎪
Vam + Vbm + Vcm ⎪
⎪
⎪
⎪
Plavg ∗Vcm
⎪
⎪
Pc =
⎭
Vam + Vbm + Vcm
Pa =
Control of DSTATCOM is mainly subjected to the control algorithm
used for the extraction of reference compensator currents to improve
system performance. Amongst the various control strategies, the
performance of SDMs has been investigated as an example. The
effectiveness of proposed algorithm is analysed and compared
with well-established PQ theory and existing SDM approaches,
under different source and load conditions. Further, the
formulation of synchronous detection approaches and an IEC
criterion are also discussed.
3.1
⎫
2Plavg
⎪
∗Vsa ⎪
⎪
⎪
⎪
Vam ∗VT
⎪
⎪
⎬
2P
lavg
∗
isb =
∗Vsb
⎪
Vbm ∗VT
⎪
⎪
⎪
⎪
2P
⎪
lavg
∗
⎭
isc =
∗Vsc ⎪
Vcm ∗VT
i∗sa =
Pa = Pb = Pc = Plavg /3
where ii = ia, ib, ic and iiref = iaref, ibref, icref are the actual, reference
compensator currents for a, b, and c phases, respectively and
(iiref–ii) is the error signal. The hysteresis modulation technique
helps to achieve the desired three levels (Vdc1, 0, −Vdc2). The
switching dynamics and the switching states obtained using (1) are
shown in Fig. 2a. The system parameters used for study are given
in Table 1.
3
Therefore, the reference source currents are given as (4)
(8)
As a result, reference source currents are obtained by using following
relation
⎫
2Pa ∗Vsa ⎪
⎪
⎪
⎪
2
⎪
Vam
⎪
⎪
2Pb ∗Vsb ⎬
∗
isb =
2
Vbm
⎪
⎪
⎪
⎪
2Pc ∗Vsc ⎪
⎪
∗
⎪
isc =
⎭
2
Vcm
i∗sa =
(9)
Using (9), reference currents are generated as
i∗ck = ilk − i∗sk
(10)
where, k = a, b, c.
Here, it is important to note that the EC and EP criteria are valid
only under the state of magnitude unbalance in source voltages.
However, these two approaches are not feasible due to their
unsatisfactory performance, when the phase unbalance as well as
distortions exists in the source. Moreover, it do not compensate for
the zero sequence current flowing into the system through neutral
3
Fig. 3 System performance using EC criteria
a Compensated source currents under balanced source condition
b Compensated source currents under source magnitude unbalance
c Compensated source currents under source phase unbalance
d Compensated source currents under source distorted condition
current. The major drawback of SDM approaches is that, it requires
the synchronisation of all the three phases, which is found to be very
difficult when the source voltages are distorted. To verify this, the
system performance is analysed using EC and EP criteria, in
Section 4.
Similarly, in case of the generalised forms of ISCT, AGC,
SRF etc., additional modifications are needed to achieve better
compensation under unbalance and distortion in the source
voltages.
Using (11), in general, the total average load power is written as
3.2
If source magnitude and phase unbalance exists, then the average
load power obtained will be
Proposed IEC criterion
To overcome the limitations of EC, EP criteria and other algorithms,
here, an IEC approach with the extraction of fundamental positive
sequence component is proposed. The suggested algorithm is
formulated using the combination of modified EC method and ISC
theory. In this algorithm, the overall dependency of magnitude
unbalance, phase unbalance and distortion in source is taken into
account. The average unbalance in the source voltage magnitude is
computed by considering the desired phase angle between source
voltage and the compensated source currents. Hence, the algorithm
can effectively compensate for the unbalance in magnitude and
phase of the source voltages. The ISC theory, based on the
positive sequence components of source voltages is found to be
more beneficial in case of source voltage distortion. Therefore, to
handle the distortion in the source voltages, the fundamental
positive sequence components of the source voltages obtained
from the modified EC criteria, are extracted. Further, these
fundamental positive sequence components of the source voltages
are used to generate desired compensator reference currents using
ISC theory. A detailed control diagram of the suggested scheme is
shown in Fig. 2b.
As per EC criterion discussed earlier, magnitude of the source
currents should be equal after compensation. Hence,
1
1
1
Plavg = Vsam Isam cos u + Vsbm Isbm cos u + Vscm Iscm cos u
2
2
2
1
1
1
= Vsam Ism cos u + Vsbm Ism cos u + Vscm Ism cos u
2
2
2
∗
1
∗
∗
= Ism cos u Vsm
+ Vsm
+ Vsm
2
(12)
3
∗
cos u
Plavg = Ism Vsm
2
1
Plavg = [Vsam Isam cos u + Vsbm Isbm cos (u + db )
2
+ Vscm Iscm cos (u + dc ]
Using (11), we can have
1
Plavg = Ism [Vsam cos u + Vsbm cos (u + db ) + Vscm cos (u
2
+ dc )]
(11)
(14)
∗
Vsam, Vsbm, Vscm are the peak values of system voltages and Vsm
is
the reference peak value of the source voltage. θ is the Phase
angle between source voltage Vsa and source current Isa and angles
δb, δc indicate phase unbalance with respect to phase-a in source
voltages of phase-b and phase-c, respectively.
Equating (12) and (14) we get
1 Vsam cos u + Vsbm cos (u + db ) + Vscm cos (u + dc )
3
cos u
1
= Vsam + Vsbm gb + Vscm gc
3
(15)
∗
=
Vsm
∗
Vsm
Ism = Isam = Isbm = Iscm
(13)
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Fig. 4 System performance under balanced source voltages
a Balanced source voltages
b Uncompensated load currents with neutral current
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
where,
gb =
currents fully distortion free. Hence, to remove source distortion,
the algorithm is expanded with the extraction of fundamental
element of positive sequence component from the source voltages.
The fundamental positive sequence components of the source
voltages which are exactly balanced are given by (17).
cos (u + db )
cos (u + dc )
, gc =
cos u
cos u
Thus, balanced source voltages for each phase are computed as
⎫
∗
sin wt
Vsa∗ = Vsm
⎬
∗
Vsb∗ = Vsm
sin (wt − 2p/3)
⎭
∗
Vsc∗ = Vsm
sin (wt + 2p/3)
(16)
Using (16), the suggested scheme can eliminate phase unbalance and
magnitude unbalance completely, but it is unable to make source
⎫
Vsa1 = Vsa∗ sin wt
⎪
⎪
⎪
⎪
⎪
2p
∗
Vsb1 = Vsb sin wt −
+u ⎬
3
⎪
⎪
⎪
2p
∗
⎪
Vsc1 = Vsc sin wt +
+u ⎪
⎭
3
(17)
Fig. 5 System performance under magnitude unbalance in source voltages
a Unbalanced source voltages
b Uncompensated load currents with neutral current
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
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5
Fig. 6 System performance under phase unbalance in source voltages
a Unbalanced source voltages
b Uncompensated load currents with neutral current
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
As this criterion is based on ISC theory [17], using (17), the
generated reference compensator currents given by (18)
⎫
V + b Vsb1 − Vsc1 ⎪
⎪
P
+
P
i∗ca = ila − i∗sa = ila − sa12
lavg
loss ⎪
⎪
2 + V2
⎪
Vsa1 + Vsb1
⎪
sc1
⎪
⎬
⎪
V
+
b
V
−
V
sb1
sc1
sa1
∗
∗
Plavg + Ploss
icb = ila − isb = ilb − 2
2
2
⎪
Vsa1 + Vsb1 + Vsc1
⎪
⎪
⎪
⎪
⎪
V
+
b
V
−
V
⎪
sc1
sa1
sb1
∗
∗
⎪
icc = ilc − isc = ilc − 2
+
P
P
⎭
lavg
loss
2 + V2
Vsa1 + Vsb1
sc1
(18)
The above algorithm is found to be working efficiently under the
distorted source condition also. In addition to this, the suggested
algorithm can explicitly set the PF angle to any desired value,
which is not provided in EC and EP criteria. Both these criterion
are restricted only for the unity power factor (UPF) operation.
Further, the proposed algorithm only needs the synchronisation of
any one phase to realise the positive sequence voltages. Moreover,
the IEC algorithm provides an alternate positive sequence
extraction (ISC) theory based approach, which is proved to be
more efficient than the direct use of positive sequence component.
4
Simulation studies
Figs. 3a–d indicate the performance of EC approach under balanced
source, source magnitude unbalance, source phase unbalance and
source distortion, respectively. It can be seen from Figs. 3a and b
Fig. 7 System performance under distorted source voltages
a Distorted source voltages
b Uncompensated load currents with neutral current
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
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Fig. 8 System performance under magnitude unbalance, phase unbalance and distortion in source voltages
a Unbalanced and distorted source voltages
b Uncompensated load currents with neutral current
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
that the basic EC criteria can effectively compensate the load
unbalance, distortion and the source magnitude unbalance.
However, it is unable to mitigate the source phase unbalance and
distortion, as evident from Figs. 3c and d. In case of source
phase unbalance, the compensated source currents become
sinusoidal with equal magnitude but, the unbalance in the source
current persist. Moreover, in case of source distortion, the source
currents still remain distorted. Further, when system is again
analysed using EP criterion, its behaviour is observed to be
similar to EC approach in all respects. Therefore, it can be
understood that, EC and EP criteria can compensate only for
magnitude unbalance in source voltage. Since, it cannot remove
the source phase unbalance and distortion; it will also not provide
simultaneous compensation for source magnitude, phase
unbalance and distortion.
Amongst the various earlier proposed algorithms, instantaneous
PQ theory [4–9] is considered as a benchmark for reference
current generation. Moreover, it is most robust and widely used
algorithm. This algorithm can effectively compensate the load
unbalance and distortion, however, the basic approach of this
theory fails to compensate the source unbalance and distortion. To
prove this and to show the efficacy of the proposed IEC approach,
Fig. 9 Schematic of hardware implementation
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Fig. 10 Experimental results under balanced source
a Balanced source voltages
b Uncompensated source currents
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
a comparative study has been carried out under different source
conditions with load always unbalanced and distorted. Fig. 4
shows set of results for initial balanced source condition. It is
observed from Figs. 4a–b that source voltages are balanced and
sinusoidal with peak magnitude of 325. 269 V (each), however,
before compensation the load currents are unbalanced and
distorted. When DSTATCOM is applied with reference currents
generated using PQ theory the source currents becomes exactly
balanced and sinusoidal with almost zero neutral current and UPF,
as depicted in Fig. 4c. The similar performance can be evident
from Fig. 4d for the proposed algorithm, indicating that the
proposed algorithm works similar to PQ theory under balanced
source condition satisfactorily compensating the source currents.
Under the magnitude unbalance in the source with ± 20% source
voltage magnitude unbalance, such that Vsam = 325.260 V, Vsbm =
390.269 V, and Vscm = 260.269 V for 400 V L-L voltage, the
corresponding source voltages and load currents are shown in
Figs. 5a and b, respectively. It is seen from Fig. 5c that the PQ
theory is unable to remove magnitude unbalance showing poor
compensator performance. On the contrary, the proposed algorithm
Fig. 11 Experimental results under source magnitude unbalance
a Unbalanced source voltages
b Uncompensated source currents
c Compensated source currents using PQ theory
d Compensated source currents using proposed
works well providing exactly balanced and sinusoidal source
currents as shown in Fig. 5d. Further, it also compensate for
neutral current and UPF.
When there exist phase unbalance in source voltages, the
compensator performance is evaluated for both approaches, for
which the phase unbalance of 20° in phase-b and −30° in phase-c
with respect to phase-a source voltage is taken into account. The
corresponding source voltages and load currents are depicted in
Figs. 6a–b. Similar to EC approach, the PQ theory also do not
provide satisfactory compensation, rather badly distorting the
source currents as shown in Fig. 6c. After compensation the THDs
in source currents are observed to 25.4%, 28.2%, and 28.7% in
phase-a, phase-b and phase-c, respectively. However, it is
observed from Fig. 6d that the proposed algorithm removes all the
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Fig. 12 Experimental results under source phase unbalance
Fig. 13 Experimental results under distorted source
a Unbalanced source voltages
b Uncompensated source currents
c Compensated source currents using PQ theory
d Compensated source currents using proposed
a Distorted source voltages
b Uncompensated source currents
c Compensated source currents using PQ theory
d Compensated source currents using proposed algorithm
phase unbalance making the source currents balanced and
sinusoidal.
The algorithms are also checked under distorted source voltages as
shown in Fig. 7a with the addition of second and third harmonics in
each phase. It is seen that the PQ theory does not work retaining the
source and load distortions as shown in Fig. 7c. On the other hand,
proposed algorithm provides balanced source currents free from all
distortions.
Finally, the system performance for the proposed EC approach is
evaluated under the worst condition when there is magnitude
unbalanced, phase unbalance and distortion in the source voltages
with load unbalanced and distorted. Figs. 8a and b indicate the
source voltages and load currents for this condition. It is observed
that the proposed algorithm is suitable to compensate all kind of
unbalance and distortions as compared with PQ theory as it is
effectively evident in Figs. 8c and d. For all the results shown
above, voltage is scale down by factor 30.
The notches and spikes observed in source current waveforms are
primarily due to the finite value of interface inductance. Another
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reason for notches to appear is the sudden change in the load
currents credited to switching of three-phase bridge rectifier (use to
realise non-linear load). Because, when there is abrupt change in
the load currents, the compensator currents cannot change
instantaneously due to present interface reactor. It is to be noted
that for all the source conditions the load is assumed to be
unbalance and distorted.
5
Experimental results
The detailed design and implementation aspects of the hardware
set-up using DSP are illustrate in Fig. 9. DSP
TMS320F2812PGFA operating at 150 MHz can be used for
processing. The Hall Effect voltage and current sensors (LEM LV
25-P, LEM LA 55-P) are used to sense and process the phase
power quantities to suit the DSP application (±5 V). These are
further converted to 0–3 V range using signal conditioning circuit,
9
Table 2 Comparative evaluation of different SDM criteria
Control algorithm
Source conditions
System voltages (RMS) (V)
Vsa
EC criterion
EP criterion
instantaneous PQ theory
proposed IEC criterion
magnitude unbalance
phase unbalance
distorted source
magnitude unbalance
phase unbalance
distorted source
magnitude unbalance
phase unbalance
distorted source
magnitude unbalance
phase unbalance
distorted source
230
230/0°
230
230
230/0°
230
230
230/0°
230
230
230/0°
230
Source currents
(RMS) (A)
Source currents
(% THD)
Vsb
Vsc
isa
isb
isc
isa
isb
isc
275
230/−100°
230
275
230/−100°
230
275
230/−100°
230
275
230/−100°
230
183
230/90°
230
183
230/90°
230
183
230/90°
230
183
230/90°
230
3.03
4.71
2.96
3.03
4.71
2.96
4.45
5.03
4.67
3.04
8.94
2.86
3.03
4.71
2.96
3.03
4.71
2.96
4.36
4.83
4.67
3.04
8.93
2.87
3.03
4.70
2.96
3.03
4.70
2.96
4.43
4.69
4.65
3.03
8.92
2.87
5.23
3.37
25.9
5.23
3.37
25.9
12.6
25.4
16.5
4.83
1.47
5.13
4.83
2.79
26.1
4.83
2.79
26.1
14.3
28.2
16.5
4.43
1.16
5.52
5.39
2.5
26.1
5.39
2.5
26.1
12.4
28.7
16.5
4.89
1.10
5.40
to make them compatible with analog channels of the DSP. The DSP
also receives signal from the synchronising circuit which will be
used for computation of reference quantities. DSP connected to
host computer can compute the reference compensator currents
using the proposed algorithm (Section 3.2). The reference values
are to be compared with the actual measurements made using Hall
Effect sensors and switching function is decided on the basis of
(1) to generate the switching pulses for VSI. These switching
pulses have to be passed through the blanking circuit to include
dead time. The protection circuit ensures safe operation of
DSTATCOM in case of any abnormality in the system. The
logical gate signals available from the blanking circuit are given to
VSI through opto-isolation circuit (HPCL 2601) to provide
isolation between signal circuit and the high-power network.
To demonstrate the effectiveness of the proposed control
algorithm, experimental results are presented for 3p4w distribution
compensated system with unbalanced, distorted source and load
condition as depicted in Figs. 10–13. By extracting the positive
sequence voltages in real time algorithm, the reference
compensator currents are computed using the proposed IEC
approach. The system and compensator parameters are same as
those given in simulation studies. It is seen from Figs. 10–13 that
the experimental results are consistent with the simulation results
obtained in Section 4.
isn
(A)
0.13
3.9
1.78
0.13
3.9
1.78
0.18
0.19
0.23
0.12
0.10
0.16
RMSE
0.081
0.097
0.506
0.081
0.097
0.506
0.321
0.491
0.398
0.060
0.096
0.088
When system performance is evaluated for balanced source
voltages with unbalanced and distorted load [Figs. 10a–b], it is
seen from experimental results that both the approaches provides
the satisfactory compensation with slightly lesser high frequency
components in case of proposed algorithm as seen from
Figs. 10c and d. However, when there is magnitude unbalance in
source voltages, the corresponding voltage unbalance and load
currents are shown in Figs. 11a and b. As evident earlier from
the simulation studies, the PQ theory provides poor
compensation as shown in Fig. 11c. On the contrary, an
improved performance of proposed algorithm can be seen from
Fig. 11d. To show the effectiveness of the proposed theory,
combined magnitude and phase unbalance is introduced in source
voltages. Under this condition, the superior effects using
proposed approach are depicted from Figs. 12c and d as
compared with PQ theory. Finally, the system is tested under the
distorted source voltages. It is observed from Figs. 13a–d that,
when source voltages are distorted, the basic IRP theory does
not provide satisfactory compensation as evident in Fig. 13c. On
the other side, the proposed reference generation is able to
remove all the harmonics from the system arising due to
distorted source and load, providing exactly balanced and
sinusoidal source currents with almost zero neutral current and
UPF as depicted in Fig. 13d.
Table 3 Comparison of control algorithms
Compensation
objectives
Various control algorithms
Generalised approach of PQ, SRF
etc.
PF
neutral current
compensation
harmonic
compensation
computational
complexities
performance under
various source
conditions
EP and EC SDM
Proposed IEC SDM
Operation is limited to only UPF
PF can be explicitly set to any desired value
(i) Neutral
current
remains
fluctuating under source phase
unbalance and distortions
(ii) Neutral current compensation can
be achieved only in case of source
magnitude unbalance
Provides better neutral current compensation
under all three conditions: Source magnitude
unbalance, phase unbalance and distorted
conditions
(i) Provides
harmonic
compensation only under balanced
source voltage conditions
(ii) Not viable under unbalanced
and distorted source as well as load
conditions
(i) Harmonic compensation can be
achieved only under source
magnitude unbalance
(ii) Fails under phase unbalance and
distorted source conditions
Under all the source voltage conditions, it
provides excellent harmonic compensation along
with unbalanced and distorted load conditions
Uses complex transformations
Does not require any transformation
(i) Basically developed to operate
under the balanced source
condition
(ii) Not feasible, when source is
unbalanced and distorted
(i) Can
work
effectively
when
magnitude unbalance exist in the
source voltage
(ii) Unable to operate under source
phase unbalance as well as distorted
condition
Comparatively easy to implement and even not
requires any transformation
Provides excellent compensation profile under
the magnitude and phase unbalance, including
distortions in the source voltages with
unbalanced and non-linear load
PF cannot be set directly to any
desired value
Additional modification is needed in
the basic approaches to
compensate neutral current
IET Gener. Transm. Distrib., pp. 1–11
10
& The Institution of Engineering and Technology 2015
6
Results and discussion
For EC, EP, PQ and proposed version of SDM, detailed evaluation is
given in Table 2. It is noted that, EC and EP methods deal with only
magnitude unbalance, thus, providing reduced neutral current. The
phase unbalance in the source voltages persists in the source
currents, as both the methods are not able to compensate for
source phase unbalance. EC and EP approaches fail to compensate
for source distortion also, showing higher THD in source currents
under distorted source condition (approximately 26% in all the
three phases). Hence, the compensator performance using EC and
EP algorithms under phase unbalance and distorted source
voltages is observed to be unsatisfactory. Further, the similar
unsatisfactory performance is observed in case of PQ theory not
compensating the magnitude, phase unbalance and distortion on
source side. It is seen from Table 2 that the higher THDs in
compensated currents are observed in all the three cases using PQ
theory.
All these approaches including the proposed algorithm are
analysed on the basis of additional factor, root mean square error
(RMSE) as shown in the Table 2. RMSE indicates the divergence
of actual source currents from the reference value and given by (19)
RMSE =
2
j=a,b,c isjref − isjact
3
(19)
To avoid the source current divergence from the sinusoidal
waveshape, the value of RMSE should be minimum. It is observed
that, for all the three conditions, the proposed criterion provides
reduced value of RMSE indicating the supremacy of the algorithm.
By employing the proposed IEC criterion, it is observed that,
under unbalanced, phase shifted and distorted source voltages,
compensator performance get improved. This criterion provides
lowest %THD (1 to 5.5%) under magnitude unbalance, phase
unbalance and distorted source condition as compared with EC
and EP criteria. In addition to this, IEC criterion provides better
solution for eliminating the neutral current (0.1 A). Based on the
theoretical analysis and the simulation results, a comparative study
of the features of various control algorithms is also provided in
Table 3.
7
Conclusion
The paper reports on a performance evaluation of three different
approaches of SDM under unbalanced and distorted source and
load condition using DSTATCOM. Of the three, EC and EP
criterion are seen to be operating satisfactorily only when the
magnitude unbalance exists in the source. Moreover, it is observed
that, both these criteria are not feasible to operate under the source
phase unbalance and distortion. The proposed IEC SDM with the
IET Gener. Transm. Distrib., pp. 1–11
& The Institution of Engineering and Technology 2015
extraction of fundamental positive sequence component not only
compensates the source magnitude unbalance but also mitigate the
phase unbalance and distortions in the source. Moreover, the
proposed method is compared with most robust PQ theory and
improved performance is observed. The simulation and
experimental studies establish the efficacy of the proposed
algorithm over the basic PQ, EC and EP approaches.
8
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