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Simulation β 1 MOSFET current mirror and CMOS amplifier (Simulation) 1. 2. OBJECTIVES ο· Simulate a current mirror. ο· Simulate a CMOS amplifier. Simulation of PMOS current mirror We would like to analyze the circuit given in Fig. 1. This circuit consists of two PMOS transistors in which one of them is in saturation. It is important that other remains in the saturation region for this mirror to work. IRF9140 PMOS Iref R 10k IRF9140 VDD 15Vdc PMOS Iout RL 1k Fig. 1 Assemble the circuit below using PSPICE. The PMOS transistor can be found in EVALAA.olb library. IRF9140 is listed there. Using bias-point analyses determine Iref and Iout. You would notice that Iout is very close to Iref. 1 Now increase RL so that Iout decreases by a factor of 3 or more. Try to figure out why the current mirror stopped working. Note that the threshold voltage for the PMOS transistor is -3.387 V. 3. Simulation of a CMOS amplifier- The schematic shown in Fig. 2 works as a CMOS amplifier when properly biased. Here, you would recall that in the language of PSPICE, VOFF stands for offset DC voltage and VAMPL is the amplitude of AC voltage that rides the DC voltage. 1 PMOS NDC652P/FAI 5Vdc VOFF = 2.378V VAMPL = 1m VDD V Vin FREQ = 1k NDC651N/FAI NMOS AC = 0 0 Fig. 2 Fig. 2 It is not difficult to understand why it amplifies an input signal (Vin) when proper biasing is provided. In fact this circuit is none other than a logic inverter. Figure 3 shows the transfer characteristics for the CMOS amplifier. The gain of the amplifier is defined as πΊπππ = βπππ’π‘ βπππ As you can see in Fig. 3, for a given βVin the value of βVout is quite large provided the right region in the transfer characteristic (i.e. operating point) is chosen. Hence we have amplification. Transfer characteristic for CMOS amplifier Vout βVout βVin Vin Fig. 3 Using PSPICE, assemble the schematic given in Fig. 2. Here, Vin and VDD are available in the SOURCE library. Vin is VSIN of the SOURCE library. The value of the parameter VOFF has been 2 carefully chosen to get a decent amplification. The transistors NMOS and PMOS are obtained from the Fairchild library of devices (Fairchild.olb). For PMOS, make sure that the bulk is connected to Source (VDD). 2 Using time-domain analysis in the PSPICE program, determine the gain of the CMOS amplifier. Use the following setting: Run to Time=5m; Maximum step size=1u. 3 Determine if Vin and Vout are in phase or out of phase. 4 Change the biasing voltage (VOFF) by 10 mV and observe the change in the gain. 3