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Foundations for Understanding Achievable Design:
Ground Truths, the Bookshelf, and Metrics
Theme Summary
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Mission
Enable the understanding of achievable design
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Precepts
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System design is based on :
– design optimization
– prediction
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GSRC must prove :
– real collaboration (“combine strengths”) ; whole > sum of parts
– critical mass and influence to create community-wide culture change
– its effect on the real-world practice of design and test
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This Theme’s answer:
– ground truths
– the bookshelf
– metrics
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1. Ground Truths
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Fundamental facts and data points that anchor the process
of bounding the achievable envelope of design
– ground truths must be identified and propagated
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Can be with respect to:
– manufacturing process, materials, physical phenomena
– specific CAD optimizations of circuit topology/embedding
– system architecture and packaging
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Are properly extrapolated via:
– "inference chains"
– response surface modeling and parameter optimization
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Drive the EDA vision of future design issues, methodology
– fundamental limits, fundamental truths, stakes in the ground
– current distribution, inductance extraction, UDSM testing, …
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Example Ground Truths
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What is the maximum possible clock frequency for a given
process and die size?
When does inductance matter?
What design tradeoffs must be made to maintain reasonable
supply currents?
What is the necessary number of package pins/balls for
power/ground distribution?
At what geometries, supply voltages will domino lose most
advantages over static CMOS?
What is an optimum design strategy from a manufacturing
cost point of view?
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2. The Bookshelf
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The Bookshelf
– framework to enable shared, community-wide maintenance of state
for key pieces of the (CAD algorithms) R&D leading edge
– remove barriers to entry for algorithm research -- and adoption of
algorithm research -- at the leading edge
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Bookshelf Slot: “key problem for the VLSI CAD field”
Bookshelf = repository for leading-edge innovations -- and
their implementations -- for solving this problem
Literally, publication medium + review process for
implementations
– electronic infrastructure permits archival, “arbitrarily large”
publications
– credit for leading-edge work via respectable, referable nature
– facilitates review, returns for fixes to preserve quality
– backed by other incentives, openness, culture change
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The Bookshelf (cont.)
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For given Bookshelf slot, several basic types of entries
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canonical problem definition (e.g., C++ class + supporting packages)
reference solver implementations
benchmark data
heuristic evaluation and comparison methodology
Bookshelf framework allows :
– improved effectiveness and impact of heuristic algorithm research in
VLSI CAD
– more rapid communication between research groups
– more rapid adoption of research advances by industry
– path to evolvable GSRC implementation flows/methodologies
– implicit definition, testing of underlying data model
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3. Metrics
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Design optimization must be founded on
– an understanding of what should be optimized by which heuristic
– an understanding of design as a process
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“Metrics” supports ideal of "measure, then improve”
– design becomes less of an art and more of a formal discipline
– design process optimization enabled through framework of
recording, mining, measuring, diagnosing, and then improving
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Infrastructure
– hoped-for: “proactive” initiative from EDA vendors
– reality: for now, will use Perl scripts around existing tool logfiles
– guidance from designer and design tools R&D communities: (i)
what should be measured, (ii) data mining / visualization / diagnosis
infrastructure, (iii) project-specific design process data collection
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Staffing
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Andrew Kahng 100%
Wayne Dai 100%
Wojciech Maly 50%
Jason Cong 33%
Kurt Keutzer 20%
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Ground Truths Status
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Basic engine and infrastructure
– 2 Ph.D. students, one staff
– dialogue with RPI, Georgia Tech, Berkeley, Rockwell, …
– bring in experts to help define / vet models and rules chains
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Key differentiators
– models of optimizations (BIS/WS-optimized, multi-terminal global
interconnects; block packing; optimal layer assignment, …)
– cost modeling, cost implications of design decisions
– flexible use model, platform independence, many “canned” previous
studies, design of system with adoptability in mind
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Working through key software issues:
– software architecture (C++/Java, multi-platform)
– engine, GUI codesign
– flexible definition of rules chains, studies, etc.
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The Bookshelf Status
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Initial bookshelf slots:
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hypergraph partitioning
block packing / floorplanning
standard-cell placement
single-tree interconnect synthesis/optimization
grid-graph based global routing
Extremely active convergence on data formats, tool linkages
– UIC, UCLA, SUNY Binghamton, UCSC in initial loop
– 2 Ph.D. students + outsourcing to interested/engaged researchers
– will likely end up being a practical driver for efforts toward GSRCendorsed data model and API
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Standards
– standards (build system, platform, software, etc.) near-converged
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Commercial backplane
– tools (back-end implementation flow) from Synopsys, Cadence
– compare against, integrate, mix-and-match with mini-flow above
– industry data also sought
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Metrics Status
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Metrics infrastructure
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substantial IP recently obtained from OxSigen LLC (used at Siemens)
Metrics warehouse: data model, schema, API, servlets
Metrics transmitter: applets to write metrics, embeddable in tools
Off-the-shelf standard components: Oracle8i, XML, Java, Chai
OxSigen scripts + extensions wrapped around today’s tool logfiles :
metricizes the baseline (Synopsys/Cadence) GSRC back-end flow
– 1 Ph.D. student will do thesis on Metrics in EDA
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Need more buy-in from EDA companies
Need more pull from EDA customers = GSRC sponsors
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Future Plans
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Ground truths system, GTX1.0
– GTX1.0: arbitrary tradeoff studies, parameter optimizations
– platform-independent, GUI-enabled
– accurate models of optimization effects in layers between individual
wires/devices and system architecture
– determine how correct/incorrect our views of ground truths may be
(e.g., white papers on clock jitter/skew, wire estimation models, …)
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Bookshelf
– culture/behavior goals, standards: publicize, internalize, externalize
– 3-5 slots instantiated with entries from multiple investigators
– mini-flow built around partitioning / soft-block packing / cell
placement / interconnect opt / global routing
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Metrics
– integration of OxSigen IP
– GSRC endorsement/proposal of standard Metrics schema and API
– GSRC sites running metricized std implementation methodology
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