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Transcript
Research Topic :- Device Random Fluctuations in Advanced Nano-scale Transistors
Abstract
For proper operation of extremely large scale CMOS integrated circuits, billions of MOS
transistors are employed together to perform complex logic and memory functions. It is desirable to
achieve the target transistor characteristics or characteristic fluctuations within small tolerance window.
But, it is becoming very hard to achieve target device characteristics due to many reasons. Random
device fluctuations is one of the major reasons among them. Random characteristics variations is a kind
of variability that shows no correlation between neighboring electronic devices. There are many
possible causes of intrinsic random fluctuations like random placement of discrete impurities, line edge
roughness, atomic scale gate dielectric roughness and crystalline irregularity of gate materials.
For continuing CMOS device scaling below 10 nm, increase of device random fluctuations must
be eliminated or controlled. Adopting new MOS device architectures like confined geometry ultra-thin
body SOI FETs, FINFETs, nano-wire FETs etc. are one of solutions to reduce random fluctuations.
The doctoral research work is centered on quantitative analysis of intrinsic device variability sources
of nano scale MOSFETs and finding ways to eliminate them. Numerical statistical device simulation
study of sub 14nm confined geometry and multi-gate MOSFETs, is being carried out to evaluate the
nature and sources of device random fluctuations. The research findings will enable the variability
aware device engineering in future 3-D system scaling.
Akhil.S
(EE15RESCH11004)
PhD Scholar, Electrical Department,
IIT Hyderabad.
Guide:- Dr. Kaushik Nayak
Assistant Professor,
Electrical Department,
IIT Hyderabad.