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Chapter 8
O.C., Tristate AND
TRISTATE GATES
Lesson 3
Tristate Gate
Outline
• Tristate gate circuit
• Tristate gate features
• Tristate gate applications
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Definition
• Tristate means a state of logic other
than ‘1’ and ‘0’ in which there is a
high impedance state and there is no
isource or isink at the output stage
transistor (or MOSFET). A gate
capable of being in ‘1’, ‘0’ and tristate
is known as tristate gate
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
An element of Tristate gate circuit
—Analog/Digital Switch as
• A MOSFET analog/digital switch
• A CMOS analog switch is made from a
pair of n-channel and p-channel
MOSFETs.
• Two features:
• (i) Bi-directional current flow and
• (ii) Symmetrical input and output
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
F’
Drain
D
Gate
G
Y
A
D
V+DD
IDS
V+
S
V–
S
Vcontrol
X
F
CMOS p-channel and n channel pair as Bidirectional current flow symmetrical switch
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Switch Working
• When X is at either state '1' or '0, we
shall get state '1’ or '0' another end, Y. It
when the switch is closed by applying a
control Voltage of about V+ (by making
the control pin at CMOS logic state '1')
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Switch Working
•
•
No logic output appears at other end if the
switch is opened by V- at the control gate (by
logic state ‘0’)
When the switch is opened by applying control
Voltage of about V- i.e. control input logic state
is '0', we will get no current flow from one end
X to another Y and currents for both the states
are nil. Neither state ‘1’ nor state ‘0’ can be
transmitted now from one end to another end
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Digital and analog
• A digital circuit is also actually an analog
circuit but is one where we consider only
signals in terms of ‘ 1’s and '0's. Where
‘1’s and '0's correspond to two discrete
regions of Voltages or currents or
frequencies
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Analog switch as digital switch
• An analog switch also works as digital
switch provided (i) Voltage levels
corresponding to the digital logic '1's and
'0's are fed and are usable at X end called
input/output or at Y end called
output/input, and (ii) Control Voltage
can be fed from a digital logic output at
both ‘1’ and '0' to set switch in its either
ON (close) or OFF (open)
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate gate
• It is possible to have a switching circuit
which will neither permit state '1' or state
'0' from one end to another unless
appropriate control input (enable input)
is activated [say, by applying V+ (logic
‘1’) at it]
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate gate
• . Enable input if not active then it will
give an high impedance state which will
neither let a current source nor a current
sink between X and Y ends (Enable input
inactive) then previous stage whether at
‘1’ or at ‘0’ does not transmit onward
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Outline
• Tristate gate circuit
• Tristate gate features
• Tristate gate applications
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate Gate Buffer Symbols
Tristate Buffer with output Enable
when E = 1
E
E
Tristate Buffer with output Enable
when E = 0
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate Gate NOT Symbols
Tristate NOT with output Enable
when E = 1
E
E
Tristate NOT with output Enable
when E = 0
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate Gate Features
• A tristate gate output ‘0’ or ‘1’ state
enables either when E = 1(left side
circuit) or when E = 0
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate Gate from Multi-emitter npn
• Circuit of TTL ‘ NAND’ gate having
•
•
a multi-emitter transistor can be
used as tristate circuit
Two p-n junctions at a control input
E.
One of the input of multi-emitter
transistor at the input stage is used a
control input E.
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate Gate from Multi-emitter npn
• E input also connects the n-end of a p-n
•
•
•
junction diode, the p-end of which
connects the next stage transistor T’
collector.
Switching of the TTL data input(s) at the
gate by the use of two p-n junctions in
place of MOSFETs based digital switches
Fast switching at the outputs.
Output pull up circuit consists of a pair
of transistors T’’’ and Tiv
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Two multi-emitter junctions
• When we use two multi-emitter junctions of
T, one for control input and others for the
input A, the circuit works as tristate input
NOT. When we use more than two multiemitter junctions of T, one for control input
and others for the inputs A, B,.., the circuit
works as tristate input NAND
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Outline
• Tristate gate circuit
• Tristate gate features
• Tristate gate applications
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Tristate gate Application
• To a single wire number of gates can be at
interconnected. Only input gate and output
gate circuits are enabled through E pins.
• Rest of the gates even though connected
remain in tristate.
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Summary
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
• Analog/digital switch made from
MOSFETs is symmetrical and bidirectional
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
• Tristate gate is made from digital/analog
•
•
switch consisting of p-channel and nchannel MOSFETS.
Tristate gate is made from Multi emitter
junction also
Tristate gate permits transmission of input 1
or 0 to output provided enable pin is
activated.
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
End of Lesson 3on
Tristate Gate
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006
Thank you
Ch08L3-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006