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EECS140 Midterm 2
Spring 2008
Prob.
Name__________________________
1ABCDIJ
/20
1EFGH
/30
2
/15
SID___________________________
Score
3
/15
1) For questions 1A and B, give your answers in terms of
4
/20
the various gm, Cgs, Vdsat , VTH, (e.g. gm1, Cgs5), and CC, C2
Unless otherwise indicated, you may make the following
Total
assumptions:
 All transistors are biased in saturation
 All capacitors are assumed to be zero except CC, C2 , and Cgs for all transistors.
 gmro >> 1 for all combinations of gm and ro
2A
2B
4
RZ
CC
1A
C2
1B
6
5
3
1A) What is the minimum supply voltage that can be used which will keep all devices in
saturation?
1B) Due to a layout error, one version of this amplifier has (W/L)2B= 5 (W/L)2A. Derive
the mirror pole frequency, and the corresponding mirror/diff-pair zero frequency.
1A) VDD,min
1B) PM, Z
with layout error
Prob. 1, cont.) Assume that the layout error in 1B is fixed, and the mirror doublet is at
high frequency and can be ignored. Using the following values for parameters, answer
the following questions
gm1,2
ro1,2
gm4
ro4,5
C2
CC
Cgs4
0.1mS
2M
10mS
200k
100p
1p
10p
1C) Why is RZ in the circuit, and what value should it have?
1D) What are the uncompensated poles (CC=0) ?
On the following pages,
1E) plot the magnitude of the second stage gain
1F) plot the overall impedance seen at the first stage output (including Ro1, Cgs4, CC, and
any effects of Miller multiplication),
1G) plot the magnitude of the first stage gain,
1H) plot the magnitude and phase of the overall gain. Label any poles and zeros
clearly.
1I) Estimate the phase margin for this value of CC.
1J) Approximately what value of CC is needed for a 45 degree phase margin?
1C) RZ purpose
and value
1D) p1,0, p2,0
1I) Phase
margin, CC=1p
1J) CC
for 45 degree phase
margin
1E) Second stage gain – |Av2,0|
10,000
|Av2|
|Av2|
100
1
1
1k
1M
1G
rad/s
1F) Impedance at first stage output, |Zo1|
10M
|Zo1|
|Zo1|
100K
1K
1
1k
1M
1G
rad/s
1G) First stage gain, |Av1|
10,000
|Av1|
|Av1|
100
1
1
1k
1M
1G
rad/s
1H) op amp Bode plot
|Av|
10,000
|Av|
100
1
1
1k
1M
1G
rad/s
Label any poles and zeros clearly!
0
Phase(Av)
Phase(Av)
-90
-180
-270
1
1k
1M
1G
rad/s
2) For the following questions, give a short answer and justification (2 sentences max).
2A) For lab1, how did the input common mode value affect the current in the first stage?
(a lot, a little, not at all)
2B) For lab1, how did the input common mode value affect the gain of the first stage? (a
lot, a little, not at all)
2C) For lab1, does that circuit work with resistive feedback? Why or why not?
3) for your Miller-compensated 2-stage amplifier in problem 1 with a phase margin of 45
degrees, what is the impact on the compensated pole locations of doubling C1? Doubling
C2? Doubling Cc? (answers might be double, half, minimal effect, …)
p1
Double C1
Double C2
Double Cc
p2
4) For the four differential amplifiers below, assume that 1/gm << R << ro for all
configurations, and that current sources are ideal. Calculate the common mode and
differential gain for each amplifier.
VB
R1
1B
R2
2A
1A
1B
1A
AVCM
Amp A
Amp B
Amp C
Amp D
1B
I0
3
Amp B
2B
VoutC
VB2
Amp A
2A
2B
VoutB
VoutA
1A
VB
2B
VoutD
1A
1B
VB2
3
Amp C
AVDM
Amp D