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\\Server\NC Datapool\Operating Departments\R&D\MaxSine Components\V6 Controller\Software\NCU Software\DQ Vector Control Specification.doc Specification DQ- Vector controlled calculation of desired compensation current. 1. Purpose of Project The purpose of the project is to implement a System Generator Block, which has several functions according to the task description. This document specifies necessary parameters and things to be developed. 2. Input Data The input data are necessary to start the implementation of the design. For this project those are: - Specification (this document) - Project schedule. 3. Output Data The output data represent the results of the design. For this project those are: - System Generator block in model look. - System Generator Block Description. - Simulations, showing performance of the block; - Simulations, showing the performance of complex internal components. The final number of simulations is defined by project designer. 4. Task description 4.1. Purpose of the block The block must do a DQ-vector controlled calculation of the desired compensation current. This block will be used in Nokian Central Unit for reference current waveform generation. The block measures currents and voltages of the load, calculates Alpha, Beta, D and Q transformations of the load currents, and generates compensation currents. The compensation currents have such waveforms, so that after adding them to the load currents, the resulted waveforms have only active components and no reactive components and harmonics. 4.2. Common parameters The block must work with FPGA frequency of 50MHz. The block must be compact and use minimum FPGA resources. The block must be implemented with Xilinx DSP System Generator. 4.3. Input signals definition In order to make possible universal usage of this block, all signals must be standardized before using them. This means that they should have the same range and bit width. Every input signal must be scaled down to the range of -1...+1. For example, if the current range is -2100…+2100A, then the scaling factor will be 1/2100 and the input signal value of +500A will be transferred to 500/2100= +0.2381 as block input. The input signals for the block are defined in Table 1. Signal Name Signal description Signal format IL1 Load current in Fix 14_13 Phase A IL2 Load current in Fix 14_13 Phase B IL3 Load current in Fix 14_13 Phase C UL1 Phase to Neutral Fix 14_13 voltage of Phase A UL2 Phase to Neutral Fix 14_13 voltage of Phase B UL3 Phase to Neutral Fix 14_13 voltage of Phase B Signal range -1… +0.99988 Sample Frequency 50kHz -1… +0.99988 50kHz -1… +0.99988 50kHz -1… +0.99988 50kHz -1… +0.99988 50kHz -1… +0.99988 50kHz The nominal frequency of input signals is 50Hz. It must be possible to work with 60Hz as well. 4.4. Output signal definitions Due to standardizing of input signals, the output signal range of the block will be between -1 and +1. Although project designer can choose another output format, if it is necessary and required by design. Necessary output signals are defined in Table 2. Signal Name IL1_SOLL IL2_SOLL IL3_SOLL ID_SOLL IQ_SOLL Phi Signal description Compensation current in Phase A Compensation current in Phase B Compensation current in Phase C D component of compensation current Q component of compensation current Phase information of Phase voltage Signal format Signal range Table 2. Sample Frequency 50kHz Fix 14_13 -1… +0.99988 Fix 14_13 -1… +0.99988 50kHz Fix 14_13 -1… +0.99988 50kHz Fix 14_13 -1… +0.99988 50kHz Fix 14_13 -1… +0.99988 50kHz Fix 13_9 -pi…+pi 50kHz 4.5. Block diagram The main block diagram is presented in figure 1. UL1 abc Rec α Magn UL2 αβ UL3 β Pol Phi Phi Sliding Average IL1 IL2 IL3 IL1_SOLL Iload,D abc D,Q -1 Iload,Q -1 D,Q IL2_SOLL A,B, IL3_SOLL C ID_SOLL IQ_SOLL Figure 1. Block Diagram. Three phase voltages UL1, UL2 and UL3 are filtered and transformed to the αβ- space vector domain. This is called Clark transformation. Then magnitude and phase information are calculated from the resulted vector with the rectangular-topolar coordinate block. The phase information is used further in the system. The load currents are transformed to an αβ- space vector in the same manner. To transform the resulted vector to a D,Q space vector the voltage phase information is used. This is called Park transformation. Output Iload,D and Q signals represent active and reactive power of load currents accordingly. The Clark-Park transformations are reversible; therefore it is possible to receive phase currents again from these two signals and the voltage phase. Since Maxsine cannot compensate active currents, the D component is filtered with a High Pass filter (Sliding average) to compensate the DC component of the Iload,D signal. This component represents the fundamental active current of load. The resulted D and Q currents are inverted to become compensation currents and are passed to the reverse Clark-Park transformation block. This block first transforms D and Q currents to a αβ- Space Vector and then to compensation phase currents. Since the currents were inverted and the DC component of the D current was filtered, the compensation currents represent inverted load currents without fundamental active current. Since nothing else is filtered the load current harmonics are represented with a inverted sign as well. 4.6. Functional description. This section describes the functionality of each block. 4.6.1. ABC / αβ Transformation Block The block consists of three stages, as shown in figure 2. 50kHz 5kHz UL1 UL1 UL2 UL3 Downsample UL2 UL3 5kHz UL1 50Hz Bandpass Filter UL2 50kHz UL1 Interpolation UL3 Figure 2. UL2 UL3 α 0,578 β The phase voltage is down sampled at first to reduce the sample frequency. This is required to reduce the number of digital filter stages. The digital 50Hz bandpass 3- channel Filter is used to filter out only fundamental parts of voltages. 50 Hz signal are passed through, but Low frequency and High frequency harmonics are compensated. This is essentially necessary for a proper phase calculation. Due to the filter delay, the output voltage has a phase shift against the input waveform. The interpolation block is used to increase the sample frequency to the previous level. To avoid aliasing, it uses approximation to generate samples between input signal samples. The phase A voltage is transferred as an α component of the space vector. In order to calculate the β component UL3 is substracted from UL2 and the result is divided by sqrt(3), as mentioned in Clark transformation. 4.6.2. Rectangular to Polar transformation. α β CORDIC ATAN Magn atan Phase compensation Phi Figure 3. The Cordic ATAN block is used for rectangular to polar transformation. Since there was a filter before and the Cordic has a delay, a phase compensation system must be implemented. This system must add or substract phase shifts from the resulted phase. 4.6.3. abc to D,Q transformation. cos(Phi) IL1 cos(Phi-pi/3) Sin-Cos Generator IL2 cos(Phi+pi/3) 0,667 D IL3 Phi sin(Phi) IL1 sin(Phi-pi/3) IL2 sin(Phi+pi/3) 0,667 Q IL3 Figure 4. D and Q represent active and reactive instantaneous power. Therefore the calculation methods are the same as for active and reactive powers. The phase information from “ii” is used to generate reference sin and cos waveforms with 120° phase shifts, which represent phase voltages. The phase currents, which are multiplied with the cos reference waveform and summed represent active D component, and those multiplied with the sin waveform represent the Q component. 4.6.4. Sliding average filter. 1 s Sliding Average Integrator Transport Delay [Output ] [Input ] Figure 5. The integrator is used to calculate the sliding average. Every new input sample is added to the value stored in the integrator. But the same sample delayed by several amount of time is subtracted from the stored integrator value. If the transport delay is adjusted to one signal period (F.E. 20ms), then the output of sliding average will be a DC component of input signal. The AC component will be totally rejected. This DC component is substracted from the input signal to get only AC components in the output signal. 4.6.5. DQ to ABC conversion. Before conversion the DQ vector is inverted to represent compensation current. [D] Alpha [IL 1] cos [Q] [Phase ] sin [IL 2] [Q] Beta sqrt(3) 1/2 -1 [IL 3] [D] Figure 6. The conversion is made in two steps. In step one D and Q components are converted to an αβ vector with the inverse Park transformation. In step two the vector is converted to phase currents with the inverse Clark transformation.