Download 4× JFET Buffer Amplifier Cuts Noise in Half

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4× JFET Buffer Amplifier
Cuts Noise in Half
Jordyn Rombola and Chau Tran
Analog Devices, Inc.
In many electronic circuits, there is always a demand for a device to
isolate or separate one circuit from another. This special device is called a
buffer. A buffer is a unity-gain amplifier that has an extremely high input
resistance and an extremely low output resistance. This means that the
buffer can be modeled as a voltage controlled voltage source that has a
gain of one. Since the buffer ideally has an infinite input resistance, there
is no loading effect, so that VIN = VOUT. Furthermore, the output voltage from
the buffer is insensitive to the load resistance because the idealized buffer
has an output resistance that is essentially zero. By placing a unity-gain
buffer between a digital-to-analog converter (DAC) and a load, one can
easily solve the loading problem.
50
A
50
B
VIN
VOUT
50
C
When adding a unity-gain buffer to a system, it is important to maintain accuracy and performance. The most important consideration is to
calculate the added noise:
Noise (VRMS) = f (en2 + (1n Rs)2)
50
D
Where:
AD8244
en = buffer input voltage noise density
in = buffer input current noise density
f = device input bandwidth (Hz)
Figure 1. The new AD8244 low noise buffer.
The circuit of Figure 1 is a new configuration of a buffer amplifier that
reduces the voltage noise by a half. The AD8244 is a quad, JFET input,
unity-gain buffer that is designed to exceed expectations. The 2 pA
maximum bias current, near zero current noise, and 10 TΩ input impedance introduce almost no error, even with source impedances well into
the megaohms. With its low voltage noise, wide supply range, and high
precision, this device is also flexible enough to provide high performance
anywhere a unity-gain buffer is needed, even with low source resistance.
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1k
Noize (nV/√Hz)
In the circuit of Figure 1, each channel has extremely low current noise
(0.8 fA/√Hz) in comparison with voltage noise of (13 nV/√Hz). Therefore,
when one needs less added noise in the system, it is critical to reduce
this voltage noise. The voltage noise can be reduced by placing multiple
buffers in parallel. For example, two buffers in parallel reduce the voltage
noise by √2, or all four buffers placed in parallel act as a buffer with ½ the
noise. The trade-offs to this method are increased bias current, current
noise, and input capacitance but in this case, those results are negligible.
Place a small resistor, such as 50 Ω, between the outputs to avoid extra
current flow due to the slight differences between each output. For less
power sensitive applications, these 50 Ω resistors can be omitted to boost
the available output current.
The Figure 2 plot is the comparison of the noise performance of a normal
single-channel buffer and the new AD8244 buffer utilizing four channels
in parallel.
100
10
AD8244 – Single
AD8244 – Quad
1
0.1
1.0
10
100
1k
10k
(Hz) noise is ½ of normal buffer.
Figure 2. The performance of the newFrequency
AD8244 buffer:
About the Authors
Jordyn Rombola [[email protected]] is a product
engineer in the Linear and Precision Technology (LPT) Group of
Analog Devices. She joined ADI in January 2014, after finishing
her bachelor’s degree in electrical and computer engineering
from Worcester Polytechnic Institute (WPI).
Chau Tran [[email protected]] joined Analog Devices in
1984 and works in the Linear and Precision Technology Group
in Wilmington, MA. In 1990, he graduated with an M.S.E.E. degree
from Tufts University. Chau holds more than 10 patents and has
authored more than 10 technical articles.
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