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Basic Resistive Load Circuits
Dr. Paul Hasler
Basic Resistive Load Circuits
Vdd
Vdd= 5.0V
Output Voltage
Bias = 3.0V
R1
R1
Vout
Vin
Vout
Vin
GND
What is the bias current?
GND
Iref = (2V) / R1
Basic Resistive Load Circuits
Vdd
Vdd= 5.0V
Output Voltage
Bias = 3.0V
R1
R1
Iref = (2V) / R1
Vout
Vin
Vout
Vin
GND
GND
BJT / Subthreshold VT
(2V) / R1 = Ico e
Vin/UT
Vin = UT ln ( (2V) / R1 Ico )
Above Threshold (Vd > Vg - VT )
(2V) / R1 = (K/2) (Vin - VT )2
Vin = VT + sqrt( (4V) / (K R1) )
Small-Signal Model: Common Drain
Vdd
Vdd= 5.0V
Output Voltage
Bias = 3.0V
R1
R1
Iref = (2V) / R1
Vout
Vin
Vout
Vin
GND
GND
Have bias Vin
Small-Signal Modeling
V3
V3
I
V1
I
V1
rp
V1
V2
V2
rp
V3
+
V gmV
ro
-
V2
gm
V2
ro
Av
BJT
(UT b) / I
I / UT
VA / I
VA / UT
Above VT
MOSFET

2I /(V1-V2 -VT)
VA / I
2VA/(V1-V2 -VT)
Sub VT
MOSFET

kI / UT
VA / I
kVA / UT
Small-Signal Model: Common Drain
Vdd
Vdd= 5.0V
Output Voltage
Bias = 3.0V
R1
R1
Iref = (2V) / R1
Vout
Vin
Vout
Vin
Have bias Vin
GND
GND
Compute Transconductance (gm)
BJT / Subthreshold VT
gm = I / UT
= (2V) / (R1 UT)
Above Threshold (Vd > Vg - VT )
gm = 2I /(Vin -VT)
= (4V) / (R1 (Vin -VT) )
Small-Signal Model: Common Drain
Vdd
Vdd= 5.0V
Iref = (2V) / R1
R1
R1
Vout
Vout
Vin
rp
+
V
-
or
GND
Vout
R1
gmV
Have bias Vin
gm = (2V) / (R1 UT)
Vin
GND
Vin
Output Voltage
Bias = 3.0V
gm = (4V) / (R1 (Vin -VT) )
Gain = - gmR1
= - [ (2V) /(R1UT) ] R1
= - (2V) /UT
or
GND
Gain = -(4V) / (Vin -VT)
Small-Signal Model: Common Drain
Vdd
Vdd= 5.0V
Iref = (2V) / R1
R1
R1
Vout
Vout
Vin
rp
+
V
-
or
GND
Vout
gmV
R1
Have bias Vin
gm = (2V) / (R1 UT)
Vin
GND
Vin
Output Voltage
Bias = 3.0V
ro
gm = (4V) / (R1 (Vin -VT) )
Gain = - [(2V) / UT ][1 + (2V)/ VA ]
or
Gain = -[(4V)/(Vin -VT)][1 + (2V)/ VA ]
GND
Small-Signal Model: Common Drain
Vdd
Vdd= 5.0V
Iref = (2V) / R1
R1
R1
Vout
Vout
Vin
rp
+
V
-
Have bias Vin
gm = (2V) / (R1 UT)
Vin
or
GND
GND
Vin
Output Voltage
Bias = 3.0V
Vout
gm = (4V) / (R1 (Vin -VT) )
Gain = - (2V) /UT
or
Gain = -(4V) / (Vin -VT)
R1
gmV
Output Resistance = R1
GND
Common E / S: Resistive Load
Follower Circuits
Vdd
Vdd
Output Voltage
Bias = 3.0V
Vin
Vin
Vout
Vout
R1
R1
GND
What is the bias current?
GND
Iref = (3V) / R1
Basic Resistive Load Circuits
Vdd
Vdd
Output Voltage
Bias = 3.0V
Vin
Vin
Vout
Vout
R1
R1
GND
GND
BJT / Subthreshold VT
(3V) / R1 = Ico e
Iref = (3V) / R1
(Vin - Vout)/UT
Vin = Vout + UT ln ( (3V) / R1 Ico )
Above Threshold (Vd > Vg - VT )
(3V) / R1 = (K/2) (Vin - Vout - VT )2
Vin = Vout + VT + sqrt((6V)/(KR1))
Small-Signal Model: Common Drain
Vdd
Vdd
Output Voltage
Bias = 3.0V
Vin
Vin
Vout
Vout
R1
R1
Iref = (3V) / R1
Have bias Vin
GND
GND
Compute Transconductance (gm)
BJT / Subthreshold VT
gm = I / UT
= (3V) / (R1 UT)
Above Threshold (Vdd > Vin - VT )
gm = 2I /(Vin –3V - VT)
= (6V) / (R1 (Vin - 3V- VT) )
Small-Signal Model: Common Drain
Output Voltage
Bias = 3.0V
Vdd
Vdd
Iref = (3V) / R1
Vin
Vin
Vout
Vout
R1
R1
Have bias Vin
gm = (3V) / (R1 UT)
or
GND
GND
gm = (6V) / (R1 (Vin-3V-VT) )
+ V Vin
Vout
rp
R1
gmV
GND
GND
(Vin - Vout ) / rp + (Vin - Vout ) gm
= Vout / R1
(Vin-Vout )(1 + rp gm) = Vout (rp / R1)
Vout/Vin = 1/(1 + [(rp / R1)/(1 + rp gm)])
Small-Signal Model: Common Drain
Output Voltage
Bias = 3.0V
Vdd
Vdd
Iref = (3V) / R1
Vin
Vin
Vout
Vout
R1
R1
GND
+ V Vout
rp
R1
gmV
GND
gm = (3V) / (R1 UT)
or
GND
Vin
Have bias Vin
GND
gm = (6V) / (R1 (Vin-3V-VT) )
Vout / Vin =
1 / (1 + [ (rp / R1) / (1 + rp gm)])
rp gm = b (large)
Vout / Vin = 1 / ( 1 + [ 1 / (R1 gm)] )
Small-Signal Model: Common Drain
Output Voltage
Bias = 3.0V
Vdd
Vdd
Iref = (3V) / R1
Vin
Vin
Vout
Vout
R1
R1
GND
+ V Vout
rp
R1
gmV
GND
gm = (3V) / (R1 UT)
or
GND
Vin
Have bias Vin
GND
gm = (6V) / (R1 (Vin-3V-VT) )
Vout / Vin = 1 / (1 + [ 1 / (R1 gm)])
Vout / Vin = 1 / (1 + [UT/(3V)])
or
Vout / Vin = 1 / (1 + [Vin-3V-VT /(3V)])
Small-Signal Model: Common Drain
Output Voltage
Bias = 3.0V
Vdd
Vdd
Iref = (3V) / R1
Vin
Vin
Vout
Vout
R1
R1
gm = (3V) / (R1 UT)
or
GND
GND
+ V Vin
Have bias Vin
Vout
rp
gm = (6V) / (R1 (Vin-3V-VT) )
Vout/Vin = 1/(1 + [UT/(3V)])
or
Vout/Vin = 1/(1+[Vin-3V-VT /(3V)])
R1
gmV
GND
GND
Output Resistance:
Short the input to GND
Small-Signal Model: Common Drain
Output Voltage
Bias = 3.0V
Vdd
Vdd
Iref = (3V) / R1
Vin
Vin
Vout
Vout
R1
R1
Vout
1/gm
GND
rp
R1
GND GND
gm = (3V) / (R1 UT)
or
GND
GND
Have bias Vin
gm = (6V) / (R1 (Vin-3V-VT) )
Vout/Vin = 1/(1 + [UT/(3V)])
or
Vout/Vin = 1/(1+[Vin-3V-VT /(3V)])
Rout = (1/gm) / (1 + gm R1) ~ 1/gm
Common Gate: Resistive Load
Vdd
Vdd
R1
R1
Vout
Vb
Vout
Vb
Vin
What is the bias current?
Vin
Iref = (1V) / R1
Output Voltage
Bias = 4.0V
Common G: Resistive Load
Common Gate: Resistive Load
Vdd
Vdd
R1
R1
Vout
Vb
Output Voltage
Bias = 4.0V
Iref = (1V) / R1
Vout
Vb
Vin
Vin
BJT / Subthreshold VT
(1V) / R1 = Ico e
Vb-Vin/UT
Vin = Vb - UT ln ( (1V) / R1 Ico )
Above Threshold (Vd > Vg - VT )
(1V) / R1 = (K/2) (Vb - Vin - VT )2
Vin = Vb - VT - sqrt((2V)/(K R1))
Common Gate: Small-Signal
Vdd
Vdd
R1
R1
Vout
Vb
Output Voltage
Bias = 4.0V
Vout
Iref = (1V) / R1
Have Input Bias
Vb
Vin
BJT / Subthreshold VT
gm = I / UT
= (1V) / (R1 UT)
Vin
Above Threshold (Vd > Vg - VT )
gm = 2I /(Vb - Vin -VT)
= (2V) / (R1 (Vb - Vin -VT) )
Common Gate: Small-Signal
Vdd
Vdd
R1
R1
Vout
Vout
Vb
Vin
rp
+
V
-
Vout
R1
gmV
Vin
GND
Iref = (1V) / R1
Have Input Bias
gm = (1V) / (R1 UT)
Vb
Vin
GND
Output Voltage
Bias = 4.0V
or
gm = (2V) / (R1(Vb- Vin-VT) )
Gain = gm R1
Gain = (1V) / UT
or
Gain = (2V) / (Vb- Vin-VT)
Common Gate: Small-Signal
Vdd
Vdd
R1
R1
Vout
Vout
Vb
Vin
GND
rp
Vout
R1
gmV
Vin
GND
Iref = (1V) / R1
Have Input Bias
gm = (1V) / (R1 UT)
Vb
Vin
+
V
-
Output Voltage
Bias = 4.0V
or
gm = (2V) / (R1(Vb- Vin-VT) )
Gain = (1V) / UT
or
Gain = (2V) / (Vb- Vin-VT)
Output Resistance = R1
Source Degeneration
Vdrain
Vdrain
Vin
Vin
Va
R1
GND
Va
Modify
gm
R1
GND
Small-Signal Model: Common Drain
Vdd
Vdd
+ V -
Vin
Vin
Vout
Vout
R1
R1
Vin
Vout
rp
R1
gmV
GND
GND
GND
GND
Vout / Vin = 1 / ( 1 + [ 1 / (R1 gm)] ) = R1 gm / (1 + R1 gm)
R1 << 1/gm
Vout / Vin = (R1 gm)
(Resistor has a small effect)
R1 >> 1/gm
Vout / Vin ~ 1
(Resistor sets gm)
Source Degeneration
Vdrain
Vdrain
Vdrain
Vin
Vin
Va
R1
Gm:
Vin
Va
Modify
gm
GND
R1
gmV
Vdrain
GND
=
Va
rp
R1
gmV = gm(Vin - Va ) = gm(1 (ignore ro here)
ro
+ V -
R1 gm
1 + R1gm
gm
1 + R1gm
Vin
) Vin
R1gm << 1
R1gm >> 1
gmVin
Vin /R
GND
Source Degeneration
Vdrain
Vdrain
Vdrain
Vin
Vin
Va
Va
GND
R1
GND
Gm = 1 /R
Rout:
ro
+ V -
Modify
gm
R1
GND
Va
rp
R1
gmV
Vdrain
GND
Source Degeneration
Vdrain
Vdrain
Vdrain
Vin
gmVa
ro
Vin
Va
R1
GND
Gm = 1 /R
Rout:
Vdrain
Va
Modify
gm
Va
rp // R1
R1
GND
GND
small
Solve for Va: Va / (rp // R1) + gmVa = (Vdrain - Va)/ ro
small
Va [ro (gm+ (1/(rp // R1)) )] = Vdrain
Va = Vdrain /[rogm]
Source Degeneration
Vdrain
Vdrain
Vdrain
Vin
gmVa
ro
Vin
Va
R1
GND
Gm = 1 /R
Vdrain
Va
Modify
gm
Va
rp // R1
R1
GND
GND
Va = Vdrain /[rogm]
Solve for Current: I = Va / (rp // R1)
Rout:
I = Vdrain /[rogm(rp // R1)]
Rout = rogm(rp // R1)
Source Degeneration
Vdrain
Rin: (conductance is zero
for a MOSFET)
Vdrain
Vin
Vin
Va
R1
Va
Vdrain
Modify
gm
GND
“Reflect R1 through the base”
R1
GND
Rin
bR1
Vin
Gm = 1 /R
Rout = rogm(rp // R1)
GND
small
Rin = bR1 + rp = b R1(1 + (1/(gmR1) ) )
Rin = b R1
Source Degeneration
Vdrain
Vdrain
Vin
Vin
Vin
Va
R1
Va
Modify
gm
R1
Rin
+
V
-
Vdrain
GmV
Rout
GND
GND
Gm = 1 /R
Rout = rogm(rp // R1)
Rin = b R1
GND
Voltage Gain: Gm Rout = rogm(1 // (R1/rp ) )