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Transcript
University of Utah Senior Clinic
2009-2010
Micron Contact:
Tim Hollis
[email protected]
208-363-3944
May 17
Company Confidential
|
©2009 Micron Technology, Inc.
|
1
High-level Summary of the Proposed Project
• Investigate the accuracy of the so-called “2-phase” or “2-
pass” power supply noise analysis methodology.
• Identify limitations in the algorithm and recommend
constraints which can be applied to limit sensitivity to any
inherent error.
▶
When is the analysis valid and when should a more
comprehensive analysis be applied?
• Provide recommendations for enhancing the accuracy of
the methodology.
Company Confidential
|
©2009 Micron Technology, Inc.
|
2
Background
• Power delivery is quickly becoming more and more
complicated
Company Confidential
|
©2009 Micron Technology, Inc.
|
3
Background
•
As integrated circuit (IC) operating frequencies and signaling datarates
continue to increase:
1.
The characteristics of the power delivery network (PDN) appear less
and less ideal.
2.
The non-idealities of the PDN become more problematic, because
there is less voltage and/or timing margin to work with.
Vcc = VccCKT
VccCKT
RPBus
LPackage
LDIMM
CDie
Gnd = GndCKT
GndCKT
CDIMM
RPBus
LPackage
LDIMM
LMthrBrd Vcc
CMthrBrd
LMthrBrd
Gnd
Company Confidential
|
©2009 Micron Technology, Inc.
|
4
Impact of PDN Non-idealities
Same Data Pattern
Company Confidential
|
©2009 Micron Technology, Inc.
|
5
Off-Chip Power Delivery
•
The impedance of the off-chip
power delivery incorporates a
combination of inductive,
capacitive, and resistive effects.
•
Even when the PDN impedance
is very low (fraction of an
Ohm), the large high-frequency
currents drawn by today’s ICs
can induce large voltage
variation across the PDN.
VCkt  I DC RPDN  LPDN
dI AC
dt
Company Confidential
|
©2009 Micron Technology, Inc.
|
6
GDDR4 (Graphics DRAM) Supply Noise
Bottom of Package showing
Ball Grid Array (BGA)
327mVpp
383mVpp
Company Confidential
|
©2009 Micron Technology, Inc.
|
7
On-Chip
Power Delivery
Vdd
Vss
Every circuit mapped to a
corresponding x-y Pbus coordinate
On-Chip Power Delivery
VCC
VCC
VCCQ
VCC
VCCQ
PKG
VCCQ
PKG
VSSQ
PKG
VSSQ
GND
VSSQ
GND
May 17
GND
Company Confidential
|
©2009 Micron Technology, Inc.
|
9
Simulation Time vs. Model Complexity
Ideal PDN +
PowerBus +
Package
+ ArrayCurrent
Combine
Package
And
PowerBus
Company Confidential
Combine
Package,
PowerBus,
and
ArrayCurrent
|
Combine
Package,
PowerBus,
ArrayCurrent,
and
LogicNoise
©2009 Micron Technology, Inc.
|
10
Measurement Accuracy
“Essentially, all models are wrong, but some are useful”
George E. P. Box (Professor Emeritus of Statistics at the University of
Wisconsin)
Company Confidential
|
©2009 Micron Technology, Inc.
|
11
2-Phase (or 2-pass) Supply Noise Analysis
Vcc
+
V
ZPDN
Gnd
Vcc
Phase 1:
Run time-domain
simulation with all
circuitry in place and
capture circuit-specific
currents into and out of
the supplies
Vcc
ICkt
Phase 2:
Apply extracted currents
+
to full Power Delivery
Network and capture
V
static and dynamic
voltage changes
-
ICkt
ZPDN
Gnd
Gnd
Company Confidential
|
©2009 Micron Technology, Inc.
|
12
Industry Example 1
Apache’s Totem, CPM, and Redhawk Tools
Static and Dynamic IR/EM Maps
Power nets
Ground nets
Taken from “Early Analysis Using RH/Totem: Prototyping, Early CPM Creation and Co-design,” Apache Design Solutions, 2008
5/10/2017
©2008 Apache Design Solutions Company Confidential
|
©2009 Micron Technology, Inc.
|
13
Industry Example 2
Cadence’s VoltageStorm
“Voltagestorm Power and Power Rail Verification,” Cadence Design Systems, Inc. Online Datasheet
Company Confidential
|
©2009 Micron Technology, Inc.
|
14
Industry Example 3
Images from Hynix Power Delivery Presentation
•
A recent presentation from
Hynix Semiconductor shows
the output of a tool
applying the 2-phase
analysis method
J. Lee, “Chip-level Power Integrity: Trend and Challenge for On-chip PDN Design,”
online: http://www.google.com/url?sa=t&source=web&ct=res&cd=4&url=http%3A%2F%2Fwww.ansoft.co.uk%2Ffirstpass%2Fpdf%2FChip_Level_Power_Integrity%3DHynix.pdf&ei=ViuYSu_oLIb2sQOW95W4Ag&usg=AFQjCNG7K-GWsFS-5lO16MNL0dwP74l7mg
Company Confidential
|
©2009 Micron Technology, Inc.
|
15
Industry Example 4
Synopsys’ Power Net Reliability Analysis Tool
•
Page taken from Synopsys’ HSIM
Plus Reference Manual
•
Summarizes 2-phase Method
applied by PWRA (Power Net
Reliability Analysis) tool – Part of
the HSIM Plus Suite
Company Confidential
|
©2009 Micron Technology, Inc.
|
16
Some Issues with 2-Phase Analysis
•
Analysis runs Open-loop,
whereas in reality, the circuits
respond to supply variation
(there is feedback)
2

VDS 
Veff VDS 



2


I DS
W
k
L
I DS
W
2
 k Veff 1   VDS  Veff 
L
Current depends on VDS
Vcc
Vcc
Vcc
ICkt
ICkt
VCC and GND
IPU currents aren’t the
IPD
Gnd
Gnd
same, implying the
need for 2 current
sources, but can
they be connected in
series?
Gnd
Company Confidential
|
©2009 Micron Technology, Inc.
|
17
Suggestions for Investigation
General Questions:
•
What is the error associated with an open-loop methodology?
•
Are certain circuits more sensitive to the error (nonlinear circuits, noise-sensitive
circuits, etc.)?
•
Can this method be used to verify circuit timing?
•
Does the method apply more accurately to certain power domains?
▶
For example, Input/Output domains where current also flows in and out of the signal path or
Internal Logic domains where nearly all current flows directly from one supply to the other.
▶
What about circuits on the domain boundary?
Implementation Questions:
•
What about multi-phase analysis, rather than just two phases?
▶
Capture currents, Capture supply voltages, Recapture currents, ...
•
How should the two current sources (pull-up and pull-down) be combined, or can they?
•
How does capturing the initial currents with the Decoupling Capacitance in place effect
the accuracy?
Company Confidential
|
©2009 Micron Technology, Inc.
|
18
Deliverables
•
Let’s publish a paper!
•
Publishing will require three things:
▶
Background: The team will need to gather details from additional
references.
▶
Rigor: Quantitative data on Voltage and Timing Error versus
Simulation Time and Memory Requirements.
▶
Contribution: Proposals for how to improve on the methodology or
how to replace it completely.
Deliverable = Publication-ready Paper
Company Confidential
|
©2009 Micron Technology, Inc.
|
19
Resources
• Tim Hollis – Micron Technology, Inc.
▶
[email protected]
• Fuad Badrieh – Micron Technology, Inc.
▶
[email protected]
• Eric Booth – Micron Technology, Inc.
▶
[email protected]
• Louis Do – Apache Design Solutions (tentative
collaboration with Apache)
▶
[email protected]
Company Confidential
|
©2009 Micron Technology, Inc.
|
20
May 17