Download Ideal Current Source

10/4/2016
Indian Institute of Technology Jodhpur, Year 2016
Analog Electronics
(Course Code: EE314)
Lecture 23: Cascode Stage
Course Instructor: Shree Prakash Tiwari
Email: [email protected]
Office: 3106, Phone: 0291‐244‐9096
Webpage: http://home.iitj.ac.in/~sptiwari/
Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/EE314/
Note: The information provided in the slides are taken form text books for microelectronics (including Sedra & Smith, B. Razavi), and various other resources from internet, for teaching/academic use only
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Ideal Current Source
Circuit Symbol
I-V Characteristic
Equivalent Circuit
• An ideal current source has infinite output impedance.
How can we increase the output impedance of a BJT that is used as a current source?
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Boosting the Output Impedance
• Recall that emitter degeneration boosts the impedance seen looking into the collector.
– This
This improves the gain of the CE or CB amplifier. However, improves the gain of the CE or CB amplifier However
headroom is reduced.
Rout  1  g m RE || r rO  RE || r
Cascode Stage
• In order to relax the trade‐off between output impedance and voltage headroom, we can use a transistor instead of a degeneration resistor
transistor instead of a degeneration resistor:
Rout  [1  g m (rO 2 || r 1 )]rO1  rO 2 || r 1
Routt  g m1rO1 rO 2 || r 1 
I C 2  I E1  I C1 if 1  1
• VCE for Q2 can be as low as ~0.4V (“soft saturation”)
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Maximum Cascode Output Impedance
• The maximum output impedance of a cascode is limited by r1.
If rO 2  r 1 :
Rout ,max  g m1rO1r 1  1rO1
PNP Cascode Stage
Rout  [1  g m1 (rO 2 || r 1 )]rO1  rO 2 || r 1
Rout  g m1rO1 rO 2 || r 1 
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False Cascodes
• When the emitter of Q1 is connected to the emitter of Q2, it’s not a cascode since Q2 is a diode‐connected device instead of a current source
device instead of a current source. 
 1

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R out  1  g m 1 
|| rO 2 || r 1   rO 1 
|| rO 2 || r 1
g m2
 g m2



g
R out   1  m 1
g m2


1
 rO 1 
 2 rO 1
g m2

Short‐Circuit Transconductance
• The short‐circuit transconductance of a circuit is a measure of its strength in converting an input voltage signal into an output current signal. Gm 
iout
vin
vout  0
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Voltage Gain of a Linear Circuit
• By representing a linear circuit with its Norton equivalent, the relationship between Vout and Vin can be expressed by the product of Gm and R
be expressed by the product of G
and Rout.
Norton Equivalent Circuit
v out  iout Rout  G m vin Rout
Computation of
short-circuit
output current:
v out vin  G m Rout
Example: Determination of Voltage Gain Determination of Gm
Gm 
iout
vin
 g m1
vout  0
Determination of Rout
Rout 
vx
 ro1
ix
Av   g m1rO1
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Comparison of CE and Cascode Stages
• Since the output impedance of the cascode is higher than that of a CE stage, its voltage gain is also higher.
vout   g m1vin rO1
Av   g m1rO1  
VA
VT
Av   g m1rO 2 g m 2 rO1 r 2 
Voltage Gain of Cascode Amplifier
• Since rO is much larger than 1/gm, most of IC,Q1 flows into diode‐connected Q2. Using Rout as before, AV is easily calculated.
easily calculated.
iout  g m1vin  Gm  g m1
Av  G m Rout
  g m1 1  g m 2 rO1 || r 2 rO 2  rO1 || r 2 
  g m1 g m 2 rO1 || r 2 rO 2 
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Practical Cascode Stage
• No current source is ideal; the output impedance is finite.
Rout  rO 3 || g m 2 rO 2 ( rO1 || r 2 )
Improved Cascode Stage
• In order to preserve the high output impedance, a cascode PNP current source is used. Rout  g m 3 rO 3 (rO 4 || r 3 ) || g m 2 rO 2 (rO1 || r 2 )
Av   g m1 Rout
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NMOS Cascode Stage
Rout  1  g m1rO1 rO 2  rO1
Rout  g m1rO1rO 2
PMOS Cascode Stage
Rout  1  g m1rO1 rO 2  rO1
Rout  g m1rO1rO 2
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Another Interpretation of MOS Cascode
• Similar to its bipolar counterpart, MOS cascode
p
p ,
can be thought of as stacking a transistor on top of a current source.
• Unlike bipolar cascode, the output impedance is not limited by .
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Example: Parasitic Resistance Rout  (1  g m1rO2 )(rO1 || RP )  rO2
• RP will lower the output impedance, since its parallel combination with rO1 will always be lower than rO1.
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Transconductance Example
Gm  g m1
MOS Cascode Amplifier
Av  Gm Rout
Av   g m1 (1  g m 2 rO 2 )rO1  rO 2 
Av   g m1rO1 g m 2 rO 2
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PMOS Cascode Current Source as Load
• A large load impedance can be achieved by using a PMOS cascode current source.
RoN  g m 2 rO 2 rO 1
RoP  g m 3 rO 3 rO 4
Rout  RoN || RoP
Review: Cascode Stage Rout
• The impedance seen looking into the collector can be boosted significantly by using a BJT for emitter degeneration, with a relatively small reduction in headroom
relatively small reduction in headroom.
Rout  [1  g m (rO 2 || r 1 )]rO1  rO 2 || r 1
Routt  g m1rO1 rO 2 || r 1 
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Another View of a Cascode Stage
• Instead of considering a cascode as Q2 degenerating Q1, we can also think of it as Q1 stacked on top of Q2 (
(current source) to boost Q
)
’
2’s output impedance. Temperature and Supply‐Voltage Dependence of Bias Current
• Circuits should be designed to operate properly over a range of supply voltages and temperatures.
• For the biasing scheme shown below, I1 depends on the temperature as well as the supply voltage, since VT and IS depend on temperature.
I1  I S eVBE / VT
VBE 
R2
VCC
R1  R2
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Concept of a Current Mirror
• Circuit designs to provide a supply‐ and temperature‐
independent current exist, but require many transistors to implement
transistors to implement.
 “golden current source”
• A current mirror is used to replicate the current from a “golden current source” to other locations. 13