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Low Quiescent Current HBT Power Amplifiers For Cellular Phones Kazutomi MORI, Shintaro SHINJO and Tadashi TAKAGI Mitsubishi Electric Corporation 5-1-1 Ofuna, Kamakura, Kanagawa, 247-8501 Japan Tel: +81-467-41-2544, Fax: +81-467-41-2519, [email protected] Abstract This paper describes two types of low quiescent HBT power amplifiers for cellular phones. The first one is a CV(Constant Voltage)/CC(Constant Current) parallel operation HBT PA which achieves low quiescent current by connecting CV mode HBT and CC mode HBT in parallel, that can compensate the AM-AM distortion each other. The other is a SiGe HBT driver amplifier having self base bias control circuit which can enhance P1dB without the increase of the quiescent current. 1. Introduction In many years, high efficiency are required for power amplifiers used in cellular phones and a lot of techniques were introduced in this technical area. In early years with the first generation analog cellular phones, the optimum load techniques for the fundamental and harmonic frequencies [1]-[4], and low operation voltage amplifiers [5],[6] were introduced. According with the use of digital modulated signal in the second generation digital cellular phones such as PDC and PHS systems, high efficiency with low distortion became key technical issues and still be important in the third generation W-CDMA or Cdma2000 systems. Then the optimum load techniques were enhanced to realize high efficiency with low distortion including optimization of the fundamental and the harmonic impedances of the final stage transistors [7]-[9] and interstage impedances [10]. As external additional components, distortion compensation techniques including adaptive digital predistortors [11],[12] and analog miniaturized size predistortion linearizers [13]-[17] were also investigated. In recent years, with the use of code-division multiple-access (CDMA) scheme including wide-band CDMA (W-CDMA), wide dynamic transmit power range is required. High efficiency not only at the maximum output power region but also in large backoff region are key issues for the power amplifiers used in these applications. In order to achieve high efficiency, some techniques were introduced in resent years. There are two approaches. The first is focusing to only reducing power consumption in large backoff region, for examples, bias voltage controlled amplifier techniques [18]-[20] and low quiescent amplifiers techniques [21]-[23] including Doherty amplifier [23]. The other approach achieves high efficiency by compensating distortion of PAs, that includes dynamic envelop tracking technique [24]-[25], adaptive digital predistortion techniques [25]-[27], re-investigated with the technical progress of digital signal processing. The active devices used in power amplifiers were MESFETs in the analog cellular phones and were shifted to PHEMTs in the second generation because of their good efficiency and linearity. Now in the third generation, GaAs HBT devices are employed because of their low quiescent current characteristics [28],[29]. As another trend, SiGe HBTs are becoming to be used in RF-IC for cellular phones because of low cost and easy implementation of integrated Ics. Power amplifiers employing SiGe HBT devices were also introduced in recent years [30],[31]. In addition to these technical issues, power amplifiers used in cellular phones must be implemented in low cost and small size. From this viewpoint, the power amplifier used to be selected in cellular phones practically. In such a viewpoint, low quiescent current PA without any external additional component and the the smart amplifier that has good performance with internal additional intelligent circuit, for example, bias control circuit based on Si or SiGe BiCMOS technologies, are considered to be good candidates in near future. In this paper, two low quiescent HBT power amplifiers are introduced. The first PA is a CV (Constant Voltage) / CC(Constant Current) parallel operation HBT PA [32]. The PA can achieve low quiescent current by employing parallel connected CV and CC mode HBT to compensate the AM/AM distortion each other. The other is a SiGe HBT driver amplifier having self base bias control circuit [33] which can enhance P1dB without the increase of the quiescent current. 2.2 Fabrication and Measured Results The CV/CC parallel operation HBT PA is fabricated to confirm its low distortion and high efficiency characteristics with low quiescent current. The schematic diagram of the fabricated CV/CC parallel operation HBT PA has been already shown in Fig.1. The CV-mode HBT PA is also fabricated as the reference. In CV-mode operation, 4 x 20 mm2 x 40fingers HBT with the quiescent current of 20mA is optimal emitter size and bias condition to obtain output power of around 26.0dBm and high efficiency with ACPR of –40dBc. The total emitter size of CV/CC HBT PA is determined to be 4 x 20mm2 x 40fingers. The finger size ratio of CV and CC-mode HBTs, and the difference of bias conditions between CV and CC-mode HBTs have to be optimized to achieve high efficiency with the specified ACPR. The bias condition difference can be adjusted by bias feed resistance Rs. P1dB difference (DP1dB) is calculated for CV/CC HBTs that have finger size ratio (CV mode HBT : CC mode HBT = X : Y) of 30:10, 20:20 and 10:30, and has base bias resistor Rs of from 100ohm to 10kohm. The DP1dB is defined as the P1dB degradation of the CV/CC parallel operation HBT PA from the CV mode HBT PA. DP1dB = 0 means that CV/CC HBT PA has the same P1dB as the CV mode HBT PA. Figure 2 shows the calculated DP1dB as functions of the finger size ratio and Rs. In the case of the finger size ratio of 30:10, the DP1dB is quite small and is less than -0.2dB for all Rs values. Therefore, the finger size ratio is desided to be 30:10. The maximum DP1dB is obtained at Rs of 1100ohm. Then Rs is determined to be 1100ohm. Figure 3 shows the photograph of the fabricated CV/CC HBT PA. The chip area is 0.8mm x 0.8mm wherein a pair of HBT’s and two different bias circuits are included. Constant Voltage Source Ls Vcc Q1 RFout RFin M.S. M.S. Q2 Rs Constant Voltage Source Fig. 1 Schematic diagram of the CV/CC parallel operation HBT PA. 1.0 Area of ⊿P1dB <-0.2 in case of 30:10 0.5 0.0 ⊿ P 1dB [dB] 2. CV/CC Parallel Operation InGaP/GaAs HBT PA 2.1 Circuit Configuration The CV/CC pararell operation InGaP/GaAs HBT PA is introduced as an example of the low quiescent current PA in this section. Fig.1 shows the block diagram of the CV/CC parallel operation HBT PA. The PA is comprised of two HBT’s (Q1 and Q2) connected in parallel. Q1 and Q2 have separated CC and CV base bias circuits, respectively. The base bias of Q1 and Q2 are supplied through an inductor (Ls) and an resistor (Rs), respectively. The collector bias circuit and the matching circuits for both input and output are common. In near class-B operation, the gain of CV mode HBT is expanded with the increase of input power. On the other hand, the gain of CC mode HBT is decreased. Therefore, the gain deviations can be compensated each other and the linearity will be improved by connecting CV and CC mode HBT in parallel as shown in Fig. 1. -0.2dB -0.5 Area of ⊿P1dB <-0.2 in case of 20:20 -1.0 -1.5 -2.0 CV mode HBT : CC mode HBT = X : Y X : Y =30 : 10 X : Y =20 : 20 X : Y =10 : 30 -2.5 -3.0 10 100 1000 10000 100000 Rs [ohm] Fig. 2 Calculated DP1dB as functions of Rs and transistor finger ratio. RFout (30fingers) Vbe (30fingers) RFin (30fingers) RFout (10fingers) RFin (10fingers) Vbe (10fingers) 0.8mm 0.8mm Fig. 3 Photograph of the fabricated CV/CC PA. -20 50 42.2% -30 40 40.0% ACPR -40.0dBc -40 30 -50 20 PAE -60 PAE [%] ACPR, NACPR [dBc] CV/CC (Idq=17mA) CV (Idq=20mA) 10 NACPR 26.4dBm -70 5 Fig. 4 10 15 26.8dBm 20 25 Pout [dBm] 30 0 35 Measured ACPR, NACPR and PAE for the fabricated CV/CC and CV HBT PA. Table 1 Measured temperature dependence of Pout and PAE @ ACPR=-40.0dBc for the CV/CC and CV HBT PA. CV/CC CV Temprature Maximum PAE [%] Maximum PAE [%] Icq [mA] [℃] Pout [dBm] @Max.Pout Pout [dBm] @Max.Pout 40 26.6 41.6 24.0 32.0 ACPR>-40.0dBc with Pout of 15dBm 30 26.6 42.1 -20 ACPR>-40.0dBc with Pout of 15dBm ACPR>-40.0dBc with Pout of 15dBm 20 ACPR>-40.0dBc with Pout of 15dBm ACPR>-40.0dBc with Pout of 15dBm 17 40 26.6 40.8 26.7 39.3 30 26.6 41.1 26.4 39.5 25 20 26.7 41.8 26.4 40.0 ACPR>-40.0dBc with Pout of 15dBm 17 26.8 42.3 40 26.3 42.8 26.1 37.7 30 26.3 43.2 26.1 38.3 85 20 26.2 43.2 26.1 38.7 17 26.2 43.5 26.0 39.1 -30 CV/CC CV -35 ACPR@Pout=15dBm [dBc] ACPR (5-MHz offset), NACPR (10-MHz offset) and PAE for the CV/CC parallel operation HBT PA and CV mode HBT PA are measured at 1.95GHz. An HPSK modulated signal with a chip rate of 3.84Mcps is used. The quiescent current Icq is set to 17mA for the CV/CC parallel operation HBT PA, and is set to 20mA for the CV mode HBT mode HBT PA at the room temperature of 25 degC. The measured results of ACPR and NACPR and PAE are shown in Fig. 4. The CV/CC parallel operation HBT PA achieves Pout of 26.8dBm and PAE of 42.2% with ACPR of -40.0dBc. On the other hand, the CV mode HBT PA achieves Pout of 26.4dBm and PAE of 40.0% with ACPR of -40.0dBc. At the maximum output power region, the CV/CC PA achieves the 0.4dB higher output power and 2.2% higher PAE compared with the CV-mode PA. Also, it is confirmed that the quiescent current of the CV/CC parallel operation HBT PA is 3mA lower than that of the conventional CV-mode PA at the room temperature of 25degC. Table 1 shows the measured temperature dependence of Pout and PAE with ACPR of -40.0dBc for the CV/CC and CV-mode HBT PAs. These characteristics are measured at the –20degC, 25degC and 85degC. Icq is set to 17, 20, 30 and 40mA at 25 ℃ , respectively. If ACPR exceed -40.0dBc at the large back-off region (Pout of 15 dBm), the measured results are not described in this table. Particularly at –20degC condition, the CV/CC PA has more advantage compared with the CV-mode PA. For the CV/CC parallel operation HBT PA, ACPR exceeds -40.0dBc at Pout of 15.0 dBm in the conditions of only Icq = 17 and 20mA. On the other hand, for the CV mode HBT PA, ACPR exceeds -40.0dBc with Pout of 15.0dBm in the conditions of Icq = 17, 20 and 30mA. This is because temperature dependence of CV-mode and CC-mode HBT can be compensated each other in the case of CV/CC PA. Fig.5 shows measured ACPR with output power of 15dBm for the CV/CC parallel operation and the CV HBT PA at –20, 25, 85degC. In Fig.5, it is shown that the CV/CC parallel operation HBT PA achieves the minimum quiescent current of 23mA, and the CV mode HBT PA achieves that of 32mA at –20degC, respectively. Therefore the total quiescent current of CV/CC PA can be reduced by 9mA compared with CV-mode PA over the temperature range of –20℃ to 85℃. -40dBc -40 -20degC -45 25degC -50 85degC -55 -60 10 23mA 20 32mA 30 40 50 Icq [mA] Fig. 5 Measured ACPR with output power of 15dBm for the CV/CC parallel operation and the CV HBT PA. Bandgap reference current Iref2 Ipc Chip area Self base bias control circuit M : 1 Q5 Q4 RFin Iref1 Icdc2 Q3 Iref RFout M.S. M.S. Rfb Cfb Ice Q2 1 Ibe Rb Vbe N Q1 Fig. 6 Schematic diagram of an amplifier with a self base bias control circuit. As an example of the smart PA, the driver amplifier with self base bias control circuit is introduced in this section. If the base voltage Vbe is controlled to increase with the increase of RF input power, more saturated output power and P1dB are expected to obtain. In other words, higher P1dB can be automatically obtained with low quiescent current if such kind of base bias control circuit would be employed. Fig. 6 shows the schematic diagram of the driver amplifier with the proposed self base bias control circuit. In Fig.6, Q1 is referred to the RF transistor of a driver amplifier, Q2 is referred to the bias transistor that composes current mirror with Q1, Q3 is referred to the transistor for compensation of base current. Q4 and Q5 are p-MOSFET’s for the current mirror which derives the self base bias control. The base current Ibe of RF HBT Q1 increases with input RF power, particularly when the output power is saturated. The increased base current Ibe are fed back by p-MOS current mirror circuit and positively added to the reference current Iref of the bias transistor Q2, which composed current mirror with Q1. Therefore, the base voltage Vbe increase with the increase of RF input power automatically. Ibe, and Vbe are represented by the following equations, Ibe ( final ) Ibe () Ibe Ibe (n)! n 1 MN n ( ) Ibe M n0 Vbe ( final ) (2) where q is electron charge, k is Boltzman’s constant, T is temperature and Is is saturation current. N and M are the current mirror ratios between Q1 and Q2, and between Q4 and Q5, respectively. Type-A Type-B 15.2dBm 15 60 50 12.8dBm 10 40 Pout 5 32.8mA 0 Ice -5 (1) q 1 MN n ln(1 ( ) Ibe ) qVbe nkT nkT n 0 M Is e 20 f=1.95GHz, Vcc=Vpc=3.0V, Icq=15.0mA -10 -20 Fig. 7 -15 Ice [mA] Vpc 3.2 Fabrication and Measured Results In order to confirm the advantage of the proposed self base bias control circuit, the driver amplifiers with the proposed self base bias control circuit and the conventional current mirror type base bias circuit are fabricated. The amplifiers employ SiGe HBT technology because bias circuits and power amplifiers can be easily integrated on a single chip. The emitter size of the SiGe HBT driver amplifier is 100mm2. The bias condition is the quiescent current of 15.3mA, and Vcc, Vpc of 3.0V. Fig.7 shows the simulated Pout and collector current Ice of the driver amplifiers with the conventional and the self base bias control circuits. The driver amplifier with the self control bias circuit achieves P1dB of 15.2dBm. P1dB improvement of 2.4dB is achieved by using the self base bias control circuit. The collector current Ice of the driver amplifier with the self bias control circuit is 32mA, that is higher than that of the driver amplifier with the conventional bias circuit at P1dB output power. Fig.8 shows simulated base current Ibe and base voltage Vbe of the driver amplifiers. As predicted by eqs.(1) and (2), it is shown in Fig.8 that Ibe and Vbe increases with the increase of input power. The calculated results used by eqs.(1) and (2) are also shown in Fig.8 as the dotted lines. The simulated and calculated Ibe and Vbe are in good agreement. A photograph of the fabricated driver amplifier with the proposed self base bias control circuit is shown in Fig.9. Chip size is 0.8mm x 1.1mm. Figure 10 shows the measured output power and collector current of the fabricated driver amplifier with the self control bias circuit. The quiescent current is set to be 15.3mA. It is shown Pout [dBm] 3. Driver SiGe HBT PA with Self Base Bias Control Circuit 3.1 Circuit Configuration 30 24.9mA 20 10 0 0.8dBm 2.6dBm -10 -5 0 5 Pin [dBm] Simulated Pout and Ice of the driver amplifiers with the conventional and the self control bias circuit. 0.7 0.89 f=1.95GHz,Icq=15.0mA Vcc=Vpc=3.0V 0.6 0.87 Vbe 0.4 0.83 0.3 0.81 Ibe 0.2 Vbe [mV] 0.85 Ibe [mA] 0.5 0.79 Conventional bias circuit S elf control bias circuit (sim.) S elf control bias circuit (cal.) 0.1 0.77 0.0 0.75 -20 -15 -10 -5 Pin [dBm] 0 5 Fig. 8 Simulated Ibe and Vbe of the driver amplifiers. 1.1mm Self base bias control circuit RF transistor RF_out RF_in 0.8mm Fig. 9 Photograph of the fabricated driver amplifier with self base bias control circuit. 20 60 15.0dBm 50 f=1.95GHz, Vcc=Vpc=3.0V Icq=15.3mA 10 40 5 30 32.6mA 0 20 -5 10 Pout Ice -10 -20 -15 -10 -5 Pin [dBm] Ice [mA] Pout [dBm] 15 2.2dBm 0 5 0 Fig. 10 Measured output power and collector current of the fabricated Type-B driver amplifier. 3.0 Iref [mA] 2.5 S elf control bias circuit f=1.95GHz,Icq=15.0mA Vcc=Vpc=3.0V Measured Simulated 2.1mA 2.0 1.5 1.0 -20 -15 -10 -5 Pin [dBm] 2.2dBm 0 5 Fig. 11 Measured Iref of the fabricated driver amplifier with the self control bias circuit. in Fig. 10 that P1dB of 15.0dBm is achieved and that the collector current at P1dB is 32.6mA as the measured results. These measured results agree well with the simulated results shown in Fig. 7. In order to confirm that Ibe and Vbe increase with the increase of input power, Iref is measured instead of Ibe or Vbe. Fig.11 shows measured Iref of the fabricated driver amplifier. It is shown in Fig.11 that the measured Iref is well agreed with the simulated one. Therefore, it is verified that the self base bias control circuit can generates additional base current automatically and that Ibe and Vbe increase with the increase of input power. 4. Conclusion Two low quiescent current HBT PAs were introduced. The first one is CV(Constant Voltage)/ CC(Constant Current) parallel operation HBT PA that is an example of the low quiescent HBT power amplifiers with any additional circuit. The PA is comprised with the parallel connected CV and CC mode HBTs. By combining CV and CC HBT’s in parallel, gain deviations are compensated each other, and adequate ACPR can be achieved over the wide output power range. The total quiescent current of the fabricated CV/CC parallel operation HBT PA can be 9mA lower than that of the conventional CV-mode PA. At the maximum output power region, the PA achieved Pout of 26.8dBm and PAE of 42.0% with ACPR of -40.0dBc. The other is the SiGe HBT driver amplifier with the self base bias control circuit using the p-MOSFET current mirror, that is a kind of smart PA with the internal intelligent bias circuit integrated on a single chip. The proposed bias circuit automatically controls the base voltage of RF transistor according to the output power level, and can achieve high output power and P1dB with low quiescent current. The driver amplifier having the proposed bias circuit realized P1dB improvement of 2.4dB compared with the driver amplifier having the conventional constant base voltage circuit under the same quiescent current of 15.0mA as the simulated results. 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