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Analog Design for Mass Production
Circuits and Analysis
DFM = Design for Manufacturing
Design for Mass-Production
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Analog Design for Mass Production
eCAD Tools
Pspice Freeware Simulator (~6MB download)
Includes simple schematic capture & analog
simulator
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Includes full suite of Cadence Tools for Academic Use
ONLY!
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Analog Design for Mass Production
Current: Sum of the currents at
any node must equal 0.
Currents Entering = Currents
Exiting
Voltage: Sum of the voltages in
a circuit loop must equal 0.
Voltages Supplied = Voltages
Dropped
Recall the Basic Kirchhoff’s Circuit Laws
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Analog Design for Mass Production
Passive Components
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Analog Design for Mass Production
Capacitor Review
• Static Characteristics: C = Q/V
Where 1 Farad = 1 Coulomb per 1 Volt
If C is constant and I try to store more charge on C, its voltage will
increase proportionally
If C is constant and I want to increase the voltage across it, I need to
add more charge
• Dynamic Characteristics:
I(t) = C dV/dt
where; I(t) = capacitor charging current (Amps)
dV/dt = capacitor voltage change (Volt/Sec)
Note: If I(t) is constant, V(t) is a ramping voltage
• Laplace Impedance  1/sC
• Complex Impedance  1/jwC
• Capacitors Add Directly in Parallel Circuit: CEQ = C1 + C2 +…CN
• Capacitors Add Inversely in Series Circuit: CEQ-1 = C1-1 + C2-1 +…CN-1
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Analog Design for Mass Production
Dynamic RC Circuit Behavior Review
+
Where t = RC (time
constant)
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Analog Design for Mass Production
Inductor Review
•
Static Characteristics: L = Fm/I
Where 1 Henry = 1 Weber (Mag Flux) per Amp
Note: 1 Henry = 1 Volt per Amp/Sec = 1 Volt-Sec/Amp
•
Dynamic Characteristics: V(t) = L dI/dt
Where;
V(t) = inductor voltage
dI/dt = inductor current change (Amp/Sec)
Note: If DC current thru an inductor is abruptly stopped (circuit opened),
the induced voltage V(t) will “spike” very high
•
Laplace Impedance  sL
•
Complex Impedance  jwL
•
Inductors Add Directly in Series Circuit: LEQ = L1 + L2 +…LN
•
Inductors Add Inversely in Parallel Circuit: LEQ-1 = L1-1 + L2-1 +…LN-
1
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Analog Design for Mass Production
Dynamic RL Circuit Behavior Review
V/R
Current
Voltage
V
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Analog Design for Mass Production
Parallel Resonance (Infinite
Impedance)
Parallel Impedance Z = sL // (sC)-1
Z = (sL)(sC)-1 / (sL + (sC)-1)
Z = sL / (s2LC + 1)  jwL / (-w2LC + 1)
Note Z  Infinity when w2 = 1/LC  w = (LC)-1/2
(f = 2pw )
Series Resonance (Zero
Impedance)
Series Impedance Z = sL + (sC)-1
Z = s2LC + 1  -w2LC + 1
Note Z  0 when w2 = 1/LC  w = (LC)-1/2
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Analog Design for Mass Production
Electrolytic & Electric Double Layer
• Rolled-Wet electrolyte construction
• Very Polarized, Low Voltage Range
• Ultra High Capacitance Density (5000F available)
• High Cost
• Used in Power Supplies, Power Backup Systems
• Listed on WEEE Restrictions – Item # 15
(2.5x2.5cm)
• Reliability Risk for High Temp or High Vibration
Apps
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Analog Design for Mass Production
Tantalum
• Solid Dielectric construction
• Polarized
• Medium-High Capacitance Density
• Low Voltage Range
• Used for Board Large (Bulk) Decoupling
• Rectangular SMT package
Ceramic
• Solid Dielectric construction in single &
multilayered
• Non-polarized, High Voltage Range
• Low Capacitance Density
• Low Cost
• Used for IC decoupling, low precision timing, filters
• Rectangular SMT package
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Analog Design for Mass Production
Polyester Film, Metalized Polyester
Film
• Solid Dielectric construction in multilayered
• Non-polarized, High Voltage Range
• Medium Cost
• Low Capacitance Density
• Used for medium precision timing, filters
• Rectangular SMT packages
Polypropylene
• Solid Dielectric construction
• Non-polarized, High Voltage Range
• Medium Cost, Low Capacitance Density
• Very Low Leakage
• Used for high precision timing, filters, sample-hold
• Rectangular SMT packages
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Analog Design for Mass Production
Inductors
• Air Core , Ferrous Core Stick & Ferrous Core
Toroid
Note: Air Core May Induce Large Stray Fields
• Shielded and Unshielded
• Inductance will Have Resistance
• Thru Hole & SMT packages
• Rated for Inductance, Max Current, Frequency
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Analog Design for Mass Production
Passive Components, R-L-C
Critical Factors:
1.
Ambient Temperature
2.
Thermal Deratings & Variation of Primary Parameter (Temp Co)
3.
Maximum Imposed Voltage and/or Current
4.
Maximum Imposed dV/dT and/or Frequency
5.
Inductive Frequency (high frequency model)
Minimum Analysis & Selection Considerations:
•
Primary Parameter Tolerances (R, L, C %)
•
Total Power vs Package Dissipation
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Maximum Voltage
•
Composition, Specific die-electrics, construction, etc
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Analog Design for Mass Production
Passive Discretes
• Resistors/Inductors: Must specify or account for Tolerance,
Power, Package and Temp Coefficient
– Derating Guide: ~50% of rated power or current
– Std Tolerances: 0.1%, 1%, 5%, 10% and 20%
– Constructional Anomalies: Max Voltage, Inductive with High Freq
• Capacitors: Must specify or account for Tolerance, WV,
Polarization, Dielectric, Temp Co and Package
– Derating Guide: ~50% of rated voltage
– Std Tolerances: 1%, 2%, 5%, 10%, 20%, 80%
– Constructional Anomalies: Charge Leakage, Inductive with High Freq,
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Analog Design for Mass Production
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Amplifiers
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Analog Design for Mass Production
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Analog Design for Mass Production
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Analog Design for Mass Production
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Analog Design for Mass Production
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Analog Design for Mass Production
Figure 4.33
Small-signal
equivalent
circuits for the
Simple
Small
Signal
Models
forBJT.the BJT
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Analog Design for Mass Production
Common Emitter Amplifier & Small Signal Equivalent
Circuit
Voltage Gain: Av = v /v =
- b (R //R )
O
IN
AC
C
L
(rp + (1 + bAC)RE1)
Current Gain: Ai = iO/iIN =
- bAC RC(R1//R2)/(RC+RL)
(rp + (1 + bAC)RE1) + (R1//R2)
Input Impedance: Ri = vIN/iIN =
(R1//R2)//(rp + (1 + bAC)RE1)
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Analog Design for Mass Production
Transistor Amplifier Load Line Analysis
VCC/RDC
VCC
DC or Static Load Line: VCC = ICRC + VCEq + (IC + IB)RE
Note IC = (bDC)IB & RE = RE1 + RE2
 VCC = IC ( RC + RE + RE/ bDC) + VCEq = IC ( RDC) + VCEq where RDC = RC + RE + RE/ bDC
Now put into the form Y = mX + b where Y = IC & X = VCE
IC = VCE (-RDC )-1 + VCC (RDC )-1   
Y intercept = VCC/RDC
X intercept = VCC
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Analog Design for Mass Production
Transistor Amplifier Load Line Analysis
AC or Dynamic Load Line:
VCC = ICq ( RDC) + iCq ( RAC) + vCE + VCEq
In the form Y = mX + b
 

where RAC = RC//RL + RE1 + RE1/ bAC
IC = VCE (-RAC )-1 + (VCEq/RAC + ICq )
Y intercept = VCEq/RAC + ICq
X intercept = VCC - ICq (RDC - RAC)
The AC or Dynamic Load Line shows the slope the amplifier will actually operate on with signal swing
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Analog Design for Mass Production
Transistor Amplifier Load Line Analysis
Yd
Ys
Q
Xd
Xs
Load Line Comparison:

Static:
IC = VCE (RDC )-1 + VCC (RDC )-1
Dynamic:
IC = VCE (RAC )-1 + (VCEq/RAC + ICq )   Yd = VCEq/RAC + ICq
Ys = VCC/RDC
Xs = VCC
Xd = VCC - ICq (RDC - RAC)
Quiescent Point Q will be at Intersection, For Best Q Point - Bisect the AC Load Line End Points
Note: For Capacitively Coupled Loads RAC < RDC
Therefore Set ICq = VCC/(RDC + RAC)
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Analog Design for Mass Production
General Linear Analog Circuits
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•
Amplifiers and Attenuators
Math Functions (add, subtract)
Oscillators (sinusoidal)
Filters
Voltage Regulators
Voltage References
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Analog Design for Mass Production
General Non-Linear Analog Circuits
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•
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•
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Comparators
Oscillators (non-sinusoidal, square, sawtooth, etc)
Voltage Limiters and Clamps
Rectifiers and Bridges
Math Functions (multiply, divide)
Log and other Non-linear Amplifiers
Sample and Hold Amplifiers
Envelope & Peak Detectors
Phase Detectors
Phased Locked Loops
Switching Voltage Regulators
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Analog Design for Mass Production
Small Signal Amplifiers
Critical Factors:
1.
Component Tolerances, particularly gain setting R’s, Transistor B
2.
OpAmp Input Offset Voltage (Vio), worse for high gain
3.
Input Bias Current (Ib), Input Offset Current (Iio)
4.
Finite Diff Gain (Ad) & Variation of Ad with Frequency
5.
Output Slew Rate and Output Vp-p at Maximum Frequency
Typical DFM Analysis:
• Total DC Offset error in Volts (1,2,3)
• Total Gain Error vs Nominal, Converted to Volts (1,4)
• Power Bandwidth for Application (1,5)
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Analog Design for Mass Production
Basic Gain in Voltage, Current or Combination
Linear Operation: No New Frequencies Created!
•
•
•
•
Voltage Amplifiers (Vin >> Vout):
Current Amplifiers (Iin >> Iout):
Transimpedance (Iin >> Vout):
Transconductance (Vin >> Iout):
Av = Vout/Vin
Ai = Iout/Iin
Zm = Vout/Iin
Gm = Iout/Vin
Additional Parameters
•
•
•
•
Input Impedance: Zin = Vin/Iin
Output Impedance: Zout = {Vout(NL) – Vout(L)}/Iout
Slew Rate (SR): Min dVout/dT
Slew Rate BW = SR/2pVp where Vp = Peak Voltage
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Analog Design for Mass Production
Operational Amplifier – Why?
Linear, Differential, High Gain Amplifier
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Advantages Over Single
Ended Amplifier Block ??
-
• Easy to add positive and negative feedback with
differential input
• Single Ended Application Gains can be tightly controlled
with external components and made insensitive to
internal transistor gain variations
• Inherent noise rejection when noise enters both input
terminals
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Analog Design for Mass Production
Basic Op-Amp Simplified
Implementation
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Analog Design for Mass Production
Operational Amplifier
Ideal Assumptions
Vp
+
Vout
Vn
-
Used for basic analysis,
nominal gain analysis
•
•
•
•
Vout = Ad (Vp – Vn) where Ad is the diff gain
Ad = Infinite
Zin = Infinite, Iin = 0 where Iin is the input current
Vp = Vn because of infinite Ad, Vo may be non-zero
under this condition
• Iout = Infinite (Often a false assumption)
These basic assumptions allow simple circuit analysis to determine
Nominal gain applications
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Analog Design for Mass Production
Operational Amplifier
Power Supplies
Vcc
Vp
+
Vout
Vn
-
Power Supplies can be a
critical consideration
-Vcc
• -Vcc < Vout < Vcc At all times, Vout(max) may be as low as 2 to
5 volts below Vcc depending upon model
• Vcc, -Vcc sometimes referred to as “Rails” due to power
distribution on some boards resembling tracks
• Many applications use “Split” supply Operation
• Split Supply means Vcc = |-Vcc|
• Some models characterized for 1 supply operation (but ALL will work there)
• Single Supply means –Vcc = 0
• Vcc, -Vcc power pins should always be capacitively filtered with
0.1uf (usually ceramic monolithic X7R or similar)
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Analog Design for Mass Production
Operational Amplifier
Many Types Available
Others:
• Video
• Current Feedback
• Power
• Chopper Stabilized
• Electrometer
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
Rf
Ri
Vin
Vout
Rp
Av = - Rf/Ri
Zin = Ri
Inverting Voltage Amp
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
Ri
+
Vin
Vout
Rf
Rp
Av = 1 + Rf/Rp
Zin = Ri +
Non-Inverting Voltage Amp
When Rf=0, Rp=~Infinite…… Av = 1
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
Vin
+
Vout
-
Av = 1
Zin =
Unity Gain Voltage Amp
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
Ri
+
Vin
-
RL
Iout
Rp
Gm = 1/Rp
Zin = Ri +
Transconductance Amp
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
Rf
Iin
Vout
Zm = - Rf
RL
Transimpedance Amp
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Analog Design for Mass Production
Operational Amplifier
Basic Applications
+
Iin
-
RL
Ri
Iout
Rp
Ai = -(1 + Ri/Rp)
Current Amplifier
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Analog Design for Mass Production
Operational Amplifier
Ideal Assumptions
Vp
+
Vout
Vn
-
Used for basic analysis,
nominal gain analysis
•
•
•
•
Vout = Ad (Vp – Vn) where Ad is the diff gain
Ad = Infinite
Zin = Infinite, Iin = 0 where Iin is the input current
Vp = Vn because of infinite Ad, Vo may be non-zero
under this condition
• Iout = Infinite (Often a false assumption)
These basic assumptions allow simple circuit analysis to determine
Nominal gain applications
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Analog Design for Mass Production
Operational Amplifier
Real Characteristics
Ip
Vp
+
Vn
-
Vio
In
Vout
Iout
Used for more accurate
Gain Characterization
• Vout = Ad(Vp – Vn) + Ac(Vp + Vn)/2 + Vio
Ad is the diff gain, Ac is the common mode gain, Vio = offset voltage
•
•
•
•
•
CMRR = Common Mode Rejection Ratio = 20log(Ad/Ac)
Ib = Bias Current (Ave Current = [Ip + In]/2)
Iio = Offset Current (Diff Current = Ip – In)
Iout = Finite, Split between gain set components and load
Vio = Input Diff Voltage reflected back from Vo under the
condition the Vp = Vn = 0
Use superposition to understand contributions
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Analog Design for Mass Production
Operational Amplifier
Real Characteristic Effects
Vp
Basic Strategy
+
Vout
Vn
-
•
•
•
•
Consider the Effect Separately, then combine results
Show Ib and Iio as input current sources
Show Vio as diff voltage on Vp-Vn
Use amended opamp in std application circuit, Vin=0
(grounded).
• Find Vout, all Vout will be Verror due to Offset and Bias
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Analog Design for Mass Production
Inverting Configuration
Offset Error Contribution 1
Rf
Ri
If
Vout
Vio
Ii
Rp
Ii = (0-Vio)/Ri
If = (Vio-Vo)/Rf
Ii = If
Vo = Vio(1 + Rf/Ri) = Verr
Inverting Voltage Amp
Error Voltage due to Vio
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Analog Design for Mass Production
Non-inverting Configuration
Offset Error Contribution 1
Ri
+
Vin
Vout
Vio
Rf
If
Ii
Rp
Ii = (0-Vio)/Rp
If = (Vio-Vo)/Rf
Ii = If
Vo = Vio(1 + Rf/Rp) = Verr
Non-Inverting Voltage Amp
Error Voltage due to Vio
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Analog Design for Mass Production
Op-Amp Technologies (EDN)
Offset Voltage Comparisons
IO
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Analog Design for Mass Production
Op-Amp Technologies (EDN)
Input Bias Current
~10 deg C
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Analog Design for Mass Production
Inverting Amplifier
Offset Error Contribution 2
Rf
Ri
If
Vin
Vout
Iio
Ii
Ib
Ib
Rp
At V+: Iio = Ib + V+/Rp
V+ = Rp(Iio-Ib)
At V-: -V-/Ri = (V--Vout)/Rf + Ib + Iio
Sub V+ into above equation
Vo = Verr = Rf(Ib-/+Iio) - [((RfRp)/Ri + Rp)(Ib+/-Iio)]
Note if Iio = ~0 and Rp = Rf//Ri, then Verr = 0
Verr is always minimized when Rp = ~Rf//Ri
Inverting Voltage Amp
Error Voltage due to Ib, Iio
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Analog Design for Mass Production
Non-Inverting Amplifier
Offset Error Contribution 2
Rf
Rp
If
Vout
Iio
Ip
Ib
Ib
Ri
At V+: Iio = Ib + V+/Ri
V+ = Ri(Iio-Ib)
At V-: -V-/Rp = (V--Vout)Rf + Ib + Iio
Sub V+ into above equation
Ii
Vin
Vo = Verr = Rf(Ib-/+Iio) - [((RfRi)/Rp + Ri)(Ib+/-Iio)]
Note if Iio = ~0 and Ri = Rf//Rp, then Verr = 0
Verr is always minimized when Ri = Rf//Rp
Non-Inverting Voltage Amp
Error Voltage due to Ib, Iio
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Analog Design for Mass Production
Inverting Amplifier
Gain Error
Rf
Ri
Av (nom) = - Rf/Ri
But Assume Vout = Ad(V+ - V-)
If
Vin
Vout
Ii
Rp
Find expressions for V+ & VSubstitute into above Vout
Solve for Vout/Vin = Av
Av = -(RfAd)/(RiAd + Ri + Rf)
Av = Av(nom)/CF
CF = Correction Factor
CF = 1 + 1/Ad + Rf/(RiAd)
Don’t Forget to Factor in Res Tol% !
|Av| < |Av (nom)|
Inverting Voltage Amp
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Analog Design for Mass Production
Non-Inverting Amplifier
Gain Error
Ri
+
Vin
Vout
Av (nom) = 1+ Rf/Rp
But Assume Vout = Ad(V+ - V-)
Rf
Find expressions for V+ & VSubstitute into above Vout
Solve for Vout/Vin = Av
Rp
Av = Ad(Rp + Rf)/(RpAd + Rp + Rf)
Av = Av(nom)/CF
CF = Correction Factor
CF = 1 + 1/Ad + Rf/(RpAd)
Don’t Forget to Factor in RTol% !
|Av| < |Av (nom)|
Non-Inverting Voltage Amp
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Analog Design for Mass Production
Operational Amplifier
Gain Error
Rf
Ri
If
Vin
Vout
Ii
Largest Error will be due to Rtol !!
Rp
Gain Error = Av(nom) – Av
Verr from Gain Error
Verr = Vin(max) * Gain Error
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Analog Design for Mass Production
Total Error
• Verr due to Gain Error incl Resistor tolerance
• Verr due to Offset and Bias Effects
• Requirements may dictate an outright nominal gain plus
a total error voltage or current budget
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Analog Design for Mass Production
Example
10K
5%
+
0.1V
Vout
TLO72C
-
10K
1%
1K
1%
• Find Overall Worst Case DC Error Voltage
Nominal Gain = 1+Rf/Ri = +11.0
Nominal Output = 1.1V
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Analog Design for Mass Production
Analysis requires opamp data sheet info
10K
5%
+
0.1V
Vout
TLO72C
-
10K
1%
1K
1%
TL072C over 0-70C:
Ib(max) = 7nA
Iio(max) = 2nA
Vio(max) = 13mV
Avo(min) = 15000
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Analog Design for Mass Production
Non-Inverting Amplifier
Gain Error
10K
5%
+
0.1V
Vout
TLO72C
-
10K
1%
Av (nom) = 1+ Rf/Rp = 11.0
Av (min)  Rf down 1%  9.9KW,
Rp up 1%  1.01KW
Av = Ad(Rp + Rf)/(RpAd + Rp + Rf)
1K
Av = Av(nom)/CF
CF = Correction Factor
CF = 1 + 1/Ad + Rf/(RpAd)
1%
Av(min) = 15K(1.01+9.9) / [(15K)(1.01) + 9.9 + 1.01] = 10.79
Error from nominal = (0.1V)(11.0 – 10.79) = 0.021  21mV
Av(max) = 1 + (10.1 / 0.99) = 11.20 (Assume Ad is max)
Error from nominal = (0.1V)(11.20 – 11.0) = 0.020  20mV
Worst Case Gain Error assuming Vin = 0.1V = 20mV or 21mV
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Analog Design for Mass Production
Non-inverting Configuration
Offset Error Contribution 1
10K
5%
+
0.1V
Vout
TLO72C
-
10K
1%
Verr1 = Vio(1 + Rf/Rp)
1K
1%
Verr1a(max) = 13mV(1 + 10.1/0.99) = 145.6mV
Verr1b(max) = 13mV(1 + 9.9/1.01) = 140.4mV
Worst Case Offset 1 Error = 145.6mV or 140.4mV
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Analog Design for Mass Production
Non-Inverting Amplifier
Offset Error Contribution 2
10K
5%
+
0.1V
Vout
TLO72C
-
10K
1%
Verr2 = Rf(Ib-/+Iio) - [((RfRi)/Rp + Ri)(Ib+/-Iio)]
1K
1%
Verr2 = 10(7nA-/+2nA) – [(10)(10)/1 + 10](7nA+/-2nA)
Verr2 worst case = ~1mV
Worst Case Offset 2 Error = ~1mV
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Analog Design for Mass Production
Total Error
• Verr due to Gain Error = 19.0mV
• Verr due to Offset 1 = 145.6mV
• Verr due to Offset 2 = 1mV
Answer: Worst Case Total Error = 165.6mV (when Rf = max, Rp = min)
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Analog Design for Mass Production
Operational Amplifier
Gain vs Bandwidth Tradeoff
Rf
Ri
Vin
Vout
Rp
Av = - Rf/Ri = Nominal Closed Loop Gain
Ad (Op-amp) = Open Loop Gain
• Ad rolls off with frequency, 20db/dec, after first pole (~ 1 to 100 Hz)
• Bandwidth of Closed Loop Gain, Fcl, limited by Ad(f)
• Av <= Ad (fcl)
• Ad(0) = Typically 60dB to 140dB or higher
• When Ad(f) = 1, f = Unity Gain Freq
• Above fcl, Av will fall at 20db/dec (8db/oct)
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Analog Design for Mass Production
Common Sensor Interface Requirements (EDN)
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Analog Design for Mass Production
Filters
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Analog Design for Mass Production
Filters
Critical Factors:
1.
Passive Component Tolerances
2.
OpAmp Input Offset Voltage (Vio), worse for high gain
3.
Input Bias Current (Ib), Input Offset Current (Iio)
4.
Loading effects of input source, output loads
5. Output Slew Rate and Output Vp-p at Maximum Frequency
Worst Case Analysis:
• Transfer Function Analysis
• Total DC Offset error in Volts (1,2,3)
• Mag (dB) & Phase (deg) vs Frequency Plots (1,4)
• Power Bandwidth for Application (1,5)
• Pulse Response (topology, 4)
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Analog Design for Mass Production
Filter Basics
Linear Operation Must Be Maintained:
• Gain is Frequency Dependent but ….
• No New Frequencies are Created
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Analog Design for Mass Production
Basic Low Pass Filter
Potential Filter Shapes
65
Analog Design for Mass Production
Basic High Pass Filter
Potential Filter Shapes
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Analog Design for Mass Production
Basic BandPass Filter
Potential Filter Shapes
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Analog Design for Mass Production
Basic BandStop Filter
Potential Filter Shapes
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Analog Design for Mass Production
Filter Basics
General 2nd Order Transfer Function
where;
2nd order Filter Transfer Function Analysis Shaping:
• Shaping Factor Q aka as Quality Factor
• Q is related to the Damping factor Q = 1/(2a)
1. Put Xfer Function into form with D(s) above, Coef of S2 must
be 1
2. Find expression for Wo by equating coefficient of S0
3. Then find Q and/or a by equating coefficient of S1
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Analog Design for Mass Production
Effect of Shape Factor on Filters
Lowpass
Bandpass
Highpass
Bandstop
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Analog Design for Mass Production
Filter Scaling
Filter Scaling:
• All filter coefficients and polynomials are
normalized to Wo = 1 rad/sec
• To rescale, replace S with S/Wo(new)
• Given an RC implementation circuit, Wo may also
be moved by rescaling the Capacitors
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Analog Design for Mass Production
Basic 2nd Order Implementations - Hambley
Lowpass
Highpass
Bandpass
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Analog Design for Mass Production
Example
C
+15V
4R
R
0.1uF
TLO72C
Vi(s)
Vo(s)
0.1uf
C
•
•
•
•
-15V
Find the circuit transfer function Vo(s)/Vi(s)
Find the Frequency Response |Av(jw)| and /_Av(jw)
Find the Filter Type and Design Equations for Fc or Fo and Q
Start by assuming an ideal opamp is utilized
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Analog Design for Mass Production
Example
C
+15V
4R
R
B
Vi(s)
0.1uF
TLO72C
Vo(s)
0.1uf
A
C
Analysis
-15V
• At Node B:
(Vb = Vo)
(Va-Vo)/4R = VosC   Va = Vo(1 + 4sRC)
Vo
• At Node A:
Looks like a Lowpass Filter Transfer Function
At F = 0hz  Av = 1
At F =
(Vi-Va)/R = (Va-Vo)sC + (Va-Vo)/4R
hz  Av = 0
Substitute and solve for Vo/Vi = Av(s)
Av(s) = 1 / {(2RC)s2 + (5RC)s + 1}
74
Analog Design for Mass Production
Example
C
+15V
4R
R
Vi(s)
B
0.1uF
TLO72C
Vo(s)
0.1uf
A
C
Av(s) = 1 / {(2RC)2s2 + (5RC)s + 1}
-15V
Av(jw) = 1 / {-(2RC)2w2 + (5RC)jw + 1}
Vo
| Av(jw)| = 1 / sqrt {Real2 + Imag2}
| Av(jw)| = 1 / sqrt { [1-(2RCw)2]2 + [5RCw]2 }
Example: R = 10K, C = 0.01uF
/_ Av(jw) = Tan-1(Num) - Tan-1(Den)
F = 100Hz  |Av| = 1.0  |Av|dB = -0.28
/_ Av(jw) = 0 - Tan-1(Imag/Real)
F = 1Khz  |Av| = 0.31  |Av|dB = -10.09
F = 10Khz  |Av| = 0.006  |Av|dB = -44.08
1 Decade = -40dB
F = 100Khz  |Av|dB = -88
2nd Order Lowpass Filter
/_ Av(jw) = 0 - Tan-1{[5RCw]/ [1-(2RCw)2]}
75
Analog Design for Mass Production
Example
C
+15V
4R
R
Vi(s)
B
0.1uF
TLO72C
Vo(s)
0.1uf
A
C
-15V
Av(s) = 1 / {(2RC)2s2 + (5RC)s + 1}
Vo
Av(s) = 1/(2RC)2 / {s2 +(5/(2RC))s + (1/(2RC)2)}
In the 2nd order form of …
Av(s) = G wo2 /{s2 + (wo/Q)s + wo2}
Example: Design a 2nd order lowpass filter with Fo = ~800hz
Fo = 1/(4p(10k)(0.01uf))  795 hz
Let R = 10K, 4R = 40K, C = 0.01uf
wo2 = 1/(2RC)2 =  wo = 1/2RC  Fo = 1/(4pRC)
wo/Q = 5/(4RC)  (1/2RC)/Q = 5/(4RC)
 Q = 2/5 = 0.40
G wo2 = 1/(2RC)2  G = 1
76
Analog Design for Mass Production
Summary of Basic Biquadratic
Filter Transfer Functions T(s):
Note: Many texts will define Fo
as the –3dB frequency or corner
frequency.
However, it is really just the
“peak” of the transition band
range of the filter as shown on the
response curves. The actual value
of Av (or T) depends on the
damping factor Q of the filter.
77
Analog Design for Mass Production
Classic Multi-Function Filter Design
Summing
Inv Amp
Vout BP
Vin
-1
R1
-1
C1
R2
+
C2
A1
-1
Vout HP
A2
Vout LP
Rp
Rp
Inv Amp
-B
78
Analog Design for Mass Production
79
Analog Design for Mass Production
Filter Simulation of Component Tolerances
Worst Case Analysis:
• Transfer Function Analysis
• Total DC Offset error in Volts
• Mag (dB) & Phase (deg) vs Frequency Plots
• Power Bandwidth for Application
• Pulse Response
80
Analog Design for Mass Production
81
Analog Design for Mass Production
82
Analog Design for Mass Production
Linear
Oscillators
83
Analog Design for Mass Production
Oscillators
Critical Factors:
1.
Passive Component Tolerances
2.
Loading effects of output loads
3.
Output Slew Rate and Output Vp-p at Frequency of Oscillation
Worst Case Analysis:
• Transfer Function Analysis of any Linear Feedback Circuit
• Forward path gain Analysis at 0 or 180 deg phase response
• Mag (dB) & Phase (deg) Margins vs Frequency Plots (1,2)
• Variation of Fo (1,2)
• Power Bandwidth (3)
84
Analog Design for Mass Production
Oscillators
Oscillation Crition:
1. The open loop gain (gain around the loop) must be exactly = 1.0
2. The open loop phase (phase around the loop) must be exactly =
0o
Typically 2 types of amplifiers are utilized
Non-Inverting: Phase contribution = 0o = 360o
Inverting: Phase contribution = 180o
85
Analog Design for Mass Production
Wein Bridge Oscillator
Operational amplifier gain
G
V1( s )
Vs ( s )
1
R2
R1
RC Feedback Network Gain
R // (1/sC)  R / (1 +
sCR)
R//(1/sC)
R//(1/sC) + R + 1/sC
R / (1 + sCR)
R/(1 + sCR) + R +
1/sC

sCR
(sCR)2 + 3sCR + 1
Total Loop Gain Ab(s)
(1 + R2/R1)(sCR)
(sCR)2 + 3sCR + 1
86
Analog Design for Mass Production
Wein Bridge Oscillator
Total Loop Gain – Steady State Analysis
(1 + R2/R1)(sCR)
(1 + R2/R1)(jwCR)

(sCR)2 + 3sCR + 1
- (wCR)2 + 3jwCR +
1
Total Loop Gain – Magnitude |Ab(jw)|
(1 + R2/R1)(wCR)
SQRT {[1 - (wCR)2]2 + [3wCR]2}
Total Loop – Phase /_Ab(jw)
90o – TAN-1
3wCR
1 - (wCR)2
Total Loop Phase /_Ab(jw) including
inverting amplifier must be 0 to satisfy
criterion #2
3wCR
270o – TAN-1
= 0o
1 -
(wCR)2
87
Analog Design for Mass Production
Wein Bridge Oscillator
Total Loop Phase /_Ab(jw) including
inverting amplifier must be 0 to satisfy
criterion #2
3wCR
- TAN-1
= 90o
1 -
(wCR)2
Can only occur, when;
1 - (wCR)2 = 0
w= 1/RC

Total Loop – Magnitude |Ab(jw)| @ w =
1/RC Must be = 1.0 to satisfy criterion #1
(1 + R2/R1)
= 1.0

(R2/R1) = 2.0
SQRT {[3]2}
If R2/R1 = 2, oscillations occur
If R2/R1 < 2, oscillations attenuate
If R2/R1 > 2, oscillation amplify and then saturate
88
4.0V
A=3
0V
-4.0V
0s
0.2ms
0.4ms
0.6ms
0.8ms
1.0ms
0.6ms
0.8ms
1.0ms
V(R5:2)
Time
4.0V
A = 2.9
0V
-4.0V
0s
0.2ms
0.4ms
V(R5:2)
Time
20V
A = 3.05
0V
-20V
0s
100us
V(R5:2)
200us
300us
Time
400us
500us
600us
Analog Design for Mass Production
90
Analog Design for Mass Production
Adding Crude Automatic Gain Control
Diodes D1 and D2 begin
conducting when sufficient
amplitude is reached at Vo
They effectively combine R4 in
parallel with R3 for some of the
voltage swing
91
Analog Design for Mass Production
Results of Diode Network
• With the use of diodes, the non-ideal op-amp can
produce steady oscillations.
• Output waveform will show some distortion due to
discontinuity caused from diode switching every cycle
4.0V
0V
-4.0V
0s
0.2ms
0.4ms
0.6ms
0.8ms
1.0ms
V(D2:2)
Time
92
Analog Design for Mass Production
Improved Automatic Gain Control
P-Channel FET Q1 begins increasing Rds when
sufficient amplitude is reached at Vo
• D1 is used to rectify and sample the output voltage
• R1, R2 and C1 are used to filter and store a scaled
version of the sampled, rectified output voltage
• Rg + RQ1 (Rd ON) is set to = ~ RF / 2
• When the voltage on C1 increases as oscillations
startup, RQ1 starts to increase which decreases the
amplifier gain.
• The entire effect is completely linear so virtually no
distortion is imposed on the output sine wave
93
Analog Design for Mass Production
Phase Shift Oscillator
Note A is Inverting
Bubba Oscillator (Modified Phase Shift)
Note A is Inverting
94
Analog Design for Mass Production
Comparators & Timers
Definition 1: A class of circuits in which 2 analog voltages are compared and the
output is a digital signal indicating > or <
Definition 2: An integrated circuit which has a high gain differential amplifier input
stage similar to an op-amp but an output stage which is only capable of driving
a digital signal corresponding to the > or < condition of the inverting and noninverting inputs
95
Analog Design for Mass Production
Comparators
Critical Factors:
1.
Passive Component Tolerances, Diode Clamp Tolerances
2.
Input Offset Voltage (Vio)
3.
Input Bias Current (Ib), Input Offset Current (Iio)
4.
Voh, Vol clamping voltages
5.
Output Slew Rate and Delay
6.
Vref Tolerance
Worst Case Analysis:
• Vutp and Vltp (upper and lower trip points, 1,2,3,4,6)
• Total hysteresis voltage (1-4,6)
• Max switching frequency (5)
96
Analog Design for Mass Production
Comparator Circuit
Vcc
Vcc
Rb
-
Non-linear opamp output
--
Vin
Vout
+
Rf
Vout = Vh or Vout = VL
Vh < Vcc, VL > -Vcc
Vh and VL values typically 0.5 to 3V below Vcc
V+ = {(Vout – Vref) (Ri) / (Ri + Rf)} + Vref, V- =
Vin
Ri
Positive Feedback
Hysteresis Resistor
Vref
When V+ > V-, then Vo = Vh
When V+ < V-, then Vo = VL
Vin is compared against Vref
Assume Vo = Vh and V+ >V- but Vi is increasing
If Vi > (Vout – Vref) (Ri) / (Ri + Rf) + Vref, Vo 
VL
The upper trip point (Vutp) is found as;
Vutp = {(Vh – Vref) (Ri) / (Ri + Rf)} + Vref
97
Analog Design for Mass Production
Comparator Circuit
Vcc
Vcc
Rb
-
Non-linear opamp output
--
Vin
Vout
+
Rf
Ri
Positive Feedback
Vout = Vh or Vout = VL
Assume now Vo = VL and V+ <V- but Vi is
decreasing
If Vi < (VL – Vref) (Ri) / (Ri + Rf) + Vref, Vo 
Vh
The lower trip point (Vltp) is found as;
Hysteresis Resistor
Vref
Vltp = {(VL – Vref)(Ri) / (Ri + Rf)} + Vref
When V+ > V-, then Vo = Vh
When V+ < V-, then Vo = VL
Vin is compared against Vref
98
Analog Design for Mass Production
Comparator Circuit Example
+Vcc
-Vcc
Rb
--
Vin
Vout
Vltp = {(VL – Vref)(Ri) / (Ri + Rf)} +
Vref
+
Rf
Vutp = {(Vh – Vref)(Ri) / (Ri + Rf)} +
Vref
Vh
Ri
Vref
Vref
Vltp
Vutp
The rectangular shape is known as a
Hysteresis Diagram
Vl
99
Analog Design for Mass Production
Comparator Circuit Example
+15V
-15V
10K
--
Vin
Vout
+
100
K
Vh = ~13V
VL = ~-13V
Vltp = {(-13 – 5) (10k) / (10k + 100k)} + 5
Vltp = 3.36V
Vutp = {(13 – 5) (10k) / (10k + 100k)} + 5
Vutp = 5.73V
13v
10K
5v
Vref = 5V
3.36v
5.73v
Vhyst = Vutp – Vltp = 2.37V
-13v
100
Analog Design for Mass Production
Vcc
Vcc
Rb
-
--
Vin
Controlling Vh and VL voltages
Vh or VL
+
Rf
Ri
Must have current limiting
Resistor RL when using a
Voltage Clamp
RL
Vout
(Vh-Vout)/RL < Imax for
opamp
Imax (typical) = ~ 5mA
Voltage
Positive Feedback
Hysteresis Resistor
Clamp
Vref
Controlling Vh and VL give greater utility for Comparator
101
Analog Design for Mass Production
Controlling Vh and VL voltages
RL
D1
Vout
D1
D4
D4
Z1
Z1
Voltage
Clamp
D2
D5
Z2
D2
D3
D3
Diode String Clamp
Vh = Vd1+Vd2+Vd3 = ~2.1v
VL = -Vd4-Vd5 = ~-1.4v
Stacked Zener
Clamp
Vh = Vd1+Vz2
VL = -Vz1-Vd2
Zener Bridge Clamp
Vh = Vd1+Vd2+Vz1
VL = -Vd3-Vd4-Vz1
Vh = -VL
Types of Voltage Clamps
102
Analog Design for Mass Production
Vcc
Vcc
Rb
-
--
Vin
Controlling Vh and VL voltages
Vh or VL
+
Rf
RL
Vout
Vh
Ri
Voltage
Positive Feedback
Hysteresis Resistor
Clamp
Vref
Vref
Vutp
Vltp
NOTE: If Vh < Vref, Vref may be
outside of Vltp-Vutp window
But hysteresis will still work
Vl
103
Analog Design for Mass Production
Schmitt Trigger - Comparator
Vcc
Vcc
Rb
-
--
Vin
Vout
Vltp = (VL) (Ri) / (Ri +
Rf)
+
Rf
Vutp = (Vh) (Ri) / (Ri +
Rf)
Ri
Vref = 0
In a Schmitt Trigger, Vref = 0V
104
Analog Design for Mass Production
Comparator – RC Oscillator
R2
D2
D1
R1
Vcc
Vcc
Rb
Vin
RL
--
Vout
+
C
Rf
Ri
Voltage
Clamp
Vref = 0
Schmitt Trigger used in a Relaxation Oscillator
105
Analog Design for Mass Production
Comparator – RC Oscillator
R2
D2
D1
R1
Vcc
Vcc
Rb
Vin
RL
-
Vout
Th = -(R1C) ln{(Vutp-Vh-Vd1)/(VltpVh+Vd1)}
+
C
Rf
Ri
Vref = 0
TL = -(R2C) ln{(Vltp-VL-Vd2)/(VutpVL+Vd2)}
Voltag
e
Clamp
Note:
For Ri = Rf = Rb, R1//R2 = R, No Diodes & Vh = VL
Vutp = -Vltp = 1/2Vh
Th = -(RC) ln {(Vutp-Vh)/(Vltp-Vh)} = -RC ln (1/3)
TL = - RC ln (1/3)
F = -1 / {2RC ln (1/3)} = 0.455/RC
Individual High and Low Times can be set with Th & TL
106
Analog Design for Mass Production
Comparator – RC Oscillator
R2
D2
D1
R1
Vcc
Vcc
Rb
Vin
RL
-
Vh
Th
Vout
+
C
Vutp
Rf
0
Ri
Vref = 0
Voltag
e
Clamp
Vltp
TL
VL
Capactor Voltage & Output Waveforms
107
Analog Design for Mass Production
Voltage Regulators, Power Supplies
Critical Factors:
1.
Passive Component Tolerances (voltage set resistors)
2.
Loading effects
3.
Input voltage DC, AC and noise levels
4.
Filtration Capacitors
5. Ambient Temperature
Worst Case Analysis:
• DC Output voltage variation (1,2,3)
• AC Output ripple, noise (2,3,4)
• Critical device power dissipation, Junction Temp (2,3,5)
• Startup Output voltage vs Input voltage vs Time (2,3,4)
• Safety Considerations
108
Analog Design for Mass Production
Typical Linear Regulator Circuit
Pass Transistors May be Reconfigured for
LDO or Low Dropout Performance
Note: Power Dissipated = (Vin-Vout)Iin
109
Analog Design for Mass Production
Typical Thermal Shutdown
Protection System
Pass Transistor is Forced
Off in Thermal Shutdown
Most low cost regulators do
NOT latch this condition
110
Analog Design for Mass Production
Basic Buck Switching Regulation Sys
Vin > Vout
Basic Boost Switching Regulation Sys
Vin < Vout
111
Analog Design for Mass Production
Buck-Boost Inverting Switching
Regulation System Architecture
Coasting Diode Conducts Inductor
Current during the Switch Off Cycle
which pulls current from Load creating a
negative polarity on the Capacitor
Coasting Diode is reverse biased during
the Switch On Cycle. Capacitor C
continues load current direction due to
negative charge
112
Analog Design for Mass Production
Capacitor Equiv Circuit
With Parasitics Modeled
113
Analog Design for Mass Production
DATA ACQUISITION
Basics of Converter Technology
•
•
•
•
•
•
Function
Data Sheet Characterizations
Quantization Error and SNR
Gain, Offset Errors
Linearity Errors and THD
SINAD
114
Analog Design for Mass Production
DATA ACQUISITION
BASICS
ANALOG VOLTAGE RANGE
VFS
QUANTIZED INTO
2n LEVELS
WHERE n = # OF BITS
Nominal Quantization Step
0 1 2 3 4 5 6 7 8 9 10 11
Nominal Step Size Q = VFS/2n
Highest Voltage Step = VFS – Q
Max Count = 2n –1 (0 is a valid step)
115
Analog Design for Mass Production
Quantization Error
Note: Last step occurs at
VFS(N-1)/N under ideal
conditions
Quantization Error
Voltage is Measured
as Fraction of a
reference Vref
VFS = Vref
Ideal 3 Bit A/D Converter Transfer Function
116
Analog Design for Mass Production
Analog Signal
Quantized
Representation
of Analog Signal
Quantization
Error Voltage
117
Analog Design for Mass Production
n
A/D
D/A
• Max Quantization Error:
Qerr = VFS/(2n) = 1 bit
118
Analog Design for Mass Production
SNR = 20 log(2(n-1) * sqrt(6) )
= 20log (2(n-1)) + 20log (sqrt(6))
= 20(n-1)log(2) + 20log (sqrt(6))
= 20nlog(2)-20log(2)+20log (sqrt(6))
= 20nlog(2) + 20log (sqrt(6)/2)
= 6.02n + 1.76
n
A/D
D/A
Sinewave MAX SNRDB = 6.02n + 1.76
• Max Quantization Error, Qerr = VFS/(2n) = 1 bit
• More Resolution (higher n) means less quantization error
• Examples:
VFS = 10V, n = 8 Bit, Qerr = 39.96mV, SNRmax = 49.9DB
VFS = 10V, n = 12Bit, Qerr = 2.44mV, SNRmax = 74.0DB
VFS = 10V, n = 16Bit, Qerr = 0.16mV, SNRmax = 98.1DB
• More Resolution may require, slower speed, higher power
119
Analog Design for Mass Production
Converter Offset Error
• Example of ½ Bit Offset Error
• Offset Error: Shifts Ideal Staircase Function Right (+) or
Left (-) by Max Voltage or Max LSBs
120
Analog Design for Mass Production
Converter Gain Error
• Gain Error will change the converter “slope”
• Gain Error: Changes Ideal Staircase Function so that last
step is not at VFS(N-1)/N
121
Analog Design for Mass Production
Integral Linearity Error: Max Deviation from Ideal Straight Line
(INL: Integral Non-Linearity)
Xfer Curve drawn at midpoint of each input step (ideal vs actual)
122
Analog Design for Mass Production
Differential Linearity Error: Max Deviation from Ideal Step Size
(DNL: Differential Non-Linearity)
DNL max > 1 Bit can lead to missing codes
123
Analog Design for Mass Production
Linearity Errors Induce Harmonic Distortions
D/A
124
Analog Design for Mass Production
SINAD: Signal-to-Noise Ratio and Distortion
ENOB: Effective Number of Bits
• Combination of SNR and THD specifications
• Measure of overall “usable” Dynamic Performance
In Ideal Converter ENOB = n
125
Analog Design for Mass Production
Power Supplies are Extremely Important !!
• PSRR: Power Supply Rejection Ratio
Measure of output noise injected by PS noise
• PSRR is function of frequency
Degrades with frequency
A/D converters require “quiet” supply voltages
Use adequate bypass capacitances
Isolate supply voltages using separate regulators
126
Analog Design for Mass Production
A/D Converter Architectures
•
•
•
•
Flash
Integrating
Successive Approximating
Sigma - Delta
High Speed, High Power
High Resolution, Parallel
Low Resolution, High Speed
High Resolution, Low Cost
127
Analog Design for Mass Production
Successive Approximating
(SAR)
END OF CONV
SUCCESSIVE
Decision signal
n-1
n-2
n-3
APPROXIMATION
n
REGISTER
CLOCK
CONTROL
Clock
OUTPUT
n-n
BITS
V Ref
n-1
COMPARATOR
B
BIT
n-2
n-3
D/A
V in
Buffer
Converter
n-n
Advantages: Accuracy & Linearity of Conversion
128
Analog Design for Mass Production
Integrating
Advantages: Cost, Simplicity
n-1
n-2
n-3
V in
n Output
Bits
COUNTER
Buffer
n-n
CLOCK
COMPARATOR
Clk
Clr
Current
Source
I
CONTROL
C
129
Analog Design for Mass Production
Advantages: Speed, Linearity
FLASH
V Ref
n-1
n-1
n-2
OUTPUT
LOGIC
REGISTER
V in
BUFFER
n-2
n Output
Bits
n-3
n-n
2n –1 COMPARATORS
1
130
Analog Design for Mass Production
Sigma-Delta (SD)
Oversampling Converter
Lowpass Filter
Advantages: Minimal Reliance on
Analog Component Quality, Cost
Digital Decimator
131
Analog Design for Mass Production
First Order Sigma-Delta Modulator Block Diagram
B
C
D
X
W
Oversampling
132
Analog Design for Mass Production
Example: Vin = 3/8VDC, Vfs = 1V
X
B
C
D
X
W
Ave
Value =
3/8
Normalized to 1V but can be +/-Vref
Repeat
Produces a Bit Stream with an average value equal to the incoming sample voltage
133
Analog Design for Mass Production
Example: Vin = 1 Cycle Sinusoid with Amplitude = Vref
64X Oversampling
X
B
C
D
W
134
Analog Design for Mass Production
Introduction to Electronic Noise
• Inherent vs External Noise Sources
• Types of Inherent Noise
• Noise Models
135
Analog Design for Mass Production
Inherent Electronic Component Noise
Inherent Device Noise:
•
Internally Generated in Devices from Thermal Energy
•
Internally Generated in Devices from Charge Carrier Motion
•
May be related to Manufacturing Processes
Reduction Strategies:
•
Increased power consumption, bias current
•
Changing circuit topology
•
Optimizing R, C and L values
136
Analog Design for Mass Production
External Noise:
External Noise
•
Electromagnetic Radiated and Conducted
•
Noise from Xfmrs, Power Sources and Supplies
•
Cross Talk and Interference from Other Signals
•
Device Substrate Noise from other nearby devices on the same
substrate
• Power Supply Noise and PSRR
Reduction Strategies:
•
Common Mode Chokes, Ferrites
•
Optimizing Circuit Layouts
•
Shielding
•
Isolated Power Supply, Grounding
137
Analog Design for Mass Production
Electronic Noise Properties
•
Caused by the discrete nature of charge currents including
charge carriers, junctions and geometry
•
Semiconductor Substrate & Process Dependencies
•
There exists a fundamental SNR and smallest useable
signal that can be processed by the devices above the noise
levels
•
Can only be minimized and not completely removed
138
Analog Design for Mass Production
139
Analog Design for Mass Production
Noise is often expressed as a Volts per Root-Hz
(Noise voltage integrated over frequency in above integral)
140
Analog Design for Mass Production
141
Analog Design for Mass Production
Inherent Noise Sources Presented are Uncorrelated!
142
Analog Design for Mass Production
For lower noise, limit bandwidth to only that required for signals
143
Analog Design for Mass Production
(aka: Johnson Noise)
1.380658E-23 J/K
Example: vn = SQRT{4(1.38E-23J/K)(300K)(1000Ohms)(1Hz) = 4.07nV/RHz
144
Analog Design for Mass Production
145
Analog Design for Mass Production
elementary charge q
1.60217733 E-19 C
1K resistor with 50uA from before: Shot Noise Calculation
in = SQRT {2(1.602E-19)(50uA)(1hz)} = 4.0027E-9 mA/RHz
vn = in(1000ohms) = 4.0027nV/RHz
146
Analog Design for Mass Production
147
Analog Design for Mass Production
High Dependency on Semiconductor Process
Ask Semi Mfg what their flicker noise characterization is for a given process
148
Analog Design for Mass Production
149
Analog Design for Mass Production
150
Analog Design for Mass Production
151
Analog Design for Mass Production
152
Analog Design for Mass Production
153
Analog Design for Mass Production
154
Analog Design for Mass Production
155
Analog Design for Mass Production
Appendices
156
Analog Design for Mass Production
Passive Component Specifications
Passive Discrete Specifications
Nominal
Adjustment
Value or
Range,
Max Value
%/Turn
Tolerance
Around
Nominal
Derated
Pow er
Capacity
Maximum
Working
Voltage
Maximum
Constant
Current
Maximum
Surge
Current
Composition Q Factor or
Dielectric or Frequency
Form
Variation
Package
Component
Resistor
Potentiometer
Fixed Capacitor
Variable Capacitor
Fixed Inductor
Variable Inductor
Key:
Mandatory
Recommended
Not Applicable
157
Analog Design for Mass Production
Analog Circuit DFM Analysis Guide
158
Analog Design for Mass Production
Classic 555 Timing IC – Not Recommended for New Designs
In early bipolar versions, R = 5K, hence the “555” name
159
Analog Design for Mass Production
555 Timing IC
Pulse Generator Application of Typical 555 Timer IC
160
Analog Design for Mass Production
555 Timing IC
Relaxation Oscillator Application of Typical 555 Timer IC
161