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Analog Design for Production Circuit Types and Analysis DFM = Design for Manufacturing 1 Analog Design for Production Passive Components, RLC Critical Factors: 1. Ambient Temperature 2. Thermal Deratings & Variation of Primary Parameter (Temp Co) 3. Maximum Imposed Voltage and/or Current 4. Maximum Imposed dV/dT and/or Frequency 5. Inductive Frequency (high frequency model) Minimum Analysis & Selection Considerations: • Primary Parameter Tolerances (R, L, C %) • Total Power vs Package Dissipation • Maximum Voltage • Composition, Specific die-electrics, construction, etc 2 Analog Design for Production Passive Discretes • Resistors/Inductors: Must specify or account for Tolerance, Power, Package and Temp Coefficient – Derating Guide: ~50% of rated power or current – Std Tolerances: 0.1%, 1%, 5%, 10% and 20% – Constructional Anomalies: Max Voltage, Inductive with High Freq • Capacitors: Must specify or account for Tolerance, WV, Polarization, Dielectric, Temp Co and Package – Derating Guide: ~50% of rated voltage – Std Tolerances: 1%, 2%, 5%, 10%, 20%, 80% – Constructional Anomalies: Charge Leakage, Inductive with High Freq, 3 Analog Design for Production Passive Component Specifications Passive Discrete Specifications Nominal Adjustment Value or Range, Max Value %/Turn Tolerance Around Nominal Derated Pow er Capacity Maximum Working Voltage Maximum Constant Current Maximum Surge Current Composition Q Factor or Dielectric or Frequency Form Variation Package Component Resistor Potentiometer Fixed Capacitor Variable Capacitor Fixed Inductor Variable Inductor Key: Mandatory Recommended Not Applicable 4 Analog Design for Production Small Signal Amplifiers Critical Factors: 1. Component Tolerances, particularly gain setting R’s 2. OpAmp Input Offset Voltage (Vio), worse for high gain 3. Input Bias Current (Ib), Input Offset Current (Iio) 4. Finite Diff Gain (Ad) & Variation of Ad with Frequency 5. Output Slew Rate and Output Vp-p at Maximum Frequency Worst Case Analysis: • Total DC Offset error in Volts (1,2,3) • Total Gain Error vs Nominal, Converted to Volts (1,4) • Power Bandwidth for Application (1,5) 5 Analog Design for Production Basic Gain in Voltage, Current or Combination Linear Operation: No New Frequencies Created • • • • Voltage Amplifiers (Vin >> Vout): Current Amplifiers (Iin >> Iout): Transimpedance (Iin >> Vout): Transconductance (Vin >> Iout): Av = Vout/Vin Ai = Iout/Iin Zm = Vout/Iin Gm = Iout/Vin Additional Parameters • • • • Input Impedance: Zin = Vin/Iin Output Impedance: Zout = {Vout(NL) – Vout(L)}/Iout Slew Rate (SR): Min dVout/dT Slew Rate BW = SR/2pVp where Vp = Peak Voltage 6 Analog Design for Production Operational Amplifier Linear, Differential, High Gain Amplifier + Advantages Over Single Ended Amplifier Block ?? - • Easy to add positive and negative feedback with differential input • Single Ended Application Gains can be tightly controlled with external components and made insensitive to internal transistor gain variations • Inherent noise rejection when noise enters both input terminals 7 Analog Design for Production Basic Op-Amp Simplified Implementation 8 Analog Design for Production Operational Amplifier Ideal Assumptions Vp + Vout Vn - Used for basic analysis, nominal gain analysis • • • • Vout = Ad (Vp – Vn) where Ad is the diff gain Ad = Infinite Zin = Infinite, Iin = 0 where Iin is the input current Vp = Vn because of infinite Ad, Vo may be non-zero under this condition • Iout = Infinite (Often a false assumption) These basic assumptions allow simple circuit analysis to determine Nominal gain applications 9 Analog Design for Production Operational Amplifier Vcc Vp Power Supplies + Vout Vn - Power Supplies can be a critical consideration -Vcc • -Vcc < Vout < Vcc At all times, Vout(max) may be as low as 2 to 5 volts below Vcc depending upon model • Vcc, -Vcc sometimes referred to as “Rails” due to power distribution on some boards resembling tracks • Many applications use “Split” supply Operation • Split Supply means Vcc = |-Vcc| • Some models characterized for 1 supply operation (but ALL will work there) • Single Supply means –Vcc = 0 • Vcc, -Vcc power pins should always be capacitively filtered with 10 0.1uf (usually ceramic monolithic X7R or similar) Analog Design for Production Operational Amplifier Classifications 11 Analog Design for Production Operational Amplifier Basic Applications Rf Ri Vin Vout Rp Av = - Rf/Ri Zin = Ri Inverting Voltage Amp 12 Analog Design for Production Operational Amplifier Basic Applications Ri + Vin Vout Rf Rp Av = 1 + Rf/Rp Zin = Ri + Non-Inverting Voltage Amp When Rf=0, Rp=~Infinite…… Av = 1 13 Analog Design for Production Operational Amplifier Basic Applications Vin + Vout - Av = 1 Zin = Unity Gain Voltage Amp 14 Analog Design for Production Operational Amplifier Basic Applications Ri + Vin - RL Iout Rp Gm = 1/Rp Zin = Ri + Transconductance Amp 15 Analog Design for Production Operational Amplifier Basic Applications Rf Iin Vout Zm = - Rf RL Transimpedance Amp 16 Analog Design for Production Operational Amplifier Basic Applications + Iin - RL Ri Iout Rp Ai = -(1 + Ri/Rp) Current Amplifier 17 Analog Design for Production Operational Amplifier Real Characteristics Ip Vp + Vn - Vio In Vout Iout Used for more accurate Gain Characterization • Vout = Ad(Vp – Vn) + Ac(Vp + Vn)/2 + Vio Ad is the diff gain, Ac is the common mode gain, Vio = offset • CMRR = Common Mode Rejection Ratio = 20log(Ad/Ac) • Ib = Bias Current (Ave Current = [Ip + In]/2) • Iio = Offset Current (Diff Current = Ip – In) • Iout = Finite, Split between gain set components and load • Vio = Input Diff Voltage reflected back from Vo under the condition the Vp = Vn = 0 Use superposition to understand contributions 18 Analog Design for Production Operational Amplifier Real Characteristic Effects Vp Basic Strategy + Vout Vn - • • • • Consider the Effect Separately, then combine results Show Ib and Iio as input current sources Show Vio as diff voltage on Vp-Vn Use amended opamp in std application circuit, Vin=0 (grounded). • Find Vout, all Vout will be Verror due to Offset and Bias 19 Analog Design for Production Inverting Configuration Offset Error Contribution 1 Rf Ri If Vout Vio Ii Rp Ii = (0-Vio)/Ri If = (Vio-Vo)/Rf Ii = If Vo = Vio(1 + Rf/Ri) = Verr Inverting Voltage Amp Error Voltage due to Vio 20 Analog Design for Production Non-inverting Configuration Offset Error Contribution 1 Ri + Vin Vout Vio Rf If Ii Rp Ii = (0-Vio)/Rp If = (Vio-Vo)/Rf Ii = If Vo = Vio(1 + Rf/Rp) = Verr Non-Inverting Voltage Amp Error Voltage due to Vio 21 Analog Design for Production Op-Amp Technologies (EDN) Offset Voltage Comparisons IO 22 Analog Design for Production Op-Amp Technologies (EDN) Input Bias Current 10 deg C 23 Analog Design for Production Operational Amplifier Offset Error Contribution 2 Rf Ri If Vout Iio Ii Ib Ib Rp At V+: Iio = Ib + V+/Rp V+ = Rp(Iio-Ib) At V-: -V-/Ri = (V—Vout)Rf + Ib + Iio Sub V+ into above equation Vo = Verr = Rf(Ib+/-Iio)+/-[(RfRp/Ri +Rp)(Iio-/+Ib)] Note if Iio = ~0 and Rp = Rf//Ri, then Verr = 0 Verr is minimized when Rp = Rf//Ri Inverting Voltage Amp Error Voltage due to Ib, Iio 24 Analog Design for Production Inverting Amplifier Gain Error Rf Ri Av (nom) = - Rf/Ri But Assume Vout = Ad(V+ - V-) If Vin Vout Ii Rp Find expressions for V+ & VSubstitute into above Vout Solve for Vout/Vin = Av Av = -(RfAd)/(RiAd + Ri + Rf) Av = Av(nom)/CF CF = Correction Factor CF = 1 + 1/Ad + Rf/(RiAd) Don’t Forget to Factor in RTol% ! |Av| < |Av (nom)| Inverting Voltage Amp 25 Analog Design for Production Non-Inverting Amplifier Gain Error Ri + Vin Vout Av (nom) = 1+ Rf/Rp But Assume Vout = Ad(V+ - V-) Rf Find expressions for V+ & VSubstitute into above Vout Solve for Vout/Vin = Av Rp Av = Ad(Rp + Rf)/(RpAd + Rp + Rf) Av = Av(nom)/CF CF = Correction Factor CF = 1 + 1/Ad + Rf/(RpAd) Don’t Forget to Factor in RTol% ! |Av| < |Av (nom)| Non-Inverting Voltage Amp 26 Analog Design for Production Operational Amplifier Gain Error Rf Ri If Vin Vout Ii Largest Error will be due to Rtol !! Rp Gain Error = Av(nom) – Av Verr from Gain Error Verr = Vin(max) * Gain Error 27 Analog Design for Production Total Error • Verr due to Offset and Bias Effects • Plus Verr due to Gain Error • Requirements may dictate an outright nominal gain plus a total error voltage or current budget 28 Analog Design for Production Operational Amplifier Gain vs Bandwidth Tradeoff Rf Ri Vin Vout Rp Av = - Rf/Ri = Nominal Closed Loop Gain Ad (Op-amp) = Open Loop Gain • Ad rolls off with frequency, 20db/dec, after first pole (~ 1 to 100 Hz) • Bandwidth of Closed Loop Gain, Fcl, limited by Ad(f) • Av <= Ad (fcl) • Ad(0) = Typically 60dB to 140 dB or higher • When Ad(f) = 1, f = Unity Gain Freq • Above fcl, Av will fall at 20db/dec (8db/oct) 29 Analog Design for Production Common Sensor Interface Requirements (EDN) 30 Analog Design for Production Filters Critical Factors: 1. Passive Component Tolerances 2. OpAmp Input Offset Voltage (Vio), worse for high gain 3. Input Bias Current (Ib), Input Offset Current (Iio) 4. Loading effects of input source, output loads 5. Output Slew Rate and Output Vp-p at Maximum Frequency Worst Case Analysis: • Transfer Function Analysis • Total DC Offset error in Volts (1,2,3) • Mag (dB) & Phase (deg) vs Frequency Plots (1,4) • Power Bandwidth for Application (1,5) • Pulse Response (topology, 4) 31 Analog Design for Production Filter Basics Linear Operation Must Be Maintained: • Gain is Frequency Dependent but …. • No New Frequencies are Created 32 Analog Design for Production Basic Low Pass Filter Potential Filter Shapes 33 Analog Design for Production Basic High Pass Filter Potential Filter Shapes 34 Analog Design for Production Basic BandPass Filter Potential Filter Shapes 35 Analog Design for Production Basic BandStop Filter Potential Filter Shapes 36 Analog Design for Production Filter Basics General 2nd Order Transfer Function where; Filter Passband Shaping: • Q = Quality (Shape) Factor For Filter • Q is related to the damping factor Q = 1/2a • Put Xfer Function into form with D(s) above • Find expression for Wo, then find Q or a 37 Analog Design for Production Effect of Shape Factor on Filters Lowpass Bandpass Highpass Bandstop 38 Analog Design for Production Filter Scaling Filter Scaling: • All filter coefficients and polynomials are normalized to Wo = 1 rad/sec • To rescale, replace S with S/Wo(new) • Given an RC implementation circuit, Wo may also be moved by rescaling the Capacitors 39 Analog Design for Production Basic 2nd Order Implementations - Hambley Lowpass Highpass Bandpass 40 Analog Design for Production Multi-Function Filter Design Summing Inv Amp Vout BP Vin -1 R1 -1 C1 R2 + C2 A1 -1 Vout HP A2 Vout LP Rp Rp Inv Amp -B See: http://www-k.ext.ti.com/SRVS/Data/ti/KnowledgeBases/analog/document/faqs/spexpert.htm 41 Analog Design for Production 42 Analog Design for Production Filter Simulation of Component Tolerances Worst Case Analysis: • Transfer Function Analysis • Total DC Offset error in Volts • Mag (dB) & Phase (deg) vs Frequency Plots • Power Bandwidth for Application • Pulse Response 43 Analog Design for Production Comparators Critical Factors: 1. Passive Component Tolerances, Diode Clamp Tolerances 2. Input Offset Voltage (Vio) 3. Input Bias Current (Ib), Input Offset Current (Iio) 4. Voh, Vol clamping voltages 5. Output Slew Rate and Delay 6. Vref Tolerance Worst Case Analysis: • Vutp and Vltp (upper and lower trip points, 1,2,3,4,6) • Total hysteresis voltage (1-4,6) • Max switching frequency (5) 44 Analog Design for Production Oscillators Critical Factors: 1. Passive Component Tolerances 2. Loading effects of output loads 3. Output Slew Rate and Output Vp-p at Frequency of Oscillation Worst Case Analysis: • Transfer Function Analysis of any Linear Feedback Circuit • Forward path gain Analysis at 0 or 180 deg phase response • Mag (dB) & Phase (deg) Margins vs Frequency Plots (1,2) • Variation of Fo (1,2) • Power Bandwidth (3) 45 Analog Design for Production Wein Bridge Oscillator Operational amplifier gain G V1( s ) Vs ( s ) 1 R2 R1 Loop Gain T( s ) V o( s ) s R C G V s( s ) s R C 3 s R C 1 2 2 2 46 Analog Design for Production Voltage Regulators, Power Supplies Critical Factors: 1. Passive Component Tolerances (voltage set resistors) 2. Loading effects 3. Input voltage DC, AC and noise levels 4. Filtration Capacitors 5. Ambient Temperature Worst Case Analysis: • DC Output voltage variation (1,2,3) • AC Output ripple, noise (2,3,4) • Critical device power dissipation, Junction Temp (2,3,5) • Startup Output voltage vs Input voltage vs Time (2,3,4) • Safety Considerations 47 Analog Design for Production Analog Circuit DFM Analysis 48 Analog Design for Production Wien-Bridge Oscillator Example Joe Student 49 Analog Design for Production Wien-Bridge Theory of Operation • Uses phase shift RC networks connected to a forward path NI Amp • Amplifier-Feedback – Loop Gain = 1 – Loop Phase = 0o 50 Analog Design for Production Open Loop Analysis 51 Analog Design for Production Analysis • The loop gain can be found by doing a voltage division V o( s ) V 1( s ) Z 2( s ) Z 1( s ) Z 2( s ) 52 Analog Design for Production Analysis • Assume the two RC Networks have equal R & C values Z 1( s ) R R Z 2( s ) R 1 sC 1 sC 1 sC 53 Analog Design for Production Analysis Need to find the Gain over the whole Circuit: Vo/Vs Operational amplifier gain G V1( s ) Vs( s ) V o( s ) 1 R2 R1 V 1( s ) Z 2( s ) Z 1( s ) Z 2( s ) Solve G equation for V1 and substitute in for above equ. V o( s ) G V s( s ) sRC 2 2 2 s R C 3 s R C 1 54 Analog Design for Production Analysis We now have an equation for the overall circuit gain T( s ) V o( s ) s R C G V s( s ) s R C 3 s R C 1 2 2 2 Simplifying and substituting jw for s T j j R C G 1 2 R2 C2 3 j R C 55 Analog Design for Production Analysis In order to have a phase shift of zero, 2 2 2 1 R C 0 This happens at RC T j When RC, T(j) simplifies to: G 3 If G = 3, oscillations occur If G < 3, oscillations attenuate If G > 3, oscillation amplify 56 4.0V G=3 0V -4.0V 0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 0.6ms 0.8ms 1.0ms V(R5:2) Time 4.0V G = 2.9 0V -4.0V 0s 0.2ms 0.4ms V(R5:2) Time 20V G = 3.05 0V -20V 0s 100us V(R5:2) 200us 300us Time 400us 500us 600us Analog Design for Production Ideal vs. Non-Ideal Op-Amp • Red is the ideal op-amp. • Green is the 741 op-amp. 4.0V 0V -4.0V 0s V(R1:2) 0.2ms V(R5:2) 0.4ms 0.6ms Time 0.8ms 1.0ms 58 Analog Design for Production Making the Oscillations Steady • Add a diode network to keep circuit around G = 3 • If G = 3, diodes are off 59 Analog Design for Production Making the Oscillations Steady • When output voltage is positive, D1 turns on and R9 is switched in parallel causing G to drop 60 Analog Design for Production Making the Oscillations Steady • When output voltage is negative, D2 turns on and R9 is switched in parallel causing G to drop 61 Analog Design for Production Results of Diode Network • With the use of diodes, the non-ideal op-amp can produce steady oscillations. 4.0V 0V -4.0V 0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms V(D2:2) Time 62 Analog Design for Production Frequency Analysis • By changing the resistor and capacitor values in the positive feedback network, the output frequency can be changed. R 10k f 1 RC 2 p C 1nF 5 rad 1 10 sec f 15.915 kHz 63 Analog Design for Production Frequency Analysis Fast Fourier Transform of Simulation 4.0V (15.000K,2.0539) 2.0V 0V 0Hz 10KHz 20KHz 30KHz 40KHz V(D2:2) Frequency 64