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Transcript
Microcode
Source: Digital Computer Electronics
(Malvino and Brown)
PHY 201 (Blum)
1
Micro-code
Micro-code is the instructions at the lowest level,
closest to the hardware.
Any higher-level instructions (including
assembly/machine language) must be converted
to a lower level.
A single machine-language instruction (like Load
Accumulator A) typically consists of several
micro-code instructions.
PHY 201 (Blum)
2
Where is microcode stored?
It used to literally be wired in (hence the term “hard
wired”).
Typically it stored in ROM.
If the code is stored in EEPROM, it can be changed;
this is known as microprogramming.
But this is something one does on a rare occasion.
Sometimes referred to as “firmware,” an intermediate
between software and hardware.
PHY 201 (Blum)
3
Machine language
A level above micro-code.
The instructions are numbers, which really are
the addresses of the micro-code instruction in
ROM.
Mnemonic version of machine language is called
assembly language.
PHY 201 (Blum)
4
Assembly is a mnemonic
PHY 201 (Blum)
5
Getting down to hardware’s level
High level programs are translated into assembly
language or machine language by a compiler.
Assembly language programs are translated into
machine language by an assembler.
Each processor has its own unique machine
language. Thus code must be rewritten or at
least recompiled to run on different processor
(different hardware).
PHY 201 (Blum)
6
A simple design
Next we will show a computer design that uses
the basic “bus architecture”
A bus is a basically just wires through which data
travels from one part of a computer to another.
– Usually it’s implied the path is shared by a number of
parts.
– (One also talks about buses in networks.)
PHY 201 (Blum)
7
Bus
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
PHY 201 (Blum)
Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
8
Input ports
Keyboard encoder: converts key pressed into
corresponding string of bits (ASCII)
Input port 1: where keyboard data is entered,
usually contains some memory (a buffer) where
data is held until the processor is ready for it
Input port 2: where non-keyboard data is entered
PHY 201 (Blum)
9
Program counter
The program counter points to the current line of
the program (which is stored in memory)
This design shows arrows connecting the “PC”
to and from the bus, why?
– If the next instruction to be executed is not the next
line of code in memory, such as
• If
• Loops
• Subroutines, functions, etc.
PHY 201 (Blum)
10
MAR, MDR and Memory
MAR (Memory Address Register) holds the
address of the memory location being read from
or written to
– Not necessarily same as program counter
Memory (RAM): the place where data and
instructions are stored
MDR (Memory Data Register) holds the data
that is being read from or written to memory
– Bi-directional connection to bus for reading and
writing
PHY 201 (Blum)
11
Instruction Register
Instruction register holds the instruction that is
currently being executed.
A given line of assembly or machine language
code involves several micro-code instructions,
the instruction register holds onto the instruction
until all of the micro-instruction steps are
completed
PHY 201 (Blum)
12
Controller/Sequencer
Executes the program at the lowest level.
Sends signals to the control pins of all the devices
involved.
These lowest level instructions are in ROM.
Each assembly-level instruction has a numerical
counterpart (machine language); the numerical
counterpart is the address of the microcode for that
instruction stored in ROM.
Not shown, controller connects to everything.
PHY 201 (Blum)
13
Accumulator and ALU
Accumulator: register used in conjunction with
the ALU.
Data upon which arithmetic or logic operations
will eventually be performed is stored here; also
the results of these are stored here.
ALU (Arithmetic Logic Unit) where operations
that change the data (as opposed to just moving
it around) are done.
PHY 201 (Blum)
14
Flags
Flags are output from the ALU that are distinct
from data (data output goes to Acc. A)
For example,
– A carry from an addition
– An indication of overflow
• These are needed for program control or to indicate
possible errors
– The result of a logical comparison (<, >, =)
• These are needed for control (ifs, loops, etc)
PHY 201 (Blum)
15
TMP, B and C
TMP is the other register used in conjunction
with the ALU; the distinction is that answers are
generally sent to Accumulator A.
B and C are additional registers used for holding
data temporarily.
– They allow additional flexibility and reduce the
amount that must be written to memory.
PHY 201 (Blum)
16
Output ports
Output port a connection to the “outside world”
– Usually includes a buffer
– This design has to one for displayed output and a
second for other output (e.g. storage)
PHY 201 (Blum)
17
Micro-code
Let us now examine the steps involved in the
assembly (machine language) instruction Load
Accumulator A
PHY 201 (Blum)
18
What do you mean by Load
There are different types of Loads
– Load
• Instruction and address
• Associated data is the address of data that is to be put in Acc. A
– Load immediate
• Instruction and data
• Associated data is actual data to be sent directly to Acc. A
– Load indirect
• Instruction and address of address
• Associated data is an address. Found at that address is another
address. Then at that second address is the data to be placed in Acc.
A.
PHY 201 (Blum)
19
Fetch Cycle
Address State: the value of the program
counter (which recall is the address of line of the
program to be performed) is put into memory
address register.
Increment State: the program counter is
incremented, getting it ready for the next time.
Memory State: the current line of the program is
put into instruction register (so Control knows
what to do).
PHY 201 (Blum)
20
Execution cycle (Load Acc. A)
The remaining steps depend on the specific instruction
and are collectively known as the execution cycle.
Recall the instruction consisted of a load command and
an address. A copy of the address is now taken over to
the memory address register.
The value at that address is loaded into Accumulator A.
For the load command, there is no activity during the
sixth step. It is known as a "no operation" step (a "no
op" or "nop").
PHY 201 (Blum)
21
Bus
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
PHY 201 (Blum)
Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
22
Data Movement
Many of the micro-code steps involve moving
data and addresses to various locations
(registers, memory locations, etc.).
The information is often, but not always, sent
over the bus.
So information must be put on and taken from
the bus.
PHY 201 (Blum)
23
Load and Enable
With memory, one talks about reading and
writing.
With registers and the bus, one talks about
enabling and loading.
Enabling: placing a value from a register on the
bus.
Loading: placing a value from the bus into a
register.
PHY 201 (Blum)
24
Register Control pins
A register that takes values off of the bus (e.g.
the Memory Address Register, MAR) will need a
“load” control pin
– It does not always take the value on the bus, instead
it takes the current value on the bus when the load
pin is “activated”
• “Active high”means the action is performed when the pin
is high
• “Active low” means the action is performed when the pin
is low
PHY 201 (Blum)
25
The clock pin
The clock is another control pin (sometimes
called a timing pin) which determines when a
register takes the value on the bus
The load input determines if the register takes
the value
The clock input determines when the register
takes the value
PHY 201 (Blum)
26
The clock
A binary clock: 10101010101010101010
Each cycle (01) should take the same amount of time
(the time for a cycle: the period)
The number of cycles in a second is called the
frequency
“on the edge:” many registers load on the clock’s edge
– Positive edge: as 0 goes to 1
– Negative edge: as 1 goes to 0
PHY 201 (Blum)
27
Enable
The reverse of a load is an enable, this is when
a device places a value on the bus
A register that places values on the bus (e.g. the
buffer associated with an input port) must have
an “enable” control pin
Again enabling may be active high or active low
PHY 201 (Blum)
28
“Only one bus driver”
Only one item can place its value on the bus (“drive the
bus”) at a time. WHY?
– Suppose two items drive the bus and that they have different
values
– Then there would be a direct connection (the bus is
essentially just wire) between a high voltage and a low
voltage
– Since wire offers little resistance, there would be a very large
current – a.k.a. a short
• Large currents destroy digital circuits
PHY 201 (Blum)
29
Three-State logic
If a device is not driving the bus, it must be
effectively disconnected from the bus
– Otherwise the short problem
Thus we need three-state logic
– High
– Low
– Disconnected
PHY 201 (Blum)
30
Tri-State buffer
“Disconnecting” all devices except the “bus
driver” from the bus is done with tri-state buffers
These are not shown in our diagram and are
distinct from chips
Thus we won’t find the kind of “enable” control
pins discussed here on chips
PHY 201 (Blum)
31
Other control pins
Items involved in data manipulation (as opposed
to simply data movement) will require additional
control pins
– For example, the program counter needs to be
incremented
Thus additional control pins are required
– These pins are sometimes also referred to as
“enable” pins, as they enable a particular action
PHY 201 (Blum)
32
ALU control
The primary data manipulator is the ALU
The 74181 is a simple ALU
It has an M select to choose between logic and
arithmetic functions (M)
It has a set of S selects (S0, S1, S2, S3) to
choose among the various functions of that type
PHY 201 (Blum)
33
74181 ALU Chip
U1
Data in
Data in
Control
pins
2
23
21
19
~A0
~A1
~A2
~A3
~F0
~F1
~F2
~F3
9
10
11
13
1
22
20
18
~B0
~B1
~B2
~B3
CN4
AEQB
16
14
6
5
4
3
15
17
S0
S1
S2
S3
~P
~G
7
8
CN
M
Data out
74181N
PHY 201 (Blum)
34
Micro-code is
Micro-code is 1’s and 0’s stored in ROM
The ROM output is connected to control pins
For example, one micro-code instruction is to
take the value from the program counter to the
memory address register
– So send active signals to “enable the PC” and “load
the MAR”
PHY 201 (Blum)
35