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Analog Integrated Circuits Fundamental Building Blocks Current mirrors Faculty of Electronics Telecommunications and Information Technology Gabor Csipkes Bases of Electronics Department Outline current source biasing – voltage sources MOS transistor current mirrors fundamental current mirror cascode current mirror low swing cascode current mirror unbalanced and symmetrical Wilson current mirrors bipolar transistor current mirrors fundamental current mirror fundamental current mirror with β compensation fundamental current mirror with resistive emitter degeneration cascode current mirror unbalanced and symmetrical Wilson current mirrors Analog Integrated Circuits – Fundamental building blocks – Current mirrors 2 Current mirrors – principles of operation integrated current sources with transistors need bias voltages → voltage sources 1 gm Rin Rout 1: n Is this a voltage source? Current mirror key parameters to consider: input resistance → must be as small as possible → current input output resistance → must be as large as possible → current output minimum required output voltage required input voltage current gain → precision imposed by the application Analog Integrated Circuits – Fundamental building blocks – Current mirrors 3 The fundamental MOS current mirror NMOS PMOS Vin VDSat1 VTh Vo min VDSat 2 Small signal model Vin 1 Rin I in g m1 I out 2 VGS VTh 2 1 VDS 2 current gain: n I in 1 VGS VTh1 1 VDS 1 Δβ – geometry mismatch ΔVTh – threshold voltage mismatch Analog Integrated Circuits – Fundamental building blocks – Current mirrors Rout n Vout rDS 2 I out 1 Vout 1 Vin 2VTh n 1 2 VDSat 4 The MOS cascode current mirror NMOS PMOS Vin VDSat 3 VTh 3 VDSat1 VTh1 f VBS 3 Vo min VDSat 4 VDSat 2 VTh 2 (!) Rin 1 1 g m1 g m 3 Rout rDS 2 rDS 4 g m 4 g mb 4 rDS 2 rDS 4 Small signal model Analog Integrated Circuits – Fundamental building blocks – Current mirrors 5 The MOS cascode current mirror the VGS voltages of M3 and M4 balance the fundamental mirror M1-M2 → n is accurately defined Vin Vout VDS 1 VDS 1 VDS 2 VDS 2 The current gain is very close to unity even when the inputoutput voltage imbalance ΔV is significant Analog Integrated Circuits – Fundamental building blocks – Current mirrors 6 The MOS low swing cascode current mirror the cascode current mirror is not optimal in terms of Vomin → the gate voltage of M4 must be decreased by VTh 1 VG 4 Vo min 2VDSat 2 VG 4 VDS 1 VDS 2 4 3 VDS1 VDS 2 VR R triode region Analog Integrated Circuits – Fundamental building blocks – Current mirrors 7 The MOS low swing cascode current mirror NMOS PMOS Vin VDSat1 VTh1 Vo min VDSat 4 VDSat 2 Rin 1 g m1 Rout rDS 2 rDS 4 g m 4 g mb 4 rDS 2 rDS 4 Small signal model Analog Integrated Circuits – Fundamental building blocks – Current mirrors 8 The Wilson current mirror NMOS PMOS Vin VDSat 3 VTh 3 VDSat 2 VTh 2 Vo min VDSat 3 VDSat 2 VTh 2 Rin Rout Small signal model g m 2 g m3 g m1 g m 3 g m1 g m 3rDS 1rDS 3 gm 2 Vin and Vout create voltage imbalance between VDS1 and VDS2 Accuracy issues for the current gain n Analog Integrated Circuits – Fundamental building blocks – Current mirrors 9 The balanced Wilson current mirror NMOS PMOS Vin VDSat 3 VTh 3 VDSat 2 VTh 2 Vo min VDSat 3 VDSat 2 VTh 2 Rin Rout g m 2 g m3 g m1 g m 3 g m1 g m 3rDS 1rDS 3 gm 2 Small signal model Analog Integrated Circuits – Fundamental building blocks – Current mirrors 10 The fundamental bipolar current mirror NPN PNP Vin VBE1 Vo min VCE 2 1 Rin g m1 Rout rCE 2 current gain: n I S 2 VCE 2 VCE1 1 I S1 VCE1 VEA 1 I S 2 VCE 2 VCE1 1 1 I S1 VCE1 VEA ΔV – input-output voltage imbalance Analog Integrated Circuits – Fundamental building blocks – Current mirrors IS 2 V n 1 I S 1 Vin VEA n IS 2 I S1 2 11 The fundamental current mirror with β compensation NPN PNP Vin VBE1 VBE 3 Vo min VCE 2 1 Rin g m1 Rout rCE 2 current gain → β replaced by β (β+1) → n much closer to the ideal value when the input and the output are balanced in voltage IS 2 V n 1 I S 1 Vin VEA Analog Integrated Circuits – Fundamental building blocks – Current mirrors I S 2 1 n I S 1 1 2 12 The degenerated fundamental current mirror NPN PNP Vin VBE1 I in R1 Vo min VCE 2 I out R2 current gain: 1 Rin R1 g m1 VBE1 I in R1 VBE 2 I out R2 remember to adjust the emitter areas of Q1 and Q2 proportionally with the current in each branch !!! Rout rCE 2 R2 g m 2 rCE 2 R2 n R1 R2 A2 I S 2 R1 n A1 I S1 R2 n is still affected by the finite β and by ΔV Analog Integrated Circuits – Fundamental building blocks – Current mirrors 13 The bipolar cascode current mirror NPN PNP Vin VBE1 VBE 3 Vo min VCE 4 VBE 2 1 1 Rin g m1 g m 3 current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4 Analog Integrated Circuits – Fundamental building blocks – Current mirrors Rout g m 4 rCE 4 rCE 2 rBE 4 gm 2 rBE 4 rCE 2 1 g m1 IS 2 2 n 2 I S1 4 2 14 The bipolar Wilson current mirror asymmetrical Vo min VCE 4 VBE 2 Vin VBE1 VBE 3 rBE 3 g m 2 g m 3 Rin g m 2 g m1 g m 3 rBE 3 g m1 g m 3rCE1rCE 3 Rout balanced current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4 rCE1 rBE 3 I S 2 2 2 n 2 I S1 4 2 rCE1 rCE1 g m 2 1 g m1 r rBE 3 BE 3 Analog Integrated Circuits – Fundamental building blocks – Current mirrors 15 Bibliography P.E. Allen, D.R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2002 B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2002 D. Johns, K. Martin, Analog Integrated Circuit Design, Wiley, 1996 P.R.Gray, P.J.Hurst, S.H.Lewis, R.G, Meyer, Analysis and Design of Analog Integrated Circuits, Wiley,2009 R.J. Baker, CMOS Circuit Design, Layout and Simulation, 3rd edition, IEEE Press, 2010 Analog Integrated Circuits – Fundamental building blocks – Current mirrors 16