Download 7 Digital electronics6

Chapter 7.
Digital Electronics
Motivation
analog
digital
센서
센서회로
Interface
board
외부세계
(빛, 온도, 압력, 전류,…)
actuator
컴퓨터
Driver
Computer interface & programming!
* Deadline of project plan submission: 10/31(토)
Deadline for the first draft project plan : 10/28(수)
1. Basic Logic Concepts
Analog (continous) vs. Digital (discrete)
* The world in which we live is analog.
Ex. sound, temperature, pH, light intensity, electrical conductivity,
electric, magnetic fields, the flow of time, ….
*Some signals are digital by nature
Ex. particle detector, light intensity, keyboard, Boolean logic, ….
*It is often desirable to convert analog data to digital form for
data storage and processing (A/D and D/A converters).
Ex. multimeter, oscilloscope, DSP, computer, ….
*Robustness: data transmission without degradation (PCM).
Ex. Telephone, CD, ….
*Fragility and parity bits
Logic levels and noise margin or noise immunity
-HIGH & LOW
-TRUE & FALSE (positive true vs. negative true)
-1 & 0
Combinational logic & logic gates
George Boole
*Logic gates perform logical
operations on one or more logic
inputs and produces a single
logic output (Boolean logic or
Boolean arithmetic).
등가회로(NAND또는 NOR만 사용)
실질적으로 NAND나 NOR 게이트가 CMOS등의 회로로 만들기가 가장 간단함.
Number systems & binary arithmetic
-Decimal
-Binary
-Hexadecimal
-BCD: 13710 = 0001 0011 0111
*Gray code
0000
0001
0011
0010
0110
0111
0101
0100
1100
1101
1111
1110
1010
1011
1001
1000
2. TTL & CMOS
Diode logic
OR gate
AND gate
- Diode logic was superseded by transistor logic in most applications.
The main drawbacks of diode logic are that it cannot be used to
build a NOT gate and signals degrade after only a few layers of
gates causing loss of noise immunity and unreliable logic operation.
- Diode는 p (또는 n) 쪽이 high(또는 low)일 경우 전압이 그대로 전달되고,
그 반대일 경우 끊어진 것으로 보고 논리회로의 output전압을 판단하면 됨.
DTL & TTL
EA(n)
EB(n) B(p) C(n)
B
E
- E와 B 접합을 다이오드로 간주
- EA나 EB중 하나라도 low(F) 면
-> BE 다이오드에 순방향 전압이므로,
B는 low+0.6
-> B가 low이므로, C도 low
-> 오른쪽 TR이 닫혀서 Q=high(T)
-EA, EB가 모두 high(T)면
-> B=high -> C=high
-> 오른쪽 TR이 열려서 Q=low(F)
C
TTL NAND gate
DTL NAND gate.
Vcc
Vcc
• First, take the inverse of the
entire function.
• ‘OR’ : parallel connection
‘AND’ : serial connection
Inverter
NOR
Inverter
R2
R1
i) If Vin = 5,
• IB= (Vin-0.6)/R1
• IC= hFE x IB= hFE(Vin-0.6)/R1
• Vout = 5 - R2 x IC
= 5 – R2 x hFE x (Vin-0.6)/R1
~0 if hFE is very large
ii) If Vin = 0
• IB = 0
• IC=0
• Vout = 5V
7400 Series
TTL became popular with electronic systems designers in 1962
after Texas Instruments introduced the 7400 series of ICs,
which had a wide range of digital logic block functions, and
Sylvania introduced a similar family of products. The Texas
Instrument family became an industry standard. The 7400
series of TTL integrated circuits are historically important as
the first widespread family of IC logic.
CMOS
close
1
0
open
CMOS circuits were invented in 1963 by Frank Wanlass at Fairchild
Semiconductor. The first CMOS integrated circuits were made by RCA in
1968 by a group led by Albert Medwin. Originally a low-power but slow
alternative to TTL, CMOS found early adopters in the watch industry and
in other fields where battery life was more important than speed. Some
twenty-five years later, CMOS has become the predominant technology
in digital integrated circuits. This is essentially because area occupation,
operating speed, energy efficiency and manufacturing costs have
benefited and continue to benefit from the geometric downsizing that
comes with every new generation of semiconductor manufacturing
processes. In addition, the simplicity and comparatively low power
dissipation of CMOS circuits have allowed for integration densities not
possible on the basis of bipolar junction transistors. Standard discrete
CMOS logic functions were originally available only in the 4000 series
(RCA "COS/MOS") integrated circuits. Later many functions in the 7400
series began to be fabricated in CMOS, NMOS, BiCMOS or another
variant.
Complementary MOS Inverter
=5V
S
p-MOS
(Load)
D
D
S
n-MOS
(Driver)
1) If Vin = 5V (input high),
-> VGSn = 5V > |VTn|
VSGp = 0V < |VTp|
-> n-MOS: ON with a small R
p-MOS: OFF with an infinite R
-> NO Current
-> Vout = 0 (output low)
2) If Vin = 0V (input low),
-> VGSn = 0V < |VTn|
VSGp = 5V > |VTp|
-> n-MOS: OFF with an infinite R
p-MOS: ON with a small R
-> NO Current
-> Vout = 5V (output high)
No static power consumption for CMOS Circuits.
-> Integrated Circuits for Computer Processors.
CMOS Logic
Logic Circuit in CMOS Architecture
1.pMOS :
• First, take the inverse of ‘each’
variable
• ‘OR’ : parallel connection
• ‘AND’ : Serial Connection
2.nMOS :
• First, take the inverse of the
entire function.
• ‘OR’ : parallel connection
‘AND : serial connection
VDD
NAND
Gate
A
B
Z
Z
Z  A B
A
B
VDD
NOR
Gate
A
B
Z
Z  A B
A
B
Z
Note)
1. The logic functions are
implemented twice, once in
NMOS and once in PMOS
devices.
2. Zero static power dissipation.
3. All devices can be the same size
and circuit functions correctly.
4. The output of a logic circuit is
connected to the input of the
next logic circuit.
54: Mil Spec
SN74LS00N
제조사
series
family
gate type
LS low power Schottky
ALS advanced LS
F fast
HC high speed CMOS
HCT high speed CMOS
(TTL compatible)
AC advanced CMOS
Of many families, only five (TTL, CMOS, NMOS, ECL, and BiCMOS) are
currently still in widespread use. ECL is used for very high speed
applications because of its price and power demands, while CMOS logic
is mainly used in VLSI (Very Large Scale Integrated Circuits)
applications such as CPUs and memory chips
Emitter-coupled logic
ECL was invented in August 1956 at
IBM by Hannon S. Yourke. Originally
called current steering logic, it was
used in both the Stretch, IBM 7090,
and IBM 7094 computers.
BiCMOS, also called BiMOS
In integrated circuit technologies,
BiCMOS, also called BiMOS, refers to
the integration of bipolar junction
transistors and CMOS technology into a
single device.
BiCMOS
Inverter
3. Combinational Logic
-circuits in which the output state depends
only on the present input states.
-can be constructed with gates alone
Multiplexer (Mux)
- 여러 개의 입력 중 하나를 출력으로 나가도록 선정
- parallel 신호를 serial 신호로 전환
0 1
S
NOT
AND
0 A OR
01
A
10
B
A1
B0
Q
BA
D1
D2
Q1
D3
B1
A2
B2
A3
D4
Q2
’157
B4
Q
’151
Q
D5
D6
Q3
D7
B3
A4
D0
A0 A1 A2
E
Q4
SEL
E
Enable
Select
Quad 2-input selector (multiplexer)
8-input multiplexer
Multiplexer Expansion
Multiplexer
S1
Multiplexer
D
S8
C1
S1
D
S8
C2
C3
ENB
C1
C2
C3
ENB
Decoder
특정 address에 대해 한 개의 output만 내보내는 기능
A
B
C
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
1-of-8 decoder (’138)
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
Y0
0
1
1
1
1
1
1
1
Y1
1
0
1
1
1
1
1
1
Y2 Y3
1 1
1 1
0 1
1 0
1 1
1 1
1 1
1 1
Y4
1
1
1
1
0
1
1
1
Y5
1
1
1
1
1
0
1
1
Y6
1
1
1
1
1
1
0
1
Y7
1
1
1
1
1
1
1
0
Encoder
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A
B
C
D
Y0
0
1
0
0
0
0
0
0
0
Y1
0
0
1
0
0
0
0
0
0
Y2
0
0
0
1
0
0
0
0
0
non-zero인 부분이
있는지 표시
Y3
0
0
0
0
1
0
0
0
0
Y4
0
0
0
0
0
1
0
0
0
Y5
0
0
0
0
0
0
1
0
0
Y6
0
0
0
0
0
0
0
1
0
Y7
0
0
0
0
0
0
0
0
1
A
0
0
0
0
0
1
1
1
1
B C D
0 0 0
0 0 1
0 1 1
1 0 1
1 1 1
0 0 1
0 1 1
1 0 1
1 1 1
*priority encoder: generate a binary code giving the address of the
highest numbered input that is asserted.
Binary Adder
Half adder
Exclusive OR
(둘이 다르면 T)
AND
INPUTS
OUTPUTS
A
B
CIN
COUT
S
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
INPUTS
OUTPUTS
A
B
CARRY
SUM
0
0
0
0
0
1
0
1
1
0
0
1
1
1
1
0
AND
ExOR
Full adder
Carry input이 있어서 여러 개의 adder 연결 가능)
A1 A2 A3 A4
B1 B2 B3 B4
’83
Cin
Cout
S1 S2 S3 S4
8bit adder
A_low
B_low
A1 A2 A3 A4
B1 B2 B3 B4
’83
Cin
S1 S2 S3 S4
LSB
A_high
Cout
A1 A2 A3 A4
Cin
B_high
B1 B2 B3 B4
’83
Cout
S1 S2 S3 S4
MSB
*ALU: arithmetic logic unit(addition, substraction,
bit shift, magnitude comparision)
*floating point processor
4. Sequential Logic
-circuits in which the output state depends both on the input
states and on the previous history.
flip-flops
Set-reset type flip-flop (SR flip-flop)
using NOR gates
0 0
Q Q
1 Q
NOR
Q Q
1 0
0 Q
latch : 이전의 상태 유지
이 상태는, 다른 상태로 바뀔
때 output이 어떤 값이 나올지
예측이 어렵기때문에 정상적
인 동작에서는 사용 안함
using NAND gates
NAND
S
R
Q
Q
0
0
1
1
0
1
1
0
1
0
0
1
1
1
latch
latch
Set-reset type flip-flop (SR flip-flop)의
불안정 상태
시작점
1 0
0 0 1
1 0
시작점
1 0
01
0 1 0
Gated SR latch
0 R
0 1
0 S
E: Enable
D latch
1bit memory!
Q
D
1D 1
D
1
0
0
M D D
S
R
M D D
1D 1
NAND 게이트 역할
NOT(A AND B)= NOT(A) OR NOT(B)
Clock이 1일 때 D값이 Q에 반영
Q
실질적으로 이 부분은,
NAND 게이트를 이용한 SR flip-flop
(슬리이드 27쪽 참조)
S
R
Q
Q
0
0
1
1
0
1
1
0
1
0
0
1
1
1
latch
latch
Negative-edge-triggered
or falling-edge-triggered D Flip-Flop
M D D
D
M M D
1D 1
1 01
D
1
0
1D 1
0
M M D
M D D
master
slave
Clock이 1->0일 때 D값이 Q에 반영
Positive-edge-triggered
or rising-edge-triggered D flip-flop
D D
D D
1D 1
D D
1
010
1 D1
Q D Q (D)
1 D
D D
1 D1
D
Q D Q( D )
1 D1
NAND gate
flip-flop
D D
Clock이 0->1일 때 D값이 Q에 반영
J-K Flip Flop
1
0Q 0
QQ Q
01 0
QQ Q
1
0Q 0
J와 K가 모두 1일 경우, Clock이 0->1일 때 Q값이 반대로 바뀜
Flip Flop의 응용 : Counter
normal input
inverted input
5. Digital Meets Analog
Motivation
analog
digital
센서
센서회로
Interface
board
외부세계
(빛, 온도, 압력, 전류,…)
actuator
Driver
Computer interface & programming!
컴퓨터
ADC
DAC
각 디짓의 값을,
summing amp로 더
하여 Vout을 내줌.
priority
encoder
12bit --> 2000:1
R-2R ladder
8I
8I
comparator
4I
4I
2I
2I
I
I
A/D and D/A converters
(Nyquist-Shannon) sampling theorem: exact reconstruction of a
continuous-time baseband signal from its samples is possible if
the signal is bandlimited and the sampling frequency is greater
than twice the signal bandwidth.
*The theorem also leads to a formula for the reconstruction.
*Nyquist rate: twice the bandwidth of the continuous time signal.
*Nyquist frequency or critical frequency: half the sample rate.
*downsampling & alias
*anti-aliasing filter
Multiplexing & Three state logic
1
close
high-Z
0
1
Bus line에 사용
close
Digital interfaces (parallel)
-Centronics parallel interfaces
-GPIB (General purpose interface bus)
Digital interfaces (serial)
-RS232C
-USB