Download basic common-emitter amplifier

EKT104 ANALOG
ELECTRONIC CIRCUITS
[LITAR ELEKTRONIK ANALOG]
BASIC BJT AMPLIFIER
(PART II)
DR NIK ADILAH HANIN BINTI ZAHRI
[email protected]
1
BASIC COMMON-EMITTER
AMPLIFIER
• The basic common-emitter circuit used in
previous analysis causes a serious defect :
•
•
•
If BJT with VBE=0.7 V is used, IB=9.5 μA & IC=0.95 mA
But, if new BJT with VBE=0.6 V is used, IB=26 μA & BJT goes
into saturation; which is not acceptable  Previous circuit is
not practical
So, the emitter resistor is included: Q-point is stabilized
against variations in β, as will the voltage gain, AV
• Assumptions
•
•
CC acts as a short circuit
Early voltage = ∞ ==> ro neglected due to open circuit
2
COMMON-EMITTER AMPLIFIER
WITH EMITTER RESISTOR
inside
transistor
CE amplifier with emitter resistor
Small-signal equivalent circuit
(with current gain parameter, β)
3
COMMON-EMITTER AMPLIFIER
WITH EMITTER RESISTOR
•
ac output voltage
Vo   I b RC
•
Input voltage loop
•
Input resistance, Rib
Vin  I b r  I b   I b RE
Rib 
•
Remember: Assume VA is infinite, 
ro is neglected
Vin
 r  1   RE
Ib
Input resistance to amplifier, Ri
Ri  R1 R2 Rib
•
Voltage divider equation of Vin to Vs
 Ri
Vin  
 Ri  RS

Vs

4
COMMON-EMITTER AMPLIFIER
WITH EMITTER RESISTOR
•
So, small-signal voltage gain, AV
Av 
Vo   I b RC

Vs
Vs
 V  1 
   RC  in  
 Rib  Vs 
Av 
Remember: Assume VA is infinite, 
ro is neglected
•
  RC
r  1   RE
 Ri

 Ri  RS



If Ri >> Rs and (1 + β)RE >> rπ
Av 
  RC
R
 C
1   RE
RE
5
COMMON-EMITTER AMPLIFIER
WITH EMITTER BYPASS CAPACITOR
VCC
Emitter bypass capacitor, CE
provides a short circuit to
ground for the ac signals
RC
R1
vO
RS
Emitter bypass capacitor is used to
short out a portion or all of emitter
resistance by the ac signal.
CC
vs
R2
RS
Vs
R1|| R2
RE
CE
Hence no RE appear in the hybrid-π
equivalent circuit
B
C
r
gmV
ro
Vo
RC
E
Small-signal hybrid-π
6
equivalent circuit
VOLTAGE GAIN WITH AND
WITHOUT BYPASS CAPACITOR
VCC=10V
R1=56k
vO
RS=0.5
k
CC
vs
Compare the Voltage gain value with and without
Bypass Capacitor of the following circuit.
RC=2k
R2=12.2k RE=
CE
0.4k
  100,VA  ,VBE  0.7
7
VOLTAGE GAIN WITH AND
WITHOUT BYPASS CAPACITOR
Voltage gain Measurement Without Bypass
Capacitor
VCC=10V
I CQ  2.16mA, VCEQ  4.81V
r 
R1=56k
RC=2k
I CQ
vO
I CQ
RS=0.5
k
CC
vs
VT
R2=12.2k RE=
0.4k
gm 
CE
VT
(100)(0.026)

 1.2k
2.16

2.16
 83.1mA / V
0.026
VA
ro 

I CQ
Rib  r  (1   ) RE  1.2  (101)(0.4)  41.6k
Ri  R1 || R2 || Rib  56 || 12.2 || 4.16  8.06k
  100,VA  ,VBE  0.7
Av 
 (100)( 2)  8.06 

  4.53
8
1.2  (101)(0.4)  8.06  0.5 
VOLTAGE GAIN WITH AND
WITHOUT BYPASS CAPACITOR
Voltage gain Measurement With Bypass Capacitor
VCC=10V
I CQ  2.16mA, VCEQ  4.81V
R1=56k
RC=2k
vO
RS=0.5
k
CC
vs
r 
R2=12.2k RE=
0.4k
 VT
I CQ
gm 
ro 
CE
I CQ
VT

(100)(0.026)
 1.2k
2.16

2.16
 83.1mA / V
0.026
VA

I CQ
Rib  r  1.2k
Ri  R1 || R2 || Rib  56 || 12.2 || 1.2  1.07 k
  100,VA  ,VBE  0.7
Av 
 (100)( 2)  1.07 

  113.6
1.2
1
.
07

0
.
5


9
STABILITY OF VOLTAGE GAIN
• Stability : Measure of how well an amplifier
maintains its design values over changes
• Bypassing external RE does produce maximum
voltage gain, however there is stability problem
because ac voltage depends internal ac emitter
resistance, re
• Where re depends on IE and on temperature
10
COMMON-EMITTER AMPLIFIER
WITH EMITTER BYPASS CAPACITOR
Swamping Method
• Method to minimize effect of
re without reducing the
voltage gain to minimum
value
•
•
RE is partially bypassed so that
reasonable gain can be achieved
and the effect of re on the gain
can be greatly eliminated
RE is formed with two separate
emitter resistor, where RE2 is
bypassed and RE1 is not
Common-emitter amplifier with
emitter bypass capacitor
11
DC & AC LOAD LINE ANALYSIS
• DC load line
• Visualized the relationship between Q-point &
transistor characteristics
• AC load line
• Visualized the relationship between small-signal
response & transistor characteristics
• Occurs when capacitors added in transistor circuit
12
COMMON-EMITTER AMPLIFIER
WITH EMITTER BYPASS CAPACITOR
Example 1: Determine the Q-point (VBE=0.7V, β=150, VA=∞) and DC & AC
Load Line. Then plot the graph.
13
DC LOAD LINE
SOLUTION...
•
KVL on C-E loop
V   I C RC  VCE  I E ( RE1  RE 2 )  V 
1  
1  

 I C ( RE1  RE 2 )  V , when I E  
 I C
 I C RC  VCE  
  
  
1  
 I C ( RE1  RE 2 )
V   V   VCE  I C RC  
  
1  
  1
For Q - point, when   1, 
  
So, V   V   VCEQ  I CQ ( RC  RE1  RE 2 )
Slope 
-1
RC  RE1  RE 2
14
DC & AC LOAD LINES
FULL SOLUTION
15
AC LOAD LINE ANALYSIS
Example 2
Determine the dc and ac load line.
VBE=0.7V, β=150, VA=∞
16
DC LOAD LINE
• To determine dc Q-point, KVL around B-E loop
V   I BQ RB  VEB  I E RE  I BQ RB  VEB  (1   ) I BQ RE
I BQ
V   VEB

 5.96 A
RB  (1   ) RE
Then I CQ  I BQ  0.894mA & I EQ  (1   ) I BQ  0.9mA
For Q - point, VCEQ  (V   V  )  I CQ RC  I EQ RE  6.53
-1
1
Slope 

RC  RE 15k
17
AC LOAD LINE
Small signal hybrid-π equivalent circuit
I CQ  0.894mA ;VECQ  6.53V
r 
VT
gm 
I CQ
I CQ
VT
VA

I CQ
 4.36k
ro 
 34.4mA / V
vo  vec  ( g m v )( RC // RL )  ic ( RC // RL )
18
DC & AC LOAD LINES
FULL SOLUTION
19
MAXIMUM SYMMETRICAL
SWING
• Symmetrical sinusoidal signal applied to the input
of an amplifier produces an output of symmetrical
sinusoidal signal
• AC load line is used to determine maximum output
symmetrical swing
•
If output is out of limit, portion of the output signal will be
clipped & signal distortion will occur
20
MAXIMUM SYMMETRICAL
SWING
• Steps to design a BJT amplifier for maximum
symmetrical swing:
1. Write DC load line equation (relates of ICQ & VCEQ)
2. Write AC load line equation (relates ic, vce ; vce = icReq, Req = effective ac resistance in C-E circuit)
3. Generally, ic = ICQ – IC(min), where IC(min) = 0 or
some other specified min collector current
4. Generally, vce = VCEQ – VCE(min), where VCE(min) is
some specified min C-E voltage
5. Combination of the above equations produce
optimum ICQ & VCEQ values to obtain maximum
symmetrical swing in output signal
21
MAXIMUM SYMMETRICAL
SWING
Example 3
Determine the maximum symmetrical swing in the output
voltage of the following circuit (same as Example 2).
22
MAXIMUM SYMMETRICAL
SWING
SOLUTION:
•
•
From the dc & ac load line, the maximum negative swing in the Ic is
from 0.894 mA to zero (ICQ). So, the maximum possible peak-to-peak
ac collector current:
The max. symmetrical peak-to-peak output voltage:
ic  2( I CQ  I C (min))  2(0.894)  1.79 mA
•
Maximum instantaneous collector current:
| vce || ic | Req | ic | ( RC || RL )  (1.79)(5 || 2)  2.56 V
iC  I CQ 
1
| ic | 0.894  0.894  1.79 mA
2
23
SELF-READING
Textbook: Donald A. Neamen, ‘MICROELECTRONICS
Circuit Analysis & Design’,3rd Edition’, McGraw Hill
International Edition, 2007
Chapter 6: Basic BJT Amplifiers
Page: 397-413, 415-424.
24
EXERCISE
Textbook: Donald A. Neamen, ‘MICROELECTRONICS
Circuit Analysis & Design’,3rd Edition’, McGraw Hill
International Edition, 2007
Exercise 6.5, 6.6, 6.7,6.9
Exercise 6.10 , 6.11
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