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Chapter 15 Multistage Amplifiers Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Chapter Goals • Understand analysis and design of ac-coupled multistage amplifiers including voltage gain, input and output resistances and small signal limitations. • Understand analysis and design of dc-coupled multistage amplifiers. • Discuss characteristics of Darlington configuration and cascode amplifier. • Explore dc and ac properties of differential amplifiers. • Understand basic three-stage op amp. • Explore design of class-A, class-B, class-AB output stages. • Discuss characteristics and design of electronic current sources. • Continue understanding the use of SPICE in circuit analysis. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Circuit 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Description • MOSFET M1operating in C-S configuration provides high input resistance and moderate voltage gain. • BJT Q2 in C-E configuration, the second stage, provides high gain. • BJT Q3, an emitter-follower gives low output resistance and buffers the high gain stage from the relatively low load resistance. R R R • Bias resistors are replaced byRB2 R1 R B3 3 4 2 • Input and output of overall amplifier is ac-coupled through capacitors C1 and C6. • Bypass capacitors C2 and C4 are used to get maximum voltage gain from the two inverting amplifiers. • Interstage coupling capacitors C3 and C5 transfer ac signals between amplifiers but provide isolation at dc, and prevent Q-points of the transistors from being affected. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Equivalent Circuits AC Equivalent Small-signal Equivalent DC Equivalent 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Input Resistance and Voltage Gain R R R L2 I 2 in3 R 620Ω 17.2kΩ 598Ω I1 R 4.7kΩ 51.8kΩ 4.31kΩ I2 R 3.3kΩ 250Ω 232Ω L3 R r ( 1)R 3.54kΩ I 2 3 o3 L3 v A 3 g R v2 v m2 L2 2 62.8mS 3.54kΩ -222 ( 1)R vo o3 L3 0.950 A v3 v r ( 1)R 3 3 o3 L3 R R 1MΩ R R R 598 r 598Ω 2390Ω 478Ω in G L1 I1 in2 2 R v in 998 Av A A A A 2 g R 0.01S 478Ω -4.78 v3 v2 v1 R R v1 v m1 L1 in I 1 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Output Resistance vx R R RCE R r I 2 out I 2 o2 th3 i x 4310Ω 54200Ω 3990Ω To find output resistance, test voltage is applied at amplifier output. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock ix ir ie vx vx 3300 R out3 R o 3 th 3 Rout 3300 R 3300 out 3 ix g 1 m3 o3 0.988 3990 3300 60.5 81 0.0796S vx Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Current and Power Gain Input current delivered to amplifier from source is v i 9.9010 7 v i i R R i in I Av v to and current delivered load by amplifier is v 998v s 3.99v i io o s 250 250 250 3.99v io i A 4.03106 i i 7v 9 . 90 10 i i Po v o io A Av A 998 4.03106 4.02109 P P i s v i ii 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Input Signal Range 0.2(1 2) • For first stage,v1 0.2(VGS VTN ) vi • • • 0.990 0.202V v v A v 5mV 2 v1 1 be2 For second stage, 5mV 0.005 1.05mV v 1.05mV v 1.06mV i 1 A 4.78 0.990 v1 v A A (0.990vs ) 3 v1 v2 For third stage,vbe3 1 g R 1 g R m3 L3 m3 L3 1 g R m3 L3 0.005 92.7μV v 5mV v i A A (0.990) be3 v1 v2 v min(202mV,1.06mV,92.7μV) 92.7μV i On the whole,v A (92.7μV) 998(92.7μV) 92.5mV o v 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl AC-coupled Amplifiers: Methods to Improve Voltage Gain • Gain of C-S amplifier is inversely proportional to square root of drain current, so voltage gain could be increased by reducing ID1 while maintaining a constant voltage drop across RD1. Signal range could be improved by increasing current in output stage and voltage drop across RE3. • Q1 could be replaced with a FET. This could cause gain loss in third stage since gain of C-D amplifier is typically < that of a C-C stage. However, this loss could be made up by improving gain of first and second stages. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Common-Emitter Cascade If gain is limited by interstage resistances, each stage has a gain of about -10VCC and overall gain is: n Avn 10V CC To achieve maximum gain, several If gain is limited by input resistance of C-E stages can be cascaded. transistors, it is given by: v v vo 1 2 I Av ... A A A n v3 v2 v1 Avn 1 C1 ...on 10V v v v o2 o3 CC n -1 i 1 I Cn For the final stage, Normally I I as signal and power Avn gmnR 10V Cn C1 L CC levels usually increase in each successive For all other stages, stage of most amplifiers. Since o< 10VCC , A g (R r ) vi mi Li i 1 this case often represents the actual limit. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: Circuit • Bypass capacitors- C2 and C4 affect gain at low frequencies but don’t inherently prevent the amplifier from operating at dc. • Coupling capacitors in series with signal pathC1, C3, C5, and C6 are eliminated as they prevent the amplifier from providing gain at dc or very low frequencies. • Additional bias resistors in individual stages are also removed, making design less expensive. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock • Symmetrical power supplies are used to set Q-point voltages at input and output to about zero. •Alternating pnp or p-channel and npn or n-channel transistors are used from stage to stage to take maximum advantage of available power supply voltage. Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: DC Analysis 2 Kn 2 0.01 0 (7.5 1600I 2 V I V D TN GS D 2 2 So, ID = 6.66. mA (which would produce 10.7 V drop across RS1 and cut off FET) or ID =5.29 mA (correct value). IB2 << ID, VD 7.5 620I D 4.22V V DS 4.22 0.964 3.26V which is enough to pinch off M1. 7.5 V V Voltage at drain of M1 provides base D EB2 1.84mA I bias for Q2 and voltage at collector of E2 1400 Q2 provides base bias for Q3. All F2 =150, so IC2 =1.83 mA and IB2 = 12.2 mA. transistors operate in active region IB3 << IC2, V 4700I 7.5V 1.10V C2 C2 irrespective of direct connection V V V V 3.82V EC2 D1 EB2 C2 between stages. which < 0.7 V , so Q2 is in active region. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: DC Analysis (contd.) Vo V V 1.10V - 0.7V 0.4V C2 BE3 V 7.5V Vo I I I o 3.99mA E3 3 L 3300 250 F3 = 80, so IC3 =3.94 mA and IB3 = 49.3 mA V 7.5 V 7.5- 0.40V 7.10V thus Q3 is in active region. CE3 E3 There is an offset voltage of 0.4 V at output and a nonzero dc current exists in 250 W load resistor. In an ideal design, offset voltage would be zero and no dc current would appear in load. Based on Q-point values, small-signal parameters can be calculated. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: AC Analysis • Values of interstage capacitors are higher than those in accoupled amplifier due to absence of bias resistors. • Overall characteristics are similar to those in ac-coupled amplifier as Q-points and small-signal parameters of transistors are similar 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock • Dc coupling requires fewer components than ac-coupling but Q-points of various stages become interdependent. • If Q-point of one stage shifts, Q-points of all other stages might also shift. Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: Darlington Circuit AC Analysis: For the composite transistor, r ' y 11 1 2 r o1 2 y 0 12 Darlington circuit behaves similar to the single transistor but has a current gain given by the product of current gains of individual transistors. DC Analysis: For F1, F2 >>1, I I I I B C C1 C2 F1 F2 VBE of composite transistor = 2 diode voltage drops. So VCE >(VBE1 + VBE2) . 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock y gm' y g / 2 21 m2 1 ro ' y (2 / 3)r o2 22 o' 21 o1 o2 y 11 v 0 2 v m ' 2 m /3 f v f2 1 i 0 2 Copyright © 2005 – The McGraw-Hill Companies srl Direct-coupled Amplifiers: Cascode Circuit AC Analysis: For the composite transistor, r ' y 11 1 r 1 y 0 12 Cascode circuit is cascade connection of C-E and C-B amplifiers, used in high gain amplifiers and high output resistance current sources. DC Analysis: For a high current gain, I I I I F C C2 C1 C1 For forward-active operation of Q2, V V V V V 2V BB BE CE1 BB BE2 BE1 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock gm' y g 21 m1 1 ro ' y r o2 o2 22 y o' 21 o1 y 11 v 0 2 v m ' 2 m o2 f 2 f v 1 i 0 2 Copyright © 2005 – The McGraw-Hill Companies srl Differential Amplifiers • Differential amplifiers,also considered the C-C/C-B cascade, eliminate the bypass capacitors as well as the external coupling capacitors at the input and output of directcoupled amplifiers. • Each circuit has two inputs. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock • Differential-mode output voltage is the voltage difference between collectors, drains of the two transistors.Ground referenced outputs can also be taken from collector/drain. • Ideal differential amplifier uses perfectly matched transistors. Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: DC Analysis Terminal currents are also equal. I I I C1 C2 C V V EE BE I E 2R EE I E1 I V BE1 V BE2 V I E I B1 I B2 I B I I I F E C V V V I R C1 C2 CC C C Both inputs are set to zero, emitters are connected together. E2 I C B F V V CE1 CE2 V V V 0V OD C1 C2 BE If transistors are matched, VC1 VC2 VC 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Small-Signal Transfer Characteristic The current switch is a digital application of the differential amplifier. Large-signal transfer characteristic of differential amplifier is given by: v v BE1 BE2 I I 2I tanh 2I tanh id C1 C2 C C 2V 2V T T v 2 I id C 2V T v 1 v id 3 2V T 3 5 2 vid 17 vid 15 2V 315 2V T T 7 ... Even-order distortion terms are eliminated.This increases signal-handling capability of differential pair. For small-signal operation, liner term must be dominant. Hence, we set the third-order term to be one-tenth the linear term. v 2V 0.3 v 27mV id 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock T id Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: DC Analysis (Example) • Problem: Find Q-points of transistors in the differential amplifier. • Given data: VCC=VEE=15 V, REE=RC=75k, F =100 15 0.7 V V V EE BE • Analysis: I 95.3mA E 2R EE 2(75103) 100 I I I 94.4mA F E 101 E C I 94.4mA I C 0.944mA B 100 F V 15 I R 7.92V C C C V V V 7.92V - (-0.7V) 8.62V CE C E 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Due to symmetry, both transistors are biased at Qpoint (94.4 mA, 8.62V) Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: AC Analysis v v v id 1 ic 2 v v v id 2 ic 2 Add = differential-mode gain Acd = common-mode to differential-mode conversion gain Acc = common-mode gain Adc = differential mode to common-mode conversion gain Circuit analysis is done by superposition of differential-mode For ideal symmetrical amplifier, Acd = Adc = 0. and common-mode signal portions. v v v voc c1 c2 2 v A A v od dd cd id v A v A oc cc ic dc v v v od c1 c2 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock v A 0 id od dd voc 0 A v cc ic Purely differential-mode input gives purely differential-mode output and vice versa. Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: Differential-mode Gain and Input Resistance v v v id ve v id ve 3 2 4 2 ( gm g )(v v ) G ve EE 3 4 ve(G 2g 2gm ) 0 ve 0 EE Emitter node in differential amplifier represents virtual ground for differential-mode input signals. v v id v id v 4 2 3 2 Output signal voltages are: v v v gmR id v gmR id c2 C 2 c1 C 2 v gmR v C id od 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: Differential-mode Gain and Input Resistance (contd.) Differential-mode gain for balanced output, vod vc1 vc2 is: v A od gm R C dd v id v 0 ic If either vc1 or vc2 is used alone as output, output is said to be single-ended. A A v gm R v gm R c1 C dd c2 C A A dd dd1 v dd 2 v 2 2 2 2 id v 0 id v 0 ic ic Differential-mode input resistance is small-signal resistance presented to differential-mode input voltage between the two transistor bases. (v / 2) R v / i 2r i id id id b1 b1 r If vid =0, R 2( R r ) 2R . For single-ended outputs, R R od C C o C od 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: Common-mode Gain and Input Resistance Both arms of differential amplifier are symmetrical. So terminal currents and collector voltages are equal. Characteristics of differential pair with commonmode input are similar to those of a C-E (or C-S) amplifier with large emitter (or source) resistor. v ic i b r 2( 1)R o EE Output voltages are: o R C v v oi R v c1 c2 b C r 2( 1)R ic o EE ve 2( o 1)i R b EE 2( o 1)R EE v v ic ic r 2( o 1)R EE 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential Amplifiers: Common-mode Gain and Input Resistance (contd.) Common-mode gain is given by: o R R V v oc C C Acc C v r 2( o 1)R 2R 2V EE EE EE ic v 0 id For symmetrical power supplies, common-mode gain =0.5. Thus, commonmode output voltage and Acc is 0 if REE is infinite. This result is obtained since output resistances of transistors are neglected. A more accurate expression is: 1 1 o ro 2R EE v v v 0 Therefore, common-mode conversion gain is found to be 0. od c1 c2 v r 2( o 1)R r ic EE R ( o 1)R ic 2i EE 2 2 b Acc R C 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Common-Mode Rejection ratio (CMRR) • Represents ability of amplifier to amplify desired differential-mode input signal and reject undesired common-mode input signal. • For differential output, common-mode gain of balanced amplifier is zero, CMRR is infinite. For single-ended output, A A /2 CMRR dm dd Acm Acc 1 1 1 2 om f 2 gm REE • For infinite REE , CMRR is limited by omf . If term containing REE is dominant CMRR gmREE 40IC REE 20VEE Thus for differential pair biased by resistor REE , CMRR is limited by available negative power supply. 2( g g ) g g CMRR g R g 1 g 2 gives fractional , • Due to mismatches, m EE g 1 2 g mismatch between small-signal device parameters in the two arms of differential pair. Hence gmREE product is maximized. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Analysis of Differential Amplifiers Using Half-Circuits • Half-circuits are constructed by first drawing the differential amplifier in a fully symmetrical form- power supplies are split into two equal halves in parallel, emitter resistor is separated into two equal resistors in parallel. • None of the currents or voltages in the circuit are changed. • For differential mode signals, points on the line of symmetry are virtual grounds connected to ground for ac analysis • For common-mode signals, points on line of symmetry are replaced by open circuits. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Differential-mode Half-circuits Direct analysis of the half-circuits yield: v v gmR id c1 C 2 v v gmR id c2 C 2 vo v v gmR v c1 c2 C id Applying rules for drawing halfcircuits, the two power supply lines and emitter become ac grounds. The half-circuit represents a C-E amplifier stage. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock R v / i 2r id id b1 R 2( R ro ) C od Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Common-mode Half-circuits • All points on line of symmetry become open circuits. • DC circuit with VIC set to zero is used to find amplifier’s Q-point. • Last circuit is used for for common-mode signal analysis and represents the C-E amplifier with emitter resistor 2REE. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Common-mode Input Voltage Range V V I R V 0 CB CC C C IC V V V BE EE IC I F C 2R EE V V R C EE BE 1 F 2R V EE CC V V IC CC R C 1 F 2R EE For symmetrical power supplies, VEE >> VBE, and RC = REE, V V CC IC 3 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Biasing with Electronic Current Sources • Differential amplifiers are biased using electronic current sources to stabilize the operating point and increase effective value of REE to improve CMRR • Electronic current source has a Q-point current of ISS and an output resistance of RSS as shown. • DC model of the electronic current source is a dc current source, ISS while ac model is a resistance RSS. SPICE model includes both ac and dc models. V I I 0 DC SS R SS 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl MOSFET Differential Amplifiers: DC Analysis K 2 n V V D GS TN 2 I 2I D V V V SS TN GS TN Kn Kn I V V V I R and Vo 0 Op amps with MOSFET inputs have a D1 D2 DD D D high input resistance and much higher V V V V I R V DD D D GS DS D S slew rate that those with bipolar input stages. Using half-circuit analysis method, we see that IS = ISS /2. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Small-Signal Transfer Characteristic MOS differential amplifier gives improved linear input signal range and distortion characteristics over that of a single transistor. Kn 2 2 I I v V v V GS1 D1 D2 TN GS2 TN 2 For symmetrical differential amplifier with purely differential-mode input v v id v V v V id GS1 GS 2 GS2 GS 2 I D1 I Kn V V v gmv TN id D2 id GS Second-order distortion product is eliminated and distortion is greatly reduced. However some distortion prevails as MOSFETs are nor perfect square law devices and some distortion arises through voltage dependence of output impedances of the transistors. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl MOSFET Differential Amplifiers: DC Analysis (Example) • Problem: Find Q-points of transistors in the differential • • amplifier. Given data: VDD=VSS=12 V, ISS =200 mA, RSS = 500 k, RD = 62 k, l = 0.0133 V-1, Kn = 5 mA/ V2, VTN =1V I I SS 100mA Analysis: D 2 V 1 GS 200mA 1.20V 2 5mA/V 12V - (100mA)(62k) 1.2V 7V DS To maintain pinch-off operation of M1 for nonzero VIC , V V V - V - I R V GD IC DD D D TN V V - I R V 6.8V IC DD D D TN 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl MOSFET Differential Amplifiers: Differentialmode Input Signals Source node in differential amplifier represents virtual ground Differential-mode gain for balanced output is v A od dd v id v ic 0 gm R D Gain for single-ended output is v v v gmR id D 2 d1 v v gmR id D 2 d2 v od gmR v D id A d1 dd1 v id v ic 0 A gm R D dd 2 2 A gm R d2 D dd A dd 2 v 2 2 id v 0 ic R R 2R D od id 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock v Copyright © 2005 – The McGraw-Hill Companies srl MOSFET Differential Amplifiers: Commonmode Input Signals Electronic current source is modeled by twice its smallsignal output resistance representing output resistance of the current source. Acc v oc v ic v id Common-mode half-circuit is similar to inverting amplifier with 2RSS as source resistor. 2 gm R gm R SS v v D v v v vs d1 d2 1 2 g R ic ic ic 1 2 g m R m SS SS v v v 0 Thus, common-mode conversion gain= 0 od d1 d2 gm R R Due to infinite current gain of D D FET, ro can be neglected. 1 2 g m R 2R SS SS 0 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock R ic Copyright © 2005 – The McGraw-Hill Companies srl Common-Mode Rejection ratio (CMRR) • For purely common-mode input signal, output of balanced MOS amplifier is zero, CMRR is infinite. For single-ended output, Adm Add / 2 ( gm RD ) / 2 CMRR gm R SS Acm Acc R /(2R ) D SS • RSS (which is much > REE and thus provides more Q-point stability) should be maximized. • To compare MOS amplifier directly to BJT amplifier, assume that MOS amplifier is biased by V V 2I R I R (V V ) SS GS D SS SS SS SS GS R CMRR SS I V V V V V V SS GS TN GS TN GS TN • From given data in example, MOS amplifier’s CMRR=54 or 35 dB (almost 10 dB worse than BJT amplifier).To increase CMRR in BJT and FET amplifiers, current sources with higher RSS or REE are used. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Two-port model for Differential Amplifiers i gmv dm dm gm vcm icm vcm 1 2 g m R 2R EE EE R 2ro od Roc 2m R f EE Two-port model simplifies circuit analysis of differential amplifiers. Expressions for FET are obtained by substituting RSS for REE. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Differential Amplifier Design (Example) • Problem: Find Q-points of transistors in the differential amplifier. • Given data: Adm=40 dB, Rid >250 k, single-ended CMRR> 80 dB, VIC at least ±5V, MOSFETs with: l = 0.0133 V-1, Kn’ = 50 mA/ V2, VTN =1V, BJTs with : F =100, VA =75V, IS =0.5 fA • Assumptions: Active-region operation, symmetrical power supplies, o = F, vid maximum of ±30 mV. • Analysis: Adm=40 dB =100. To achieve this gain with resistively loaded amplifier, we use BJT. For Adm = gm RC =40 IC RC , required gain can be obtained with voltage drop of 2.5 V across RC. For bipolar differential amplifier, Rid =2r, so, r =125 k. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock oV T 20μA I C r Copyright © 2005 – The McGraw-Hill Companies srl Differential Amplifier Design (Example contd.) Choose IC = 15 mA to provide safety margin. So RC =2.5 V/15 mA =167 k. Choose RC = 180 k as the nearest value with 5% toleranceand alos to compensate for neglecting ro in the analysis. VIC of 5V requires collector voltage to be at least 5 V at all times. We also know that vid can be a maximum of ±30 mV for linearity. So ac component of differential output will not be greater than 100(0.03 V)=3V, half of which appears at each collector. Thus dc signal across RC won’t exceed 4 V( 2.5 V dc + 1.5 V ac) and positive power supply must fulfill V V 4V (5 4)V 9V CC IC Choose VCC =10 V to dive desired margin of 1 V, For symmetrical supplies, VEE = -10 V. Single-ended CMRR of 80 dB needs CMRR 104 Choose current source with IEE R 16.7MΩ EE =30 mA and REE > 20 M gm (40/ V)(15μA) 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Two-stage Prototype of an Op Amp • For higher gain, pnp C-E amplifier is connected at output of the input stage differential amplifier. • Virtual ground at emitter node allows input stage to achieve full inverting amplifier gain without needing emitter bypass capacitor. • Pnp transistor permits direct coupling between stages, allows emitter of pnp to be connected to ac ground and Differential amplifier provides provides required voltage level shift to desired differential input,CMRR bring output back to zero. and ground referenced output as • Bypass and coupling capacitors are the input stage of op amp. thus eliminated. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Two-stage Op Amp: DC Analysis This circuit requires a resistance in From dc equivalent circuit, IE1= IE2 = I1 /2. If series with emitter of Q3 to stabilize Q- base current of Q3 is neglected and C-B point (as collector current of Q3 is current gains are one, I R V V V 1 C V exponentially dependent on baseBE CE1 CE2 CC 2 emitter voltage), at the expense of As both inputs are zero, output also=0 voltage gain loss. I V / R V V C3 EE EC3 CC I V V ln1 C3 EB3 T I S3 IS3 is saturation current. For zero offset voltage I V T R ln1 C3 C I I I S3 1 C3 F2 2 F3 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Two-stage Op Amp: AC Analysis (Differential Mode) Half-circuit can be constructed from ac equivalent circuit in spite of asymmetricity, as voltage variations at collector of Q2 don’t substantially alter transistor current in forward-active operation region. From small-signal circuit model, v g g c2 m 2 A R m2 ( R r ) vt1 v C 3 2 L1 2 id vo A g R vt 2 v m3 c2 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Two-stage Op Amp: AC Analysis (Differential Mode contd.) v g g R R vo c2 m 2 m 2 C o3 A A A ( R r )( g R) vt1 vt2 C 3 m3 dm v v v 2 2 R r C 3 id id c2 vo This can be rewritten as 1 g R R g R 1 40I R 40I R A m2 C o3 m3 C 2 C o3 C3 dm 2 I g R 2 40 C3 I R m3 C o3 C 2 C o3 I C2 Base current of Q3 is neglected so, IC2RC=VBE3=0.7 V, IC3R=VEE, Upper limit onIC2 and I1 is set by maximum dc bias 560V EE current at input, lower limit on IC3 is set by minimum A dm 28 IC3 current to drive total load impedance at output. 1 I o3 C 2 R v / i 2r 2r 2 1 id id id 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Rout R r R o3 Copyright © 2005 – The McGraw-Hill Companies srl Two-stage Op Amp: AC Analysis (Common Mode) From ac equivalent circuit for commonmode inputs, v g v g v o 2 m 2 m2 ic ic ic i g c2 r 2( 1)R 1 2 g R 2 o2 1 1 2 m2 R1 m2 1 o2 For differential-mode inputs, collector g current was i m2 v c2 2 id From ac equivalent circuit, we Thus, 2A g R R observe that circuitry beyond m2 C o3 dm collector of Q2 is same as that in 1 2 g R R r 1 2 g R m2 1 C 3 m2 1 differential mode half-circuit. A 1 2 g R The difference in collector m2 1 g R CMRR dm m2 1 currents causes difference in Acm 2 output voltage. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Improving Op Amp Voltage Gain Overall amplifier gain decreases rapidly as the quiescent current of second stage decreases. Voltage gain can improve if resistor in second stage is replaced by current source with R2 >> ro3, if R2 is neglected, g A A A m2 ( R r )( g r ) C 3 m3 o3 dm vt1 vt2 2 This expression can be reduced to 560V A3 A Rout R r r dm 2 o3 o3 28 IC3 1 I o3 C 2 Output resistance is degraded, amplifier more represents transconductance amplifier than a true low output resistance voltage amplifier. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Reducing Output Resistance From ac equivalent circuit, g A m2 ( R r ) v1 C 3 2 A g (r RCC ) v2 m3 o3 in A v3 r ( 4 A C-C stage is added to the prototype to maintain voltage gain but reduce output resistance. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock o4 ( r ( 1)R RCC in L 4 o4 1) R L 1 1) R L o4 v v v A 2 3 oA A A R 2r vt1 vt 2 vt3 dm v v v 2 id id 2 3 R r 1 1 th 4 Rout o3 g 1 g 1 m4 o4 m4 o4 m I 1 f 3 C 4 1 g 1 I m4 o4 C3 Copyright © 2005 – The McGraw-Hill Companies srl Three-Stage Bipolar Op Amp Analysis • • • Problem: Find differential-mode gain, CMRR, input and output resistances. Given data: VCC=VEE=15 V, o1 = o2 = o3 = o4 =100, VA3 =75V, I1 = 100 mA, I2 = 500 mA, I3 = 5 mA, R1 = 750 k , RL = 2 k, R2 and R3 are infinite. g 40I 40( I ) 1.98mS m2 C2 F2 E2 Analysis: I I 3 550mA I I I I E4 I C3 2 B4 2 1 2 1 F4 F4 g 40I 2.2 10 2S m3 C3 o3 4.55k 3 g m3 r Voltage at node 3 is one base-emitter voltage drop above zero. VEC3=15-0.7=14.3 V. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Three-Stage Bipolar Op Amp Analysis (contd.) g V V A m2 ( R r ) 3.50 v1 C 3 2 C3 r 1980 A g ( r ( 1 ) R ) o3 4 I I 4.95mA v 2 m 3 L o4 C4 F4 E4 ( 1)R V L 0.998 1 o4 A r o4 T 505 v3 r ( 1)R 4 I L 4 o4 C4 V A A A A 6920 EB3 15.9k R dm vt1 vt2 vt3 r C I 1 C3 o3 1.61kΩ I R R 2 r 101 kΩ out g C2 2 id 1 F3 m4 o4 CMRR g R 1490 63.5dB m2 1 Overall gain is lower because of lower gain of first stage (since r3 << RC) and lower gain than expected for second stage (as reflected loading of RL is of same order as ro3). r A3 o3 I EC3 162k 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl CMOS Op Amp Prototype: Circuit • Differential amplifier (M1 and M2) followed by C-S stage M3 and source follower M4. • Current sources are used to bias differential input and source follower stages and as load for M3. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl CMOS Op Amp Prototype: AC Analysis V GS 3 A A A (1) m dm vt1 vt 2 f3V V GS 2 TN 2 K K 2 I 1 n2 p3 D3 V TP3 l I I K 3 D2 D3 p3 Design freedom is higher than in bipolar case due to Q-point dependence of mf. Operating A A A A currents should be reduced and M3 should dm vt1 vt2 vt3 have small l to achieve higher gain. Input R g g m2 m R m4 L bias current doesn’t restrict ID1 as IG =0. f 3 2 D 1 g R 1 R R L m 4 out g id m4 Since source follower has unity gain, CMRR g R m2 1 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl BiCMOS Amplifiers • • • Integrated circuit processes that offer combination of bipolar and MOS transistors • or bipolar transistors and JFETs are called BiCMOS and BiFET technologies respectively. • Input PMOS transistors give high input resistance, can be biased at relatively high input currents, which can improve slew rate. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Second gain stage uses BJT with superior amplification factor than FET. RE increases voltage across RD2 and hence the voltage gain of first stage without reducing amplification factor of Q1. Follower stage uses another FET to maximize secondstage gain while maintaining reasonable output resistance. Copyright © 2005 – The McGraw-Hill Companies srl Op Amp Output Stages • Output stage is designed to provide low output resistance and relatively high current drive capability. • Followers: Class-A amplifiers- transistors conduct during full 3600 of signal waveform, conduction angle =3600. • Push-pull: Class-B- each of the two transistors conducts during 1800of signal wavefrom, conduction angle =1800. • Class-AB: Characteristics of Class-A and Class-B are combined, most commonly used as output stage in op amps. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Source-Follower: Class-A Output Stage For a source-follower,difference between input and output voltages is fixed and voltage transfer characteristic is as shown. If load resistor is connected to output, total source vo i I 0 current: S SS R L vMIN = -ISS RL and iS=0, M1cuts off when vI = -ISS RL + VTN. If output signal is given by: vo V sint DD Efficiency of amplifier is given by: 2 V DD 2R Pac L 25% Pav 2 I V SS DD Low efficiency is due to current ISS that constantly flows between the two supplies. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Class-B Push-Pull Output Stage Improve efficiency by operating transistors at zero Q-point current eliminating quiescent power dissipation. NMOS transistor is a source-follower for positive input signals and NMOS transistor is a source-follower for negative input signals. 2 V DD 2R Pac L 78.5% 2 V Pav 2 DD R L Since neither transistor conducts when, V v V TP GS TN output waveform suffers from a dead-zone or crossover distortion. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Class-AB Amplifiers The required bias voltage can be developed as shown.We assume that bias voltage splits equally between gate-source(or base-drain) terminals. Benefits of Class-B amplifier can be maintained without dead zone by biasing transistors into conduction but at a low quiescent current level Currents are given by 2 (<< peak ac current delivered to V K I n GG V load). For each transistor, 1800< D TN 2 0 2 conduction angle <360 . 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock I R I I exp B B C S 2V T Copyright © 2005 – The McGraw-Hill Companies srl Class-AB Output Stages for Op Amps 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Short-Circuit Protection High current, high power dissipation or direct destruction of base-emitter junction can destroy the BJT if output of a follower circuit is accidentally shorted to ground. Q2 is added to protect the emitter follower. Normally, voltage across R is <0.7 V, Q2 is cutoff. Q2 turns on to shunt extra current away from base of Q1. IE1 is limited to I V / R 0.7 / R E1 BE2 For complementary output stage, similar current-limiting circuitry is used. In MOSFET complementary output stages, output current is limited to V 2I / K V G n2 TN 2 GS 2 I S1 R R 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Transformer Coupling: Follower Transformer coupling is used in amplifiers to achieve high voltage gain and efficiency while delivering power to low impedance loads. Coupling capacitor blocks dc path through primary of transformer. v nv 1 2 i ni 2 1 Z n2Z L 1 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Transformer provides impedance transformation by n2 . From ac equivalent circuit,transistor must drive R n2R L EQ v vo 1 n Transformer restricts operation to frequencies >dc. Copyright © 2005 – The McGraw-Hill Companies srl Transformer Coupling: Inverting Amplifier and Class-B Output Stage Inductance permits signal voltage to swing symmetrically above and below VDD. As both quiescent At dc, transformer is a short circuit, operating currents quiescent operating current is supplied = 0, emitters can be through transformer primary. At signal directly connected 2 frequency load n RL is presented to to transformer transistor. primary. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Electronic Current Sources: Introduction • Current through ideal current source is independent of voltage across its terminals and the output resistance is infinite. • In electronic current sources, current depends on voltage across the terminals and they have a finite output resistance. Current source Current sink Single-transistor current sources operate in only one quadrant of i-v space but realize very high output resistances. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Current Sources: Figure of Merit V IoRout CS is used as a figure of merit for comparing different current sources. For a given Q-point current, VCS represents the equivalent voltage that will be needed across a resistor to achieve same output resistance as given current source. For resistor: For BJT: For MOSFET: V V Io Rout EE R V EE CS R V V V Io Rout I ro I A CE V V V CS C C A CE A I C 1 V V Io Rout I ro I l DS 1 V 1 D D I CS l DS l D 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Higher Output Resistance Sources For MOSFET: Rout ro(1 gm R ) m R S f S V V m SS CS f 3 Output resistance of the current source can be increased by placing a resistor in series with the emitter or source of the transistor. For BJT: Rout ro 1 o R E R R r R E 1 2 V o(V V ) oV V o(V V ) oV CS A CE A CS A CE A 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Multiple Output Current Sources V V V V 0.7 E B BE B Assume equal current gains for all BJTs. (V 0.7) 15 I I I B B1 B2 B3 1 F1 1 1 1 22 k 4 . 7 k 0 . 47 k R 1 V 3.18V V BB R R SS 1 2 RR R 1 2 3.39k BB R R 1 2 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock V 15 3.18 ( I I I )(3390) 12V B B1 B2 B3 V 12 0.7 12.7V E V 15 I I E 103μA C1 F B1 F 22kΩ I I 484μA IC3 F I B3 4.84mA C 2 F B2 Copyright © 2005 – The McGraw-Hill Companies srl Multiple Output Current Sources (contd.) Output resistances of the three current sources are given by: Rout ro 1 o R R r 1 1 2 R E 31.8MΩ 72.7 100 1 I R R r C 1 1 2 R E R out1 R 5.48MΩ out2 R 177kΩ out3 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Transistor Current Source Design Example • • • Problem: Design a current source with the largest possible output voltage range that meets the given output resistance specification. Given data:VEE = 15 V, Io = 200 mA, IEE < 250 mA, Rout > 2 M, BJTs available with (o, VA) = (80, 100 V) and (150, 75 V), VB must be as low as possible. Assumptions: Active region and small-signal operating conditions. VBE = 0.7 V, VT = 0.025 V, choose Vo = 0 V as R representative output value. o E Rout ro 1 r Analysis: R R r R o o E 1 2 V Io Rout oV CS A oV IoRout (200μA)(10MΩ) 2000V A 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Transistor Current Source Design Example (contd.) Both BJTs can satisfy these conditions. But, we choose BJT (150, 75V) with higher oVA product. Total current < 250 mA. As output current is 200 mA, maximum of 50 mA can be used by base bias network. Current used by base bias network must be 5 to 10 times base current of BJT (1.33 mA for BJT with a current gain of 150). So bias network current =20 mA. Large RBB reduces output resistance and output compliance range (increase VBB).Trading increased operating current for wider compliance range, choose bias network current of 40 mA. R R 15V 375k 1 2 40mA 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Transistor Current Source Design Example (contd.) • Following set of equations can be used in a spreadsheet analysis to determine design variables. Primary design variable is VBB which can be used to determine other variables. I I o B F V V BB BB R (R R ) 375k 1 1 2 15 15 R R R BB 1 2 V V (V V I R ) BB BE B BB CE EE V V ro A CE Io oV T r Io 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock R ( R R ) R 375k R 2 1 2 1 1 V V I R BB BE B BB R E F Io Rout ro 1 o R E R R r R E 1 2 Copyright © 2005 – The McGraw-Hill Companies srl Bipolar Transistor Current Source Design Example (contd.) • From spreadsheet, smallest VBB for which output resistance > 10M with some safety margin is 4.5 V, resulting output resistance is 10.7M. • Analysis of circuit with 1% resistor values gives Io = 200 mA and supply current = 244 mA. • Final current source design is as shown. • MOSFET current source design can also be analyzed in similar manner. 2 Microelettronica – Circuiti integrati analogici 2/ed Richard C. Jaeger, Travis N. Blalock Copyright © 2005 – The McGraw-Hill Companies srl