Download Assembly Process

Chapter 10
The Assembly Process
What Assemblers Do
• Translates assembly language into
machine code.
• Assigns addresses to all symbolic labels
(variables and labels on statements).
• Determines initial state of the memory
(program and data) in order to execute a
program.
Macros
• Some assemblers allow the programmer
to define a sequence of instructions to be
associated with a keyword.
• The statements in the macro replace the
statement that uses the macro name.
• Functions much like an include directive.
• Some assemblers are advanced and allow
for symbolic replacement of arguments.
Smart Assemblers
• Typical assemblers translate the assembly
language to machine language in a 1 to 1
method.
• A smart assembler is a little bit like what a
compiler does; translates a single statement
into multiple machine language statements.
• MIPS Assembly Language uses a smart
assembler, True Assembly Language is 1-to1 with machine language.
True Assembly Language
• Defines the machine architecture. I.e.,
what must be built into the machine.
• TAL arithmetic and logic instructions
– Must have 3 operands
– MAL allowed 2 for an abbreviated instruction.
– MAL allowed for 3 registers or 2 registers and
an immediate
– TAL requires a different instruction for an
immediate operand
Immediate Operands
• MAL allows the following
– Add $t1,$t2,$t3
– Add $t1, $t2, 8
• In TAL, the first is fine, but for the
immediate operand, you would use
– Addi $t1, $t2, 8
• Other immediate instructions are: andi, lui,
ori, xori.
– Must work with only 16 bits.
Shift
• Recall the 3 shift instructions in MAL:
– Srl
– Sra
– Sll
• Can have 3 register operands or 2
registers and a count (immediate).
• In TAL, if you want to use 3 register
operands, you must use srlv, srav, sllv
– Shift a variable amount
Multiplication
• In MAL, you could use:
– Mul $t1, $t2, $t3
• But we know that multiplying two 32 bit values
could produce a 64 bit value.
• The machine (and TAL) multiply the two operands
and place the result in a special set of registers
called HI and LO
• So the mul instruction above is translated as
– Mult $t2, $t3
– Mflo $t1 #move from lo to reg. t1
– Should check HI for non zero value
Division
• Similar to multiplication, MAL has:
– Div $t1, $t2, $t3
– Rem $t1, $t2, $t3
• The machine (and TAL) places the quotient in
LO and the remainder in HI
• So we have the above translating into:
–
–
–
–
Div $t2, $t3
Mflo $t1
#place the quotient into t1
Div $t2, $t3
Mfhi $t1 #place the remainder into t1
Unsigned Arithmetic
• May want to look at the bits as bigger
unsigned values rather than twos
complement
• Or, you may want to ignore overflow.
• Unsigned arithmetic ignores overflow.
• Addu, subu, multu, divu, addiu
Branch Instructions
• Unconditional
– MAL uses: b label
– TAL uses: j address
• MAL has many branch instructions, recall
– Beq, bne, blt, bgt, ble, bge, bltz, bgtz, blez,
bgez, bnez, beqz
• TAL only has
– bltz, bgtz, blez, bgez, bne, beq
Branching
• In MAL, you would do something like
– Blt $t1, $t2, again
• The assembler translates this to the following
TAL code:
– Sub $at, $t1, $t2
– Bltz $at, again
• The MAL beqz and bnez can be translated
using $0 as an operand with beq and bne.
Problems
• Look at blt $t1, $t2, repeat, where
– $t1 has close to the largest positive value and
– $t2 has close to the most negative value
• When we do sub $at, $t1, $t2 we will get a
value too big to be held -> overflow
• Could use subu which has no overflow.
– But does not give the correct answer for
branching
Comparison Solution
• Create a new instruction to do
comparisons that will not have overflow
problems (does not use subtraction).
• The following TAL instruction does this:
– Slt $10, $11, $12
– Sets $10 to 1 if $11 is less than $12.
– Sets $10 to 0 otherwise.
– Also available in slti form
• Now use with bne, beq, etc. for branching
Load Address
• MAL has a load address (la) instruction. TAL
does not.
• Let’s review what is being accomplished.
– La $8, begin
– Puts the 32 bit address of the label begin into
register $8.
• Can’t have all 32 bits as an immediate
operand, only 16.
• Use two immediate instructions each with 16
of the 32 bits.
Loading a register
• Need an instruction to load the higher 16
bits and another to load the lower 16 bits.
• Lui – load upper immediate – loads the
upper half of the register with the value
specified. Leaves the lower half with 0’s.
• Ori – or immediate. Logical oring of the
rightmost 16 bits with the specified value.
Loading an address
• First you need the address to load.
• As a programmer, you should not deal with
this (know how it is done by the assembler,
but you should not hard code with fixed
addresses).
• The assembler determines the address, say,
0X4083f3a4 (the 0X indicates base 16).
– lui $8,0x4083
– Ori $8, $8, 0xf3a4
Machine Code Format
• The MIPS machine instructions are all 32 bits in
length.
• Some bits are for the operation (opcode), and
then some are for the operands.
• The immediate instructions have the following
format: (Rs – source register, Rt – target reg.)
6-bits
5
5
16
Opcode R2
R1
Immediate operand
Immediate Example
• The instruction:
– Addi $13, $7, 50 would be translated as
001000 00111 01101 0000000000110010
Arithmetic Logic Instructions
• Have the layout:
Opcode R2
R3
R1
Extended opcode
• The opcode is always 000000
• The exended opcode specifies the function.
• Appendix C has opcodes and extended
opcodes.
Arithmetic Instruction Example
• Let’s take the
instruction:
– Add $13, $7, $8
• Converted to machine
language would be:
000000 00111
01000 01101 00000101111
The Assembly Process
• Need to be given where the data segment
and text segment will start.
• The assembler will first go through the code
creating a symbol table
– This table has pairs (symbol name, address) as
entries.
– Just looks at labels.
– Looks at commands and increments a counter
• While doing this, can replace MAL with TAL
statements (and adjust the counter).
Pass 2
• We needed to create a symbol table first
since a branch instruction may refer to a
label that we have not seen yet.
• Now we can go through the TAL program
translating the instructions into machine
language.
• Now we know the addresses, so we can
fill them in.
Branching
• A branch statement has an address as an
operand. This takes 32 bits. But we
cannot use 32 bits for one operand of an
instruction.
• The branch destination is calculated by the
cpu as the contents of the PC+offset
(immediate in the instruction – 16 bits).
• So the offset = address of destination –
(address of branch instruction +4)
• Why +4???
More Scope
• This allows us to branch to destinations a
distance from the PC between -215 and 215-1
• Each instruction take 4 bytes.
• An instruction address is divisible by 4
• Only branch to instruction addresses
• In binary, what do all values divisible by 4 have
in common?
• Leave them out
• Now the 16 bits really represent values from -217
to 217-1
Jump
•
•
•
•
The jump instruction has only one operand
So we have 26 bits for the address.
Still not a 32 bit address 
Can do the same thing as with branch
– Don’t store the last 2 zero bits since all
destination addresses are divisible by 4
• Now we can represent 28 bits with just 26
bits.
– Still not a 32 bit address 
Jump address
• We need 4 more bits.
• This will be the high order 4 bits of the PC
• So the cpu will create the jump address by
taking the 26 bits in the operand, adding
two 0’s to the right and copying the left 4
bits of the PC into the left 4 bits of the
jump address.
• Reverse this process to create the jump
address
Long Branches
• Recall that we can only branch a distance
of about 217 from the current instruction.
• What if we need a conditional branch for a
longer distance.
• Bgtz $5, long_away
• Change to
Blez $5, around
J long_away
Around: ….
Program Relocation
• Each time a program is loaded into
memory, it may be loaded into a different
location.
– We can have several programs running on a
machine at any time.
• Addresses need to be adjusted based on
where the program starts to load.
• This is the job of the loader
Absolute vs. Relative Address
• Not all addresses need to be adjusted.
• Some addresses are absolute addresses
– Those used in a la instruction
– Those used in a jump
– Etc
• Some addresses are relative addresses
– Those used in a branch instruction (relative to
the PC).
• Relative addresses do not need to be
adjusted (relocated).