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Chapter 2
Introduction to
Computer Architecture
and Assembly Language
Computer Architecture
• Interface between hardware and the
lowest level of software
• Assembly language programmer’s view
of the processor
• 3 major components of a computer
1. CPU (Central Process Unit)
2. Memory
3. I/O Devices
• The components are interconnected
by System Bus.
Assembly Language
• A low-level, human-readable
representation of the binary code executed
by a computer.
• A language that controls the primitive
operations on binary data.
• Basic operations include data movement,
addition, subtraction, comparison, shifting
and branching.
Computer Architecture
- Languages
Applications
High Level Language
Low Level language
Hardware
Assembly Language
C, JAVA
Word, Excel
HHL
 Complier
Assembly Language
 Assembler
Machine Language
Von Neumann Machine
(Stored Program Computer)
• The common memory system stores
both the instructions and the data.
Address
Central
Processor
Unit (CPU)
Data
Address path
(Address bus)
Address
Memory
Instruction
Data
Data path
(Data bus)
Data
Memory
• Array of cells storing data
(data/instructions), each
cell has an unique address
• Address port, data port,
control signals.
• Read cycle: data at the
specified memory address
is placed on the data bus.
• Write cycle: data on the
data bus is written into the
specified memory location.
Address transferred from CPU
Address
0000
4
0001
27
9
6
0002
Read
Write
14
32
Data
Data transferred between
CPU and memory
Central Processor Unit (CPU)
• Responsible for reading instructions from
the memory and executing them.
• Address path: used by CPU to provide
memory address of instruction or data to
the memory.
• Data path: used by CPU/memory to
transfer data.
Basic von Neumann Instruction Format
• An instruction consists of operation code and
the operand address
– Could have more than one addresses, later …
• Operation code (op-code): defines what the
instruction does.
• Operand address (address): where the operand
is located – referred to as the address field
Operation Code
Operand address
Von Neumann machine
in Pseudo code
Von Neumann machine operates in a
two-phase mode, fetch/execute cycles.
•
Module Von_Neumann
I := 0
Repeat
Fetch an instruction from memory location I
I := I + 1
Execute the instruction
Forever
END Von_Neumann
Pseudo code for execution
Module Execute the instruction
Decode the instruction
IF instruction requires data, THEN
Fetch the data from the memory
END_IF
Perform operation defined by instruction
IF instruction requires data to be saved, THEN
Save the data in memory
END_IF
End Execute the instruction
Information Flow between
CPU and Memory
Memory
Read
Read
CPU
Read
C := A+B
Instruction
5
A
6
B
11
C
Write
CPU Components
• Arithmetic and logic unit (ALU):
calculation
• Control unit (CU): interprets the
instruction
CPU
Address
Memory
Address bus
Registers
Control bus
CU
ALU
Data
Data bus
Address
Instruction
Instruction
:
Data
:
Data
CPU Components
• Registers: temporary storage
– Program counter (PC): holds the address of
the next instruction to be executed.
– Instruction register (IR): holds instruction
– Data registers: hold data
– Address registers: hold addresses
– Condition code register (CCR): flag bits
• Updated to reflect operation result
• Used to change flow of program
– MAR, MBR, PSW, etc. (later)
Register Transfer Language (RTL)
• A simple language to describe the operations
carried out by CPU.
– We will use it to describe the function of instruction
• [4] or [M(4)] means the content of memory
location 4.
• [M(6)] = 4 means the content of memory
location 6 is the value 4.
• [M(6)] <- 4 means assigning the number 4 to
the memory location 6.
Assembly Language
• A form of the native language of a
computer in which
- machine code instructions are represented
by mnemonics
e.g., MOVE, ADD, SUB
- addresses and constants are usually
written in symbolic form
e.g., NEXT, BACK_SP
MC68000 Assembler
• Valid symbolic name contains up to 8
letters or number.
• Name starts with letter.
• TempVa123, TempVa127 are recognized
as TempVa12 by assembler
Files Created by Assembler
Source
File
Editor
Assembler
Listing File
Binary File
• Binary file or object file is recognized by
machine.
• Listing file contains the information of
program assembling.
• If a program written in more than one
files, LINKER is needed to link the object
files together before execution.
Assembly Language Program
• Two types of statements
1. Executable instructions
2. Assembler directives
• Executable instruction
- translated into machine code by assembler
- tells the machine what to do at execution
Assembly Language Program
• Assembler directives
- tell assembler what to do when program
assembled
- are not translated into machine code,
they are non-executable.
E.g., EQU, DC, DS, ORG, END
Assembly Language Program
• Program written in 4 columns:
[label] instruction [operand] [comment]
- Label: begins in column 1
programmer-defined
reference to a line
• $50 is 50 , %10 is 00000010, 50 is 50 .
16
10
• Longword 32-bit, Word 16-bit, Byte 8-bit.
• A line begins with an ‘*’ in its first column
is a comment -> ignored by the assembler
BACK_SP
DELETE
CAR_RET
EQU
$08
ASCII code for backspace
EQU
$01
ASCII code for delete
EQU
$0D
ASCII code for carriage return
ORG
$00400 Data origin
LINE
DS.B
64
Reserve 64 bytes for line buffer
* Input a character and store it in a buffer
ORG
$001000 Program origin
LEA
LINE,A2
NEXT
BSR
GET_DATA
CMP.B #BACK_SP,D1
BEQ
MOVE_LEFT
CMP.B #DELETE,D1
BEQ
CANCELL
CMP.B #CAR_RET,D1
BEQ
EXIT
MOVE.B D1,(A2)+
BRA
NEXT
MOVE_LEFT LEA
-1(A2),A2
BRA
NEXT
CANCEL
LEA
LINE,A2
BRA
NEXT
GET_DATA MOVE #5,D1
TRAP #15
RTS
EXIT
STOP #$2700
END
Sample
Program
How Assembler Works
• Two-pass assembler
- Source program scanned twice before
producing the object code
• LC: Assembler’s simulation of PC
–When an assembly program is assembled,
LC is used to keep track of the “memory
location” at which an instruction would be
should that instruction be executed.
–So that machine code can be generated
correctly from assembly code.
How Assembler Works
• Pass I:
- Search source program for symbol
definitions and enter these into symbol
table
• Pass II:
- Use symbol table constructed in Pass I
and op-code table to generate machine
code equivalent to source
Pass I (Simplified)
START
[LC] <- 0
Fetch Next Instruction
Y
END?
N
Y
Label?
N
PASS II
Add Label to
Symbol Table
w/ [LC] as its value
Increment [LC]
Accordingly
Pass II (Simplified)
START
[LC] <- 0
Fetch Next Instruction
END?
Y
STOP
N
Op-code Lookup
Symbol Table Lookup
Generate
Machine Code
Increment [LC]
Accordingly
1
2
3
4
5
6
7
8
9
10
11
12
13
LC
Machine Code
00001000
00001000
00001004
00001008
0000100A
0000100E
00001012
00001016
0000101A
0000101C
Example
00000019
A:
00000004
00001008
2411
139A2000
06450019
67000008
90B81004
60EC
4E722700
00001000
M:
N:
EXIT:
DONE:
Assembly Code
OPT
EQU
ORG
DS.W
DC.L
MOVE.L
MOVE.B
ADDI.W
BEQ
SUB.L
BRA
STOP
END
CRE
25
$1000
2
EXIT
(A1),D2
(A2)+,(A1,D2)
#A,D5
DONE
N,D0
EXIT
#$2700
$1000
Lines: 13, Errors: 0, Warnings: 0.
SYMBOL
TABLE INFORMATION
What we care in the symbol table
Symbol-name
A
DONE
EXIT
M
N
Type
EQU
LABEL
LABEL
LABEL
LABEL
Value
00000019
0000101C
00001008
00001000
00001004
Decl
2
12
6
4
5
Cross reference line numbers
8.
9.
5,
11.
* * NOT USED * *
10.
EQU (EQUate)
•
Link a name to a value
Length EQU
Width EQU
Area
30
25
EQU
Length*Width
• The code doesn’t need modified, even if
the length and the width changed,
• It tells reader how the Area is
computed.
ORG (ORiGin)
• Sets up value of location counter (LC)
• LC: Assembler’s simulation of PC
DC (Define a Constant)
•
•
Define and initialize a variable
Qualified by .B, .W, or .L
(byte, word, or longword)
Memory Map
:
FIRST
ORG $00001000
DC.B 10,66
DC.L $0A1234
...
001000
0A
42
001001
001002
00
0A
001003
001004
12
34
001005
:
:
• Loads constant into the memory in
hexadecimal
• A 16-bit word should not be stored
across the even boundary, e.g. at 1001
Demonstration
* The memory is addressable by byte, but
* the data is fetched in word, 16 bits.
FIRST
SECOND
DATA
ORG
DC.B
DC.B
DC.L
STOP
END
$1000
10,66
20
$ABCD
#$2700
$1000
>md 1000
001000 0A 42 14 00 00 00 AB CD 4E 72 27 00 00 00 00 00.
DS (Define Storage)
• Reserves (allocates) storage location in
memory
• Similar to DC, but no values stored
• DC: set up values in memory locations
• DS: reserve memory space for variables
• Example on page 68
Example
01000
011FF
01200
01201
01202
01203
01204
01205
01206
01207
01208
01209
0120A
0120B
0120C
18000
18001
TABLE
POINTER_1
VECTOR_1
00
00
FF
FF
INIT
41
F9
ENTRY
TABLE
POINTER_1
VECTOR_1
INIT
…
ENTRY
ORG $001000
DS.W 256
DS.L 1
DS.L 1
DC.W 0,$FFFF
ORG $018000
LEA ACIAC,A0
MOVE.B #SETUP1,(A0)
END
• End of program
More on Instruction Format
• An instruction is an op-code followed by
address(es)
– Address means any address in system
• General Instruction Formats
– Four-address format
[Op-code | Src1 | Src2 | Dst | NextInstr]
x=y+z
Src1: y, Src2: z, Dst: x
More on Instruction Format
• General Instruction Formats (Cont’d)
– Three-address format
[Op-code | Src1 | Src2 | Dst]
Use program counter for next instruction
– Two-address format
[Op-code | Src1 | Src2 (and Dst)]
x=y+x
Src1: y, Src2 and Dst: x
68000 uses two-address format
More on Instruction Format
• General Instruction Formats (Cont’d)
– One-address format
[Op-code | Src1]
Accumulator (AC) is Src2 and DST
[AC] = [AC] + y
– Zero-address format
[Op-code]
Use stack
Post-order expression
Example
•I=J+K
– Four-address format
ADD J, K, I, NEXT
;I=J+K
; next instruction in location NEXT
– Three-address format
ADD J, K, I
;I=J+K
; next instruction in PC
– Two-address format
MOVE J, I
ADD K, I
;I=J
;I=K+I
How about:
ADD K, J
MOVE J, I
Example
•I=J+K
– One-address format
LOAD J
ADD
K
STORE I
; AC = J
; AC = J + K
; I = AC
– Zero-address format, postfix: I = JK+
LOAD J
LOAD K
ADD
STORE I
; push J onto stack
; push K onto stack
; pop and add J and K, result on top
; pop stack top to I
More Examples
•
•
•
•
•
•
•
I
I
I
I
I
I
I
=
=
=
=
=
=
=
J+K+L
J+K*L
(J + K) * L
(J + K) * L – M
J+K*L–M
J + K * (L – M)
(J + K) * (L – M)