Download co unit-1 comp-arithmetic

1. What is long form of ENIAC ?
A. Electronic Numerical Integrator and computer
2. What is long from of EDVAC?
A. Electronic Discrete Variable computer
3. Which kind of architecture is used in EDVAC ?
A. Harvard
B. Von Neumann
C. Both of these
D. None of these
4. Which kind of number system is used by ENIAC ?
A. Decimal
B. Binary
C. Hex
D. Octal
5. Which basic components are used in ENIAC ?
A. Vacuum tubes
B. Transistor
C. Integrated Circuit
D. Gates
6. How many number of accumulators are used in ENIAC ?
A. 10
B. 20
C. 30
D. 40
7. Stored program concept is introduced in which type of architecture ?
A. Harvard
B. Von Neumann
C. Both of these
D. None of these
8. What is the long form of IAS ?
A. Institute of Advance Studies
9. Which architecture stores program and data in main memory?
A. Harvard
B. Von Neumann
C. Both of these
D. None of these
10. Which architecture stores program and data in separate memory?
a. Harvard
b. Von Neumann
c. Both of these
d. None of these
11. Which architecture has higher speed?
a. Harvard
b. Von Neumann
c. Both of these
d. None of these
12. What are the main components of CPU ?
a. ALU and Program Control Unit
b. ALU and memory
c. I/O and ALU
d. Program control unit and memory
13. Which kind of number system is used by IAS ?
a. Decimal
b. Binary
c. Hex
d. Octal
14. What is a size of word in IAS?
a. 10
b. 20
c. 30
d. 40
15. How many words are present in IAS ?
a. 1000
b. 200
c. 2000
d. 100
16. What is the size of IAS instructions?
a. 30 bits
b. 20 bits
c. 10 bits
d. 5 bits
17. What is function of MAR ?
A. Read/write a word form memory
B. Specify an address of memory
C. Contains the 8-bit op-code
D. Store address of next instruction
18. What is function of MBR ?
A. Read/write a word form memory
B. Specify an address from memory
C. Contains the 8-bit op-code
D. Store address of next instruction
19. What is function of PC ?
A. Read/write a word form memory
B. Specify an address from memory
C. Contains the 8-bit op-code
D. Store address of next instruction
20. What is function of IBR ?
A. Read/write a word form memory
B. Holds the right hand instruction from a word in a memory
C. Contains the 8-bit op-code
D. Store address of next instruction
21. What is function of IR ?
A. Read/write a word form memory
B. Specify an address from memory
C. Contains the 8-bit op-code
D. Store address of next instruction
22. Which register pair holds the result of multiplication operation?
A. AC,MQ
B. MQ,AC
C. AC,PC
D. PC,AC
23. What is function of Accumulator?
A. Read/write a word form memory
B. Specify an address from memory
C. Holds the result of arithmetic and logical operations
D. Store address of next instruction
24. What is a size of each register in IAS?
a. 20
b. 10
c. 40
d. 30
25. What is the abbreviation of UNIVAC?
a. Universal Automatic Computer
26. Which is the first generation computer?
a. IAS
b. IBM 7094
c. DEC PDP
d. 8086
27. Which basic components are used in first generation computers?
a. Vacuum tubes
b. Transistor
c. Integrated Circuit
d. Gates
28. Which basic components are used in second generations’ computers?
a. Vacuum tubes
b. Transistor
c. Integrated Circuit
d. Gates
29. Which basic components are used in third generation computers?
a. Vacuum tubes
b. Transistor
c. Integrated Circuit
d. Gates
30. Which is the second generation computer?
a. IAS
b. IBM 7094
c. DEC PDP
d. 8086
31. Which is the third generation computer?
a. IAS
b. IBM 7094
c. DEC PDP
d. 8086
32. What types of memories are used in second generation computers?
a. Magnetic core memories
b. Semiconductor memories
c. Optical memories
d. All of these
33. What types of memories are used in third generation computers?
a. Magnetic core memories
b. Semiconductor memories
c. Optical memories
d. All of these
34. Which is first microprocessor developed by Intel ?
a. 4004
b. 8008
c. 8086
d. 8080
35. Which is first general purpose microprocessor developed by Intel?
a. 4004
b. 8008
c. 8086
d. 8080
36. Which of the following is an input device?
a. Keyboard
b. Monitor
c. Printer
d. Hard Disk
37. Which of the following is an output device?
a. Keyboard
b. Joy stick
c. Printer
d. Hard Disk
38. What is the significance of data bus?
a. To determine number of bits to be transferred at a time.
b. Maximum memory capacity of the system
c. To transfer the peripheral address.
d. Control of a system
39. What is the significance of address bus?
a. To determine number of bits to be transferred at a time.
b. Maximum memory capacity of the system
c. To transfer the peripheral address.
d. Both b and c
40. What is the significance of control bus?
a. To determine number of bits to be transferred at a time.
b. Maximum memory capacity of the system
c. To transfer the peripheral address.
d. To generate and transfer the control signals
41. Which system bus decides the maximum memory accessing capacity?
a. Data bus
b. Control bus
c. Address bus
d. External data bus
42. Which number system is used in computer?
a. Binary
b. Decimal
c. Hex
d. Octal
43. Which are the basic data types of computer?
a. Fixed and floating point numbers
b. Fixed, Floating and Character
c. Floating and Character
d. None of these
44. Which bit represents the sign of a number in sign magnitude representation?
a. MSB
b. LSB
c. Both a and b
d. None of these
45. MSB=0, means
a. Number is positive
b. Number is negative
c. Both a and b
d. None of these
46. MSB=1, means
a. Number is positive
b. Number is negative
c. Both a and b
d. None of these
47. Which representation is commonly used by computer?
a. Sign Magnitude representation
b. 1’s complement representation
c. 2’s complement representation
d. 9’s complement representation
48. Which representation give two forms of zero?
a. Sign Magnitude representation
b. 1’s complement representation
c. 2’s complement representation
d. 9’s complement representation
49. What is the range of 8-bit sign binary number?
a. -127 to +127
b. -128 to +127
c. -127 to +128
d. +127 to -127
50. What is the range of 16-bit sign binary number?
a. +32767 to -32768
b. -32767 to +32768
c. +32767 to -32767
d. +32768 to -32768
51. Perform arithmetic right shift operation on 11001011.
51. Perform logical right shift operation on 11001011.
52. In Booth’s algorithm, if Q0=0 and Q-1=0 then it will perform which operation,
a. A=A-M
b. A=A+M
c. Arithmetic right shift of A, Q and Q-1
d. A=M-A
53. In Booth’s algorithm, if Q0=1 and Q-1=1 then it will perform which operation,
a. A=A-M
b. A=A+M
c. Arithmetic right shift of A, Q and Q-1
d. A=M-A
54. In Booth’s algorithm, if Q0=1 and Q-1=0 then it will perform which operation,
a. A=A-M
b. A=A+M
c. Arithmetic right shift of A, Q and Q-1
d. A=M-A
55. In Booth’s algorithm, if Q0=0 and Q-1=1 then it will perform which operation,
a. A=A-M
b. A=A+M
c. Arithmetic right shift of A, Q and Q-1
d. A=M-A
56. In Booth’s algorithm, for Multiplier=1000 and Multiplicand=1100. How many
number of cycles are required to get the correct multiplication result?
a. 4
b. 5
c. 3
d. 6
57. In Booth’s algorithm, for Multiplier=100 and Multiplicand=1100. How many
number of cycles are required to get the correct multiplication result?
a. 4
b. 5
c. 3
d. 6
58. In Booth’s algorithm, for Multiplier=10000 and Multiplicand =1100101. How
much number of cycles are required to get the correct multiplication result?
a. 4
b. 5
c. 3
d. 6
59. In Booth’s algorithm, for Multiplier=10000 and Multiplicand =1100101.What
will be the size of A register?
a. 4
b. 5
c. 3
d. 6
60. In Booth’s algorithm, for Multiplier=100 and Multiplicand=1100. What will be
the size of A register?
a. 4
b. 5
c. 3
d. 6
61. What will be the result of Booth recoding operation on 0011110?
a. 0+1000-10
b. 0+1000+10
c. 0+10000
d. 0-1000-10
62. What will be the effect of performing booth recoding operation on the multiplier?
a. Halves the maximum number of summands
b. Doubles the maximum number of summands
c. Same the maximum number of summands
d. None of these
63. What version of multiplicand will be selected if consecutive multiplier bits are
00?
a. 0*M
b. +1*M
c. -1*M
d. 2*M
64. What version of multiplicand will be selected if consecutive multiplier bits are
01?
a. 0*M
b. +1*M
c. -1*M
d. -2*M
65. What version of multiplicand will be selected if consecutive multiplier bits are
10?
a. 0*M
b. +1*M
c. -1*M
d. 0*M
66. What version of multiplicand will be selected if consecutive multiplier bits are
11?
a. 0*M
b. +1*M
c. -1*M
d. 0*M
67. Which of the following is good multiplier in booth recoding multiplication?
a. 01010101
b. 00001111
c. 11001100
d. None of these
68. Which of the following is worst case multiplier in booth recoding multiplication?
a. 01010101
b. 00001111
c. 11001100
d. None of these
69. Which of the following is ordinary (average) multiplier in booth recoding
multiplication?
a. 01010101
b. 00001111
c. 11001100
d. None of these
70. In booth recoding, M is multiplicand and -1 is booth recoded multiplier, then what
will be the result of multiplication?
a. 1’s complement of M
b. 2’s complement of M
c. M
d. Right shift of M
71. In booth bit-pair recoding, M is multiplicand and -2 is multiplier, then what will
be the result of multiplication?
a. 2’s complement of M
b. 2’s complement of M and left shift
c. Left shift and 2’s complement of M
d. Right shift and 2’s complement of M
72. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 000?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
73. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 000?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
74. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 001?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
75. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 010?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
76. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 011?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
77. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 100?
a. 0*M
b. +1*M
c. +2*M
d. -2*M
78. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 101?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
79. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 110?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
80. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
consecutive multiplier bits are 111?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
81. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are 00?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
82. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are 0+1?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
83. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are +1-1?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
84. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are +10?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
85. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are -10?
a. 0*M
b. +1*M
c. +2*M
d. -2*M
86. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are -1+1?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
87. In Booth’s bit-pair recoding, what version of multiplicand will be selected if
recoded multiplier bits are 0-1?
a. 0*M
b. +1*M
c. -1*M
d. +2*M
88. What will be the result of Booth’s bit-pair recoding operation on this multiplier
111010?
a. 0-1-2
b. 0+2-1
c. 012
d. 0-10
89. What will be the result of Booth’s bit-pair recoding operation on this multiplier
11010?
a. 0-1-2
b. 0+2-1
c. 012
d. 0-10
90. What will be the result of Booth’s bit-pair recoding operation on this multiplier
011010?
a. +2-1-2
b. -2+2-1
c. 012
d. 0-10
91. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if magnitude of A < 0 then ?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
92. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if magnitude of A > 0 then ?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
93. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if sign of A is positive?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
94. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if sign of A is negative?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
95. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if MSB of A is 0?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
96. In Booth’s restoring division algorithm, after performing operations (1) left shift
operation on A,Q and (2) A=A-M, if MSB of A is 1?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
97. In Booth’s restoring division algorithm, for Dividend=1000 and Divisor=100.
How many numbers of cycles are required to get the correct division result?
a. 4
b. 5
c. 3
d. 6
98. In Booth’s restoring division algorithm, for Dividend=10000 and Divisor=100.
How many numbers of cycles are required to get the correct division result?
a. 4
b. 5
c. 3
d. 6
99. In Booth’s restoring division algorithm, for Dividend=1000 and Divisor=0011.
What size of divisor will give you correct answer?
a. 4
b. 5
c. 3
d. 6
100.
In Booth’s restoring division algorithm, which register holds the quotient
and remainder?
a. Q=Quotient and A=Remainder
b. A=Quotient and Q=Remainder
c. M=Quotient and A=Remainder
d. Q=Quotient and M=Remainder
101.
In Booth’s non-restoring division algorithm, after performing left shift
operation on A,Q registers, if magnitude of A < 0 then ?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
102.
In Booth’s non-restoring division algorithm, after performing left shift
operation on A,Q registers, if magnitude of A > 0 then ?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
103.
In Booth’s non-restoring division algorithm after performing left shift
operation on A,Q register, if sign of A is positive?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
104.
In Booth’s non restoring division algorithm, after performing left shift
operation on A,Q register, if sign of A is negative?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
105.
In Booth’s non restoring division algorithm, after performing left shift
operation on A,Q register, if MSB of A is 0?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
106.
In Booth’s non restoring division algorithm, after performing left shift
operation on A,Q registers, if MSB of A is 1?
a. Q0=0, A=A+M
b. A=A+M
c. Q0=1
d. A=A-M
107.
In Booth’s non restoring division algorithm, for Dividend=1000 and
Divisor=100. How many numbers of cycles are required to get the correct
division result?
a. 4
b. 5
c. 3
d. 6
108.
In Booth’s non restoring division algorithm, for Dividend=10000 and
Divisor=100. How many numbers of cycles are required to get the correct
division result?
a. 4
b. 5
c. 3
d. 6
109.
In Booth’s non restoring division algorithm, for Dividend=1000 and
Divisor=0011. What size of divisor will give you correct answer?
a. 4
b. 5
c. 3
d. 6
110.
In Booth’s non restoring division algorithm, which register holds the
quotient and remainder?
a. Q=Quotient and A=Remainder
b. A=Quotient and Q=Remainder
c. M=Quotient and A=Remainder
d. Q=Quotient and M=Remainder
111.
In Booth’s non restoring division algorithm, at the end of last cycle, if
magnitude of A < 0?
a.
b.
c.
d.
A=A+M
A=A-M
M=A+M
End of algorithm
112.
In Booth’s non restoring division algorithm, at the end of last cycle, if
magnitude of A > 0?
a. A=A+M
b. A=A-M
c. M=A+M
d. End of algorithm
113.
How many bits are needed to represent floating point number in a single
precision form?
a. 32
b. 16
c. 64
d. 50
114.
How many bits are needed to represent floating point number in a double
precision form?
a. 32
b. 16
c. 64
d. 50
115.
What is the size of bias exponent in single precision representation of
floating point number?
a. 8
b. 10
c. 23
d. 52
116.
What is the size of bias exponent in double precision representation of
floating point number?
a. 10
b. 11
c. 25
d. 21
117.
What is the size of mantissa in single precision representation of floating
point number?
a. 23
b. 32
c. 16
d. 24
118.
What is the size of mantissa in double precision representation of floating
point number?
a. 52
b. 11
c. 23
d. 16
119.
What is the range of bias exponent in single precision representation of
floating point number?
a. 0 to 255
b. 0 to 1023
c. 0 to 256
d. 0 to 127
120.
What is the range of bias exponent in double precision representation of
floating point number?
a. 0 to 255
b. 0 to 1023
c. 0 to 256
d. 0 to 127
121.
What is the range of bias exponent in double precision representation
of floating point number?
a. 0 to 255
b. 0 to 1023
c. 0 to 256
d. 0 to 127
122.
What are the values of bias exponent to represent single precision floating
point values of exact 0 and infinity respectively?
a. 0 and 255
b. 255 and 0
c. 0 and 127
d. 127 and 0
123.
What are the values of bias exponent to represent double precision
floating point values of exact 0 and infinity respectively?
a. 0 and 1023
b. 255 and 0
c. 0 and 127
d. 127 and 0
124.
What is the relation in between in sign exponent E and bias exponent E’ in
single precision floating point number?
a. E=E’-127
b. E=E’+127
c. E=127-E’
d. E=E’-1023
125.
What is the relation in between in sign exponent E and bias exponent E’ in
double precision floating point number?
a. E=E’-127
b. E=E’+127
c. E=1023-E’
d. E=E’-1023
126.
What is the representation for IEEE single precision floating point
number?
+/- 1.M * eE’-127
+/- 1.M * e127-E’
+/- 1.M * eE’-1023
+/- 1.M * e1023-E’
127.
What is the representation for IEEE single precision floating point
number?
a. +/- 1.M * eE’-127
b. +/- 1.M * e127-E’
c. +/- 1.M * eE’-1023
d. +/- 1.M * e1023-E’
a.
b.
c.
d.
128.
What is the result of normalization on (10011101011.001)2 ?
a. 1.0011101011001*210
b. 1.0011101011001*211
c. 1.0011101011001*29
d. 1.0011101011001*28
129.
What is the result of IEEE doulbe precision representation for
(1259.125)10?
a. 0100000010010011101011001….
b. 1100000010010011101011001….
c. 1111000010010011101011001….
d. 0100001110010011101011001….
130.
What is the result of IEEE single precision representation for
(1259.125)10?
a. 0100010010011101011001….
b. 1100000010010011101011001….
c. 1111000010010011101011001….
d. 0100001110010011101011001….
131.
What is the result of IEEE single precision representation for (127.1075)10?
a. 110000101111111000110111…….
b. 1100000010010011101011001….
c. 1111000010010011101011001….
d. 0100001110010011101011001….
132.
What is the result of IEEE double precision representation for (127.1075)10?
a. 1100000001011111111000110111…….
b. 1100000010010011101011001….
c. 1111000010010011101011001….
d. 0100001110010011101011001….