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MOSFET Definitions: MOSFET Stand for (Metal Oxide Semiconductor Field Effect Transistor) The MOSFET was invented Egypt Scientist Muhammad M.Atalla and Korean Scientist Dawan Kahng. It is a type of transistor that is most widely used in Electronics Devices. It is most widely used for switching and amplifying electronics signal in electronics devises. It can be used in both Analog and digital Circuit. MOSFET transistor can be used to make switching circuits with very low power consumption in the form of CMOS logics. Unlike (BJT) which is Current Controlled voltage source device, the MOSFET is a voltage controlled current source device. There are many application if the MOSFET in saturation region. MOSFET has high input impedance and it is very high voltage controlling device N-channel enhancement type MOSFET is most widely used MOSFET Structure: The MOSFET is core of integrated circuit and it can be designed and fabricated in a single chip because of these very small size. The MOSFET is four Terminal Device With i) ii) iii) iv) Source (S) GATE (G) DRAIN(D) BODY(B) The body part of the MOSFET are consist a lightly Doped (P-type or N-type) semiconductor material are called substrate. On the body part there are two heavily doped (N-type or P-type) semiconductor materials are connected with a Metal terminal Source (S) and Drain (D). A heavily doped (conductor) terminal of Polysilicon operating as a Gate (G) and a thin Layer of insulator (silicon dioxide (SiO2)) also called Oxide are insulating the Gate terminal from the Semiconductor material. Due to the P-type substrate and N-type heavily doped semiconductor material there is a depletion region is generated. We can say that MOSFET is a combination of two diode. GATE (G) is a triggered point when we apply some voltage on a GATE (G) it generates an electric fields between the Gate (G) and body Substrate and Creates a Chanel between the Drain (D) to Source (S) and causes by a flow of current from the Drain (D) to Source (S).the width of the created channel between Drain-Source is controlled by Gate (G). The MOSFET may be thought of as variable resistor, where the GAT-Source Voltage difference can control the Drain-Source resistance. When there is no apply voltage between the Gate-Source, the Drain-Source resistance is very high, which is almost like an open circuit and no channels is created between the Drain-Source, so no current flow through the Drain-Source. When Gate-Source voltage is applied the Drain-Source resistance is reduced and Channel is created between Drain-Source, and there will be current flow through Drain-Source. Operation and working: The body substrate of the MOSFET is frequently connected to the Source Terminal with low voltage GND, Gate (G) and Drain (D) are connected with high voltage, the Gate Voltage is called ( VGS ) and Drain Voltage is called (VDS ). Due to the high voltage on Drain (D) terminal N-type semiconductor and low voltage on P-type body substrate there will be a reverse biased relation due to this depletion region will be increased. When there is no voltage apply on Gate then there is no Channel Created between Drain-Source and No Current Flow. When we apply some voltage (VGS) on Gate (G) terminal then it will generate an electric field between P-substrate of the Body terminal due to Low voltage on substrate. And due to the high voltage of the Gate (G) the positive (+) charge on the Gate (G) attract the minority carries of the Electrons (-) in P-substrate to the Gate (G). And due to the Oxide insulator the electron will not move to the poly Metal plate of the Gate (G). Oxide Insulator between the Gate and substrate are work as a capacitor. When we increase the more voltage (VGS) on the Gate (G) the Minority carries electron creates Channel between the Source and Drain and due to the Drain- Source Voltage (VDS) the current (ID) will be flow from the Drain to Source. i) If VGS=0 and VDS=+ve then No current ID Flow from Drain-Source ii) If VGS=+ve ,VGS<VTH and VDS=+ve also no current ID Flow from Drain-Source iii) If VGS=+ve ,VGS>VTH and VDS=+ve then current ID Flow from Drain-Source Threshold Voltage: It is a Voltage at which channel begin to conduct it is represented with (VTH). If we hold VGS=Constant and increase the level of VDS then will the following condition. i) Cut of Region If VGS<VTH then MOSFET will be in Cut of Region in this region no current flow from DrainSource ii) Triode Region iii) If VDS≤VGS-VTH then it will be in Triode Region and ID will be Increase due to increase the VDS. If VDS=VGS-VTH then channel will be pinched off due to increasing the depletion region on Drain N-type semiconductor due to the reverse biased relation. iv) Saturation Region v) VDS≥VGS-VTH then MOSFET will be in Saturation Region in this region ID will be Constant by increasing VDS. If we increased VGS the Drain Current ID will be increased it is Non-linear relationship we can find it by Formula. ID=k(VGS-VTH)2 ‘k’ is Constant MOSFET Types: 1) There are two types of MOSFET Enhancement Mode MOSFET (P-Channel & N-Channel): The Most preferred transistor in MOSFET is of Enhancement type. In this type by default as there is no existing channel and there is no conduction seen if VGS are zero. As the voltage reached the VTH the conductivity tends to increase. More voltage applied on the Gate terminal the device good conductivity. It required VGS on Positive to turn the device ON. The VGS is directly proportional to the current as the VGS increases the current increases and vice versa i) N-Channel: A lightly doped P-type substrate forms the body of the device and the source and drain are heavily doped with N-type impurities. N-channel have electrons as majority carriers. The applied gate voltage is positive to turn “ON” the device It has lower inherent capacitance and smaller of electrons which makes it to operate at high switching speed. It contains positively charged contaminates MOSFET to turn on prematurely. Drain resistance is low compared to P-type. ii) P-Channel: A lightly doped N-type substrate forms the body of the device and the source and drain are heavily doped with P-type impurities. P-channel have holes as majority carriers. The applied gate voltage is negative to turn “ON” the device It has higher inherent capacitance and mobility of holes is low which makes it to operate at low switching speed compared to N-type It contains positively charged contaminates MOSFET to turn on prematurely. Drain resistance is higher compared to N-type 2) Depletion Mode MOSFET (P-Channel & N-Channel): In this Mode the channel in the MOSFET is already established show its maximum conductance when VGS are zero. It is open or “ON” by default. As the VGS is Negative or Positive then decreased the Channel conductivity. It required VGS on Positive to turn the device OFF. The VGS is inversely proportional to the current as the VGS increases the current decreases i) N-Channel: A lightly doped P-type substrate forms the body of the device and the source and drain are heavily doped with N-type impurities. The applied VGS is Negative. The channel is depilated of its free electrons. ii) P-Channel: A lightly doped P-type substrate forms the body of the device and the source and drain are heavily doped with N-type impurities. The applied VGS is Positive. The channel is depilated of its free holes. MOSFET Symbols: I/V Characters of MOSFET Equations: For NMOS Case 1: if VDS is very Low (VDS<2(VGS-VTH) then we use equation. 𝐈𝐃 = 𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 [(𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝐕𝐃𝐒 Case 2: If the device in Triode Region/linear Region (VDS≤VGS-VTH) Then we use Equation 𝐈𝐃 = 𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 Cax: Capacitance per Unite area, F/m µn: Mobility of charge carriers. Length “L”=the dimension of the Gate along the Source-Drain path mostly it is” .15µm”. Width “W”:perpendicular to the length tax= thickness of Gate Oxide mostly it is “50 A” Case 2: If the Device in saturation Region (VDS≥VGS-VTH) then Equation is used. 𝐈𝐃 = 𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 [(𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝐕𝐃𝐒 − 𝟏𝟐𝐕𝐃𝐒 𝟐 ] For PMOS Case 1: if VDS is very Low (VDS<2(VGS-VTH) then we use equation. 𝐈𝐃 = −𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 [(𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝐕𝐃𝐒 Case 2: If the device in Triode Region/linear Region (VDS≤VGS-VTH) Then we use Equation 𝐈𝐃 = −𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 Case 2: If the Device in saturation Region (VDS≥VGS-VTH) then Equation is used. 𝐈𝐃 = −𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 [(𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝐕𝐃𝐒 − 𝟏𝟐𝐕𝐃𝐒 𝟐 ] Channel Length Modulation: 𝐈𝐃 = −𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 𝐈𝐃 = −𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 𝐈𝐃 = −𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 ∆𝑳 𝑳 𝐖 (𝐕𝐆𝐒 𝐋 𝐖 𝐋−∆𝐋 𝐖 𝐋 − 𝐕𝐓𝐇 )𝟐 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 (𝟏 + ∆𝑳 ) 𝑳 =⋋ 𝑽𝑫𝑺 𝐈𝐃 = −𝟏𝟐𝛍𝐧 𝐂𝐨𝐱 𝐖 𝐋 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 (𝟏 +⋋ 𝑽𝑫𝑺 ) 𝐕𝐀 = ⋋𝟏 , Channel Length Modulation coefficient Concept of Transconductance: MOSFET is a voltage control current source device.it mean if we change applied Gate voltage (VGS) then the Drain-Source current (ID) will also be changed in Saturation region. This change also called transconductance of device it is represented with gm. This application of MOSFET can be used in amplifier 𝒈𝒎 = ∆𝑰𝒅 ∆𝑽𝑮𝑺 𝟏 𝟐 𝐈𝐃 = 𝛍𝐧 𝐂𝐨𝐱 𝒈𝒎 = 𝛍𝐧 𝐂𝐨𝐱 𝒈𝒎 = 𝐖 𝐋−∆𝐋 𝐖 𝐋 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 )𝟐 ⋋=0 (𝐕𝐆𝐒 − 𝐕𝐓𝐇 ) 𝟐𝑰𝑫 𝑽𝑮𝑺 −𝑽𝑻𝑯 𝒈𝒎 = √𝟐𝑰𝑫 𝝁𝒏 𝑪𝒐𝒙 𝑾𝑳 If we include channel length modulation factor then. 𝒈𝒎 = 𝛍𝐧 𝐂𝐨𝐱 𝐖 (𝐕𝐆𝐒 𝐋 − 𝐕𝐓𝐇 )(1 +⋋ 𝑉𝐷𝑆 ) 𝑾 𝑳 𝟐𝝁𝒏 𝑪𝒂𝒙 ( )𝑰𝑫 𝒈𝒎 = √ 𝟏+⋋𝑽𝑫𝑺 MOSFET Biasing: For using a MOSFET in different application first we need to bias the MOSFET device with proper voltage source. If we connect directly to its any signal source (MIC, camera) the analog signal voltage level is very low that will not meet threshold voltage level So, the MOSFET device will not be ON condition So, It will not work properly first we need to biased it. General procedure for Biasing MOSFET device. “Vo” (adjust voltage on Gate side) and “V1” (adjust voltage on Drain side) are the biased voltages and “ID” is a biased Current. Mostly we change voltage level of only one voltage source at a time. We adjust these two voltage to meet the threshold level and make the MOSFET device in saturation region. Meet this condition V1>Vo-VTH. Small Signal Model General procedure for constructing small signal model. ∆V is a change in voltage or the Signal voltage “∆ID” is a change in Drain current due to change in Gate voltage ∆V/Signal Input voltage “Vin=VmSinwt”. VoVo+∆V IDID+∆ID ∆I=gm∆V Apply Proper Biased voltage to the device. Increment only one biased voltage. Measure all current increment. Large Signal Model: MOSFET Amplifier: Definition: It is a device that is used to increase the amplitude/voltage level of the weak Analog Signal generated by a microphone are any other analog signal source (e.f voice signal or data signal). MOS Technology: CMOS Stand for Complementary–MOS. In this technology we combine PMOS and NMOS devices together in a circuits. CMOS Amplifier: Amplifier Design procedure Select an amplifier topology (Common-Source, Common Gate Bias one transistor to obtain proper for (gm, ro e.t.c). Determine the characteristics of the amplifier. Voltage Gain Power Consumption. e.t.c) values Common-Source (CS) Amplifier: In this Topology The input of the device apply to the Gate of the amplifier and the output of the amplifier Sense/measure on the Drain of the device. Let’s Build an Amplifier “RD” is a Load resister that is used to convert the “ID” current into output voltage Mostly we take output between Drain and GND Vout=VDD-VRd VRd=IDRD Vout=VDD- IDRD (CS) Amplifier Voltage Gain (Av): Small Signal Model of (CS) amplifier V1=Vin KCL at output Node ID=Vout/RD gmVin+Vout/RD Vout/Vin=-gmRD Av= Vout/Vin Av=-gmRD, ⋋= 0 Av=Voltage Gain Port Impedance: Input impedance: Output impedance: Different types of Common Source Stages: Common Source Amplifier with Resistive Load: Common Source Amplifier with Current Connected Load: In application requiring a large voltage gain in a single stage the relationship Av=-gmRD suggests that we increase the load impedance of the CS stage. With a resister or diode connected load, however increasing the load resistance limits the output voltage swing. A more practical approach is to replace the load with a current source. Where both transistors operate in saturations. ro2 Common Source Amplifier with Diode Connected Load: A MOSFET can operate as a small signal resistor if its gate and drain are shorted called as 'diode connected' device in analogy with its bipolar counterpart CS Stages with Source Degeneration: CS Stages with Resistive Source Degeneration: CS Stages with Current Source Degeneration: