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MMP60R750P Datasheet
MMP60R750P
600V 0.75Ω N-channel MOSFET
 Description
MMP60R750P is power MOSFET using magnachip’s advanced super junction technology that can
realize very low on-resistance and gate charge. It will provide much high efficiency by using
optimized charge coupling technology. These user friendly devices give an advantage of Low EMI to
designers as well as low switching loss.
 Key Parameters
 Package & Internal Circuit
Parameter
Value
Unit
VDS @ Tj,max
650
V
RDS(on),max
0.75
Ω
VTH,typ
3
V
ID
5.7
A
Qg,typ
15
nC
D
G
G
D
S
S
 Features

Low Power Loss by High Speed Switching and Low On-Resistance

100% Avalanche Tested

Green Package – Pb Free Plating, Halogen Free
 Applications

PFC Power Supply Stages

Switching Applications

Adapter

Motor Control

DC – DC Converters
 Ordering Information
Order Code
Marking
Temp. Range
Package
Packing
RoHS Status
MMP60R750PTH
60R750P
-55 ~ 150℃
TO-220
Tube
Halogen Free
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
 Absolute Maximum Rating (Tc=25℃ unless otherwise specified)
Parameter
Symbol
Rating
Unit
Drain – Source voltage
VDSS
600
V
Gate – Source voltage
VGSS
±30
V
5.7
A
TC=25℃
3.6
A
TC=100℃
Continuous drain current
ID
Pulsed drain current(1)
IDM
17.1
A
Power dissipation
PD
48
W
Single - pulse avalanche energy
EAS
75
mJ
MOSFET dv/dt ruggedness
dv/dt
50
V/ns
Diode dv/dt ruggedness
dv/dt
15
V/ns
Tstg
-55 ~150
℃
Tj
150
℃
Storage temperature
Maximum operating junction
temperature
1)
2)
Note
Pulse width tP limited by Tj,max
ISD ≤ ID, VDS peak ≤ V(BR)DSS
 Thermal Characteristics
Parameter
Symbol
Value
Unit
Thermal resistance, junction-case max
Rthjc
2.6
℃/W
Thermal resistance, junction-ambient max
Rthja
62.5
℃/W
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
 Static Characteristics (Tc=25℃ unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Drain – Source
Breakdown voltage
V(BR)DSS
600
-
-
V
VGS = 0V, ID=0.25mA
VGS(th)
2
3
4
V
VDS = VGS, ID=0.25mA
Zero Gate Voltage
Drain Current
IDSS
-
-
1
μA
VDS = 600V, VGS = 0V
Gate Leakage Current
IGSS
-
-
100
nA
VGS = ±30V,
RDS(ON)
-
0.68
0.75
Ω
VGS = 10V, ID = 2.0A
Gate Threshold Voltage
Drain-Source On
State Resistance
Test Condition
VDS =0V
 Dynamic Characteristics (Tc=25℃ unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Input Capacitance
Ciss
-
575
-
Output Capacitance
Coss
-
430
-
Reverse Transfer Capacitance
Crss
-
20
-
Effective Output Capacitance
Energy Related (3)
Co(er)
-
16
-
Turn On Delay Time
td(on)
-
11
-
tr
-
31
-
Unit
pF
Rise Time
Turn Off Delay Time
td(off)
-
37
-
tf
-
23
-
Total Gate Charge
Qg
-
15
-
Gate – Source Charge
Qgs
-
4.5
-
Gate – Drain Charge
Qgd
-
6
-
Gate Resistance
RG
-
4.5
-
Fall Time
Test Condition
VDS = 25V, VGS = 0V,
f = 1.0MHz
VDS = 0V to 480V,
VGS = 0V,f = 1.0MHz
ns
VGS = 10V, RG = 25Ω,
VDS = 300V, ID = 5.7A
nC
VGS = 10V, VDS = 480V,
ID = 5.7A
Ω
VGS = 0V, f = 1.0MHz
3) Co(er) is a capacitance that gives the same stored energy as COSS while VDS is rising from 0V to 80% V(BR)DSS
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
 Reverse Diode Characteristics (Tc=25℃ unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Continuous Diode Forward
Current
ISD
-
-
5.7
A
Diode Forward Voltage
VSD
-
-
1.4
V
Reverse Recovery Time
trr
-
255
-
ns
Reverse Recovery Charge
Qrr
-
1.7
-
μC
Reverse Recovery Current
Irrm
-
13.1
-
A
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Test Condition
ISD = 5.7 A, VGS = 0 V
ISD = 5.7 A
di/dt = 100 A/μs
VDD = 100 V
MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
Aug. 2013 Revision 1.0
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
Aug. 2013 Revision 1.0
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
Aug. 2013 Revision 1.0
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
 Test Circuit
Same type as DUT
VGS
Qg
100KΩ
10V
10V
+
Qgs
VDS
Qgd
1mA
DUT
10V
Charge
Fig15-2. Gate charge waveform
Fig15-1. Gate charge measurement circuit
trr
DUT
IFM
IF
0.5 IRM
+
V
- DS
IS
tb
0.25 IRM
di/dt
L
Rg
10KΩ
ta
0.75 IRM
IRM
+
Same type as DUT
VDD
VR
Vgs ± 15V
VRM(REC)
Fig16-1. Diode reverse recovery test circuit
Fig16-1. Diode reverse recovery test waveform
ID
DUT
VDS
VDS
Rg
25Ω
90%
RL
Vgs
10%
tp
+
VDD
VGS
-
Td(on)
tr
Td(off)
ton
Fig17-1. Switching time test circuit for resistive load
tf
toff
Fig17-2. Switching time waveform
IAS
DUT
VDS
BVDSS
tp
Rg
L
Vgs
tAV
IAS
VDD
tp
VDS(t)
+
VDD
Rds(on) * IAS
Fig18-1. Unclamped inductive load test circuit
Aug. 2013 Revision 1.0
Fig18-2. Unclamped inductive waveform
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
 Physical Dimensions
3 Leads, TO-220
Dimensions are in millimeters unless otherwise specified
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MagnaChip Semiconductor Ltd.
MMP60R750P Datasheet
DISCLAIMER:
The Products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power
generation, medical appliances, and devices or systems in which malfunction of any Product can reasonably be
expected to result in a personal injury. Seller’s customers using or selling Seller’s products for use in such
applications do so at their own risk and agree to fully defend and indemnify Seller.
MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consider responsibility
for use of any circuitry other than circuitry entirely included in a MagnaChip product.
is a registered trademark of MagnaChip
Semiconductor Ltd.
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MagnaChip Semiconductor Ltd.