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Chemical Engineering Tools for Semiconductor Fabrication David Cohen, PhD AIChE Norcal Symposium April 12, 2005 1 Integrated Circuit Courtesy of Integrated Circuit Engineering (ICE) Novellus Confidential DGC-4/05 2 Moore’s Law Number of Transistors per Integrated Circuit Courtesy of Intel Novellus Confidential DGC-4/05 3 Feature Size Evolution Novellus Confidential DGC-4/05 4 Chemical Unit Operations METALS DIELECTRICS PASSIVATION INTERCONNECT VECTOR INOVA xT SEQUEL SABRE xT IMD VIA ILD/PMD CONTACT SPEED BARRIER/ARL ALTUS STI FEATURE SIZE Novellus Confidential DGC-4/05 5 Example of Chemical Process - Electroplating Electrofill Cu+2(aq) + 2e- = Cu0 (solid) Cathode (Wafer) CuSO4 Electrolyte Cu Anode Cu0 (solid) = Cu+2(aq) + 2e- Novellus Sabre Novellus Confidential DGC-4/05 6 Example of Chemical Process - CVD RF Power PECVD Shower Head SiH4, NH3 and N2 RF Plasma SiN Heater Block Optional RF Bias Novellus Vector Novellus Confidential DGC-4/05 7 Plasmas Today Plasmas have played vital role in: Physical Vapor Deposition PECVD Plasma Enhanced Chemical Vapor Deposition (right) Etching Cleaning Passivation Plasma sources of UV radiation for lithography Novellus Confidential DGC-4/05 8 Future Limitations of Plasmas Extreme selectivity required for advanced applications. • Need to produce desired plasma chemical reactions and prevent undesirable ones. • The ability to tailor the energy distributions of plasma particles is key to this selectivity. As feature sizes get smaller, plasma energy requirements get larger. Need to enhance models to fully couple reactor scale to feature scale. Novellus Confidential DGC-4/05 9 Atomic Layer Deposition Surface controlled, layer by layer deposition method ALD Group, Univ of Colorado Novellus Confidential DGC-4/05 10 Quantum Chemistry Modeling Predict surface reactions to understand ALD Challenge coupling reactor scale flow behavior with surface chemistry Ability to model is limited by computational power because of extreme complexity of film growth chemistry Collin Mui, Novellus Systems Novellus Confidential DGC-4/05 11 Moving to Low-k As features become smaller, reduced capacitance is necessary to increase IC clock speed Reduction in dielectric constant (k) SiO2 is primary insulator – k=4.0 Need to get down to k<2.0 Material Dielectric Deposition Constant Method FSG (Fluorinated Silicate Glass) Polyimides DLC (Diamond-Like Carbon) SOG (Spin-On Glass) 3.4-3.8 3.0-3.5 2.8-3.0 2.7-3.1 CVD Spin-on CVD Spin-on Siloxanes Poly(arylene ethers) Fluorinated Polyimides C-doped Oxide 2.7-2.9 2.6-2.9 2.5-3.3 2.5-2.9 Spin-on Spin-on Spin-on CVD PTFE Nanoporous Silica Nanoporous Organic ? 2.0 ? 2.0 ? 2.0 Spin-on Spin-on Spin-on Mesoporous Silica Silica Xerogels Silica Aerogels 1.9-2.2 1.5-2.2 1.1-2.2 Supercritical CO2 Spin-on Spin-on Air Gap 1.0 TBD Novellus Confidential DGC-4/05 12 Challenges of Low-k Porosity increases with decreasing dielectric constant (k) 9 Mechanical Strength (CMP, bonding, packaging) Pore Size • killer pore (< 10% CD) • need for CVD barrier • CVD barrier increases effective k Dielectric Constant Thermal Conductivity 8 SiO2 7 SiN 6 5 4 3 2 1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Porosity Novellus Confidential DGC-4/05 13 Chemical Mechanical Planarization Removes surface textures and allows multiple interconnect layers to be used Removes excess material Novellus Xceda Courtesy of Alpsitec Novellus Confidential DGC-4/05 14 CMP Challenges Pressure of CMP Pad results in dishing of soft materials or damage of low-k films Need to provide better polishing control • Chemistry of CMP slurries will drive more uniform polish • Chemical polish can replace mechanical force Uniformity prediction relies on development of model that takes into account pad motion, fluidstructure interaction, and removal rate Novellus Confidential DGC-4/05 15 Electroplating Modeling Need to include: • • • • • turbulent/rotating flow mass transfer electrical current flow terminal effect (electrical current flow in the seed layer) Chemistry – not well understood Novellus Confidential DGC-4/05 16 Use of Electroplating Models Larry Gochberg, Novellus Systems Model can be used to test various additive chemistries for Cu electroplating Novellus Confidential DGC-4/05 17 Effluent Management On-site abatement necessary to minimize environmental impact of IC manufacturing Gas phase emissions • Hazardous Air Pollutants (HAPs) • Volatile Organic Compounds (VOCs) • Ozone Depleting Substances (ODSs) • Perfluorinated Compounds (PFCs) Liquid phase emissions • Suspended solids • Phosphates, Nitrates • Organics • Transition Metals • pH, Temperature, etc. Novellus Confidential DGC-4/05 18 Summary There are a number of chemical unit operations involved in IC manufacture. Feature size has evolved to below 100 nm. New technologies will be required to keep reducing IC feature size. Modeling enhancements are needed to better understand plasma, electroplating, CMP, ALD. Advances in semiconductor manufacture need to include emission control and energy reduction. Novellus Confidential DGC-4/05 19