Download IC design of low power, wide tuning range VCO in 90 nm CMOS

Vol. 35, No. 12
Journal of Semiconductors
December 2014
IC design of low power, wide tuning range VCO in 90 nm CMOS technology
Li Zhu(李竹)1; 2 , Wang Zhigong(王志功)1; Ž , Li Zhiqun(李智群)1 , Li Qin(李芹)1 ,
and Liu Faen(刘法恩)1
1 Institute
2 Nanjing
of RF- & OE-ICs, Southeast University, Nanjing 210096, China
University of Science and Technology, Nanjing 210094, China
Abstract: A low power VCO with a wide tuning range and low phase noise has been designed and realized in
a standard 90 nm CMOS technology. A newly proposed current-reuse cross-connected pair is utilized as a negative conductance generator to compensate the energy loss of the resonator. The supply current is reduced by half
compared to that of the conventional LC-VCO. An improved inversion-mode MOSFET (IMOS) varactor is introduced to extend the capacitance tuning range from 32.8% to 66%. A detailed analysis of the proposed varactor is
provided. The VCO achieves a tuning range of 27–32.5 GHz, exhibiting a frequency tuning range (FTR) of 18.4%
and a phase noise of –101.38 dBc/Hz at 1 MHz offset from a 30 GHz carrier, and shows an excellent FOM of –185
dBc/Hz. With the voltage supply of 1.5 V, the core circuit of VCO draws only 2.1 mA DC current.
Key words: CMOS; microwave; millimeter wave; IMOS varactor; phase noise; voltage controlled oscillators
DOI: 10.1088/1674-4926/35/12/125013
EEACC: 2570
1. Introduction
Recently, there has been growing interest in high frequency wireless communication systems promoted by the
ever increasing bandwidth requirement from the emerging low
power smart devices. An increased demand for multi-band and
multi-standard radio-frequency (RF) systems requires a voltage controlled oscillator (VCO) operating over a wider frequency range. The continued down-scaling of silicon technology presents numerous challenges for the design of wide tuning
range VCOs, especially in the microwave and millimeter wave
bandŒ1 .
In a communication system, the VCO is generally used in a
PLL (phase-locked loop) or a frequency synthesizer and therefore plays an important role. In this paper, a new VCO topology, which replaces one of the NMOSs of a conventional allNMOS differential LC-VCO with a PMOS, is presented. The
design guidelines and implementation of the new VCO are reported. In comparison with the conventional IMOS varactor,
a new wide tuning range varactor using a MOS with resistors
and a capacitor is also proposed. In order to achieve a better
phase noise performance, a switched capacitor in parallel with
the varactor is used to divide the tuning range into four subbands, such that a wide tuning range can be realized with a
smaller KVCO for each sub-bandŒ2 .
2. Design theory
However, in the design of an oscillator, transistor parasitic capacitances of the NMOS pair and the PMOS pair reduce the
achievable tuning range and operation frequency, especially
in the millimeter wave band. Meanwhile, the second-harmonic
terms at the common-source nodes of N- and P-MOS pairs degrade the performance of phase noise. An all-NMOS VCO is
shown in Fig. 1(b) and an NMOS transistor is presented with
an LC filter as a current source. Because the noise around the
frequency 2Nf0 can affect the VCO’s phase noise significantly
through the up-conversion, the LC filter is optimized to oscillate at 2f0 to eliminate the influence of this kind of noise. However, this topology can not meet the demand of the wide tuning
range of this project, since the LC tank is inherently a narrow
band filter.
Considered the wide tuning range and the high frequency
utilization, the schematic diagram of the newly proposed
current-reuse differential LC-VCO is shown in Fig. 1(c).The
new LC-VCO replaces one of the NMOSs of a conventional
all-NMOS differential LC-VCO (shown in Fig. 1(b)) with a
PMOS. The new VCO uses both NMOS and PMOS transistors
in the cross-connected pair as a negative conductance generator
to compensate the losses in the LC tanks.
Figure 2 shows the proposed cross-connected pair and
the small-signal equivalent circuits of the new topology. The
pMOS transistor is about 2.5 times larger than the nMOS transistor to achieve the same transconductance. The negative conductance of the new LC-VCO can be derived as follows.
2.1. Circuit topology
Figure 1(a) shows an LC-tuned oscillator using complementary crossed coupled transistor pairs. The advantage of this
kind of topology is the reuse of the bias current to make it possible to reach twice the transconductance for a given bias current.
VGSP D
RIN D
VGSN ;
IIN D
GMN VGSN ;
VIN
VGSN VGSP
D
D
IIN
IIN
2
:
GMN
(1)
(2)
* Project supported by the National Basic Research Program of China (No. 2010CB327404), the National High Technology Research and
Development Program of China (No. 2011AA10305), and the National Natural Science Foundation of China (No. 60901012).
† Corresponding author. Email: [email protected]
Received 19 May 2014, revised manuscript received 14 June 2014
© 2014 Chinese Institute of Electronics
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Li Zhu et al.
Fig. 1. Schematic diagrams of LC-tuned oscillator. (a) Using complementary crossed coupled transistor pairs. (b) All NMOS VCO. (c) The
proposed current-reuse differential LC-VCO.
Fig. 2. (a) The proposed cross-connected pair. (b) Small-signal equivalent circuits of (a).
Fig. 3. A schematic diagram of the VCO.
The advantages of the new VCO topology are the following.
(1) The series stacking of N- and P-MOSs allows the
power dissipation to be reduced by half compared to that of
the conventional LC-VCO while providing the same negative
conductance, and the utilization of the PMOS transistor in the
cross-connected pair can help to obtain a lower phase noise
than all-NMOS VCOs, owing to 1/f noise and the hot carrier
effect of PMOS transistors being much less than that of NMOS
transistors.
(2) Compared with the conventional differential VCO
where the transistors switch alternately, this VCO does not
have a common-source node because the transistors switch on
and off at the same time. Therefore, the proposed VCO is inherently immune to the phase noise degradation caused by secondharmonic terms at the common-source node.
(3) The proposed VCO can offer a wide tuning range because the DC levels of the two outputs are approximately half
of the supply voltage.
A schematic diagram of the cross-connected differential
VCO of this work is shown in Fig. 3. Resistor Rs , in series
with NMOS MN, is used to control the DC current as well as
the peak dynamic current of the proposed VCO. When Rs D
0, the oscillator can operate in a voltage-supply-limited mode
and lead to voltage-waveform distortion. Therefore, by properly selecting the resistor, the proposed VCO can operate in
a current-limited mode, rather than the voltage-limited mode.
Figure 4 shows the output voltage of the proposed VCO when it
operates in the voltage-limited mode (Rs D 0) and the currentlimited mode (Rs ¤ 0). The output voltage shows that, in the
current-limited mode, the voltage swing represents well balanced behavior during the two half periods.
The LC tank in Fig. 3 consists of (1) a single-loop differential spiral copper inductor that is estimated to be 210 pH with a
quality factor about 25 at 30 GHz, simulated by EM simulator
HFSSŒ3 , (2) the newly proposed improved IMOS varactors,
which have a tuning range of 66% (the outputs are buffered
using source-followers for measurement purposes), and (3)
switched MIM (metal–insulator–metal) capacitors, which are
used to widen the frequency tuning range. When the switching transistors are off, the parasitics of the transistors could degrade the switched capacitor. The switched components have
to be carefully designed and laid out to maintain better performance, and the details are given in the following subsections.
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Li Zhu et al.
Fig. 4. Differential output voltage. (a) Voltage-limited mode (Rs D 0). (b) Current-limited mode (Rs ¤ 0).
Fig. 5. (a) Conventional inversion-mode MOSFET (IMOS) varactor.
(b) The proposed varactor.
3. Design of the passives
3.1. Newly proposed varactor
The frequency tuning in the integrated LC-VCO is accomplished using a variable capacitance. A wide tuning capacitance is an important parameter for a varactor in a broadband
system. In this application, the millimeter-wave VCO using the
newly proposed IMOS varactorŒ4 had a wide frequency tuning
range because the large external resistors reduce the minimum
capacitance in the depletion mode of the varactor and the additional external parallel capacitor improve the maximum capacitance in the inversion mode.
Figure 5 presents schematic diagrams of a conventional
IMOS varactor and the proposed varactor. The proposed varactor consists of a MOS in which the source and drain are connected to each other through a large resistor Res , the body is
grounded through another large resistor Reb , and the gate and
source are connected through an external capacitor Cegs . Resistors of 2.2 k are used for this configuration. An equivalent
model for the proposed varactor is shown in Fig. 6. The MOS
used for varactors has a width (W / of 2 m, a length (L/ of
100 nm, and 20 fingers. The capacitance of Cegs is 73 fF.
In the depletion mode of the proposed varactor, shown in
Fig. 6(a), the minimum capacitance (Cmin / is reduced by Reb
and Res because the gate to bulk parasitic capacitance (Cgb /
is isolated by Rb in series with Reb , and the overlap capacitance (Cgso / between the gate and source is removed by Res .
The external capacitor, Cegs , has no effect on Cmin due to this
large resistance, Res . Therefore, the minimum capacitance of
the proposed varactor is lower than that of a conventional var-
Fig. 6. Simplified equivalent model for the proposed varactor (a) in
depletion mode and (b) in inversion mode.
actor.
On the other hand, Cegs improves the maximum capacitance (Cmax / of the proposed varactor in inversion mode. In this
mode, the effects of Reb and Res are neglected because Reb is
in series with a large bulk resistance Rb , and Res is in parallel
with a short circuit when the channel is generated as the dashed
line shown in Fig. 6(b).
The two-port S parameters were simulated with the drain
node (S, D) and the gate node as the ports. From the two-port
S parameters, the admittance looking from the drain was calculated from Eq. (3), while the equivalent capacitance was calculated as in Eq. (4):
125013-3
Y D Y0
1 S11
;
1 C S11
(3)
Ceq D
Im.Y /
:
2f
(4)
The extracted capacitance of the conventional and pro-
J. Semicond. 2014, 35(12)
Li Zhu et al.
Fig. 9. An improved switched tuning circuit for a differential oscillator.
where , Cox , w, and l are the mobility, gate oxide capacitance
per area, width, and length of the transistor. The quality factor
of the resulting series RC link is equal to
Fig. 7. The capacitance of the conventional and proposed varactors.
QD
Fig. 8. VCO with switched fixed MIM capacitors.
posed varactors is shown in Fig. 7. The tuning rangeŒ5 is calculated with
Capacitance tuning range D ˙
1 Cmax Cmin
:
2 Cmax C Cmin
2
(5)
The proposed varactor achieves a tuning range of 66%
from 33.8 to 165.9 fF, whereas the conventional varactor has
a tuning range of 32.8% from 45.9 to 92.8 fF. The total capacitance range of the proposed varactor is improved by 33.2%
compared to the conventional varactors.
Figure 7 shows that the capacitance slope is greater between the tuning voltage values of 0.8 and 1.0 V; the external
noise will degrade the phase noise easily. In order to suppress
the effects of external noise, two 5 pF on-chip bypass capacitors are connected in parallel with the voltage control port.
3.2. Switched capacitor
A wider VCO frequency band can be tuned by combination of MOS varactors and switched fixed MIM capacitors, as
shown in Fig. 8.
The switch is implemented by an NMOS transistor. The
switch has two states, ON and OFF. When the transistor is in
the ON state (S D 1), it can be replaced by a resistor equal to
RON and the metal capacitance CMIM loads the tank. Using a
simple transistor model, the ON resistance can be calculated as
RON D
1
.w= l/Cox .VDD
Vth /
;
(6)
1
2fRON CMIM
:
(7)
The Q value may be improved by increasing the transistor
width, w. When the transistor is turned OFF (S D 0), ideally,
the capacitance is floating, and does not load the tank. In reality, the transistor is instead dominated by the parasitic capacitance Cp , which is usually much small than CMIM . Cp includes
gate–drain overlap capacitance Cgd and drain–bulk capacitance
Cdb , and Cp D Cgd C Cdb . All these parasitic capacitances are
proportional to the width of the transistor. A wider MOS switch
has a lower RON and a higher quality factor, at the expense of
a reduced capacitance ratio. Again, a trade-off between capacitance ratio and quality factor exists.
The use of two identical tuning circuits enables switched
tuning of a differential oscillator, as shown in Fig. 7. The major drawback of this topology is that when a branch is turned
ON it will contain two RON in series with the CMIM . This limits the achievable quality factor. An improved switched tuning
circuitŒ6 for a differential oscillator is shown in Fig. 9. The
function of the inverter and the resistors here is that the transistor can obtain maximum gate to source (and drain) voltage
to make sure it is in the on state at all times. In the off state,
the large resistor is used to fix the drain (and source) voltage to
VDD and then reduce and obtain better control of the parasitic
capacitance due to the reverse biased drain–substrate junction.
3.3. Inductor
As the operating frequency increases to the mm-wave
band, the inductance required for the LC tank decreases in
proportion. Therefore, a small differential symmetric singleloop (octagon) inductor can provide enough inductance for this
design. The use of a smaller inductor allows larger varactors
(hence better tuning) and has lower substrate capacitance due
to smaller area. At the same time, the single-turn structure eliminates inter-winding parasitic capacitance and hence improves
the self-resonance frequency. Because Q is mainly limited by
resistance losses, a method to improve the quality factor is to
shunt the top two metal levels together in parallel for lower series resistance. However, as the frequency rises, the series resistance rises with frequency due to the skin effect, following
the dependence of the skin depth: ı D (2/!)1=2 , where and
are the conductor resistivity and permeability, respectively.
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Li Zhu et al.
Fig. 11. Layout of VCO.
Fig. 10. The simulated characteristics of the inductor.
Since the skin depth of copper at 30 GHz is 0.38 m, the inductor was realized only in the top-level metal, which is nearly
10 times thicker than the skin depth. For this reason, the top
metal always carries most of the current and thus the benefit of
shunting the metal lines is reduced. In this design, a single-loop
octagon inductor used in the VCO has a diameter of 40 m. The
inductor is constructed by the top layer of 3.4 m thick copper
in a standard CMOS process. Electromagnetic (EM) simulator
HFSS was used for simulation. The simulated characteristics
of L and Q are shown in Figs. 10(a) and (b).
Fig. 12. Frequency versus tuning voltage of VCO.
4. Measured results
The LC-VCO was fabricated in a TSMC 90 nm CMOS
process. Figure 11 shows a photograph of the chip, which occupies an area of 530 460 m2 including output buffer and
all test pads.
Figure 12 shows the oscillation frequency of the VCO;
according to the measured results, a tuning range of approximately 18.4%, from 27 to 32.5 GHz, is achieved.
The frequency spectrum and phase noise of the VCO’s
single-end output, measured by an Agilent E4448A spectrum
analyzer, are shown in Figs. 13 and 14.
The figure of merit (FOM) is defined as
FOM D L.foffset /
20 lg
f0
foffset
C 10 lg
P
;
1 mW
(8)
where L.foffset / is the measured phase noise at the frequency
Fig. 13. The spectrum of the 30 GHz output signal.
offset from the carrier at f0 and P is the measured dc power
dissipation in mW. The FOM, calculated using the measurement at 1.5 V with the phase noise at 1 MHz offset from the
30 GHz carrier, is –185 dBc/Hz.
125013-5
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Li Zhu et al.
nm CMOS technology. The VCO using the improved IMOS
varactors in parallel with the switched capacitor provided a
wide tuning range of 18.4% from 27 to 32.5 GHz. The power
consumption was only 3.1 mW, and the phase noise was –
101.38 dBc/Hz at a 1 MHz offset frequency at 30 GHz and
showed an excellent FOM of –185 dBc/Hz.
References
Fig. 14. Phase noise of the VCO.
Table 1. Comparison of the performances for the currently published
VCOs.
Parameter
Ref. [7]
Ref. [8]
Ref. [9]
This
work
Process
0.13 m 0.18 m 0.13 m 90 nm
CMOS
CMOS
CMOS
CMOS
VDD (V)
1.2
1.8
1.2
1.5
Freq. (GHz)
23–29
23.5
21.2
27–32.5
ftune (GHz)
6
4.7
2.8
5.5
Power (mW)
43
15
4.8
3.1
PN (dBc/Hz)
92:6
100
105:7
101
@ 1 MHz
FOM (dB)
164:7
176
185:4
185
5. Conclusion
In this paper, we have designed and measured a newly proposed cross-connected VCO working up to 32.5 GHz in a 90
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