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Development and Characterization of Nanoscale FDSOI MOSFET devices based on Quantum Well structure, for Optical Communication between Chips and Internal Blocks, Dr. Avi Karsenty Background The long term ongoing scaling of CMOS technology is moving the clock speed of future generations ULSI to the ten GHz frequencies and above. In such frequencies, the signal propagation delay on chip and on the circuit board, as well as signal cross talk, impose severe limitations on system design and performance. The direct solution to this problem is to move to optical signal transmission in the critical paths. Unfortunately the indirect energy band structure of silicon prevents the construction of simple and efficient light emitting devices as in the III-V materials such as GaAs. In recent years there is an ongoing wide research effort to find processes and mechanisms of light emission in silicon in spite of the basic physical limitations. The most promising directions are based on quantum effects in nanoscale silicon structures. The need The merging of the microelectronics with the communication in general and with optical communication in particular, pushes vigorously the efforts to realize on the same silicon chips both electronic and electro-optic functions. This is further motivated by the limitations of the metal wiring on chip and on the PC board, to transfer the electronic signals in the 10GHz range and above. The indirect band structure of silicon is a basic obstacle to the realization of light emitting devices in this material. Existing methods The efforts for the development of light emitting devices in silicon concentrated in the last decades on quantum structures which indeed exhibit some photoluminescence in the visible range with efficiencies approaching that of Gallium Arsenide. However there is currently no practical light emitting silicon device because of lack of efficiency, reproducibility and reliability. In particular most of these devices are not compatible with CMOS technology. As the QW MOSFET processing is compatible with standard CMOS technology, and SOI CMOS on SOI wafers is a commercial process, the expected light emission at preferred wavelengths in correlation with the silicon thickness in the transistor, may lead to the development of modified SOI CMOS technology that will include both standard CMOS transistors for the performance of the electronic functions, and Quantum Well Transistor devices for optical communication. Research Outlines SOI MOSFET Nano-Scale Body (NSB) Devices and Ultra-Thin Body (UTB) Devices' study. Modeling of Series Resistance, Electron Mobility, Mobility Degradation, Gate-to-Channel Capacitance and Conductance, Parameter Extraction. Study of Quantum Well structures' influence on SOI MOSFET Devices. Extensive and complementary characterization of the devices such as: Structural and Process (FIB, HRTEM, SEM), Optical (Interferometry, Ellipsometry, Spectrophotometry), Electrical (I-V, C-V). Publications and Lectures at International Conferences of Nanotechnology.