Download TGV: Tester Generic and Versatile for radiation effects on advanced

TGV: Tester Generic and Versatile for radiation
effects on advanced VLSI circuits
M. Solinas Jr.†‡ , A. Coelho† , J. A. Fraire†‡ , N. E. Zergainoh† and R. Velazco†
† Univ.
Grenoble Alpes, CNRS, Grenoble INP∗ , TIMA, F-38000 Grenoble, France
Nacional de Córdoba - CONICET, Córdoba Argentina
‡ Universidad
RAM
Memory
Operating System
Hardware Interfacing
Local
Bus
Dual ARM Cortex-A9
AXI Interface (master)
Programmable
Logic
Address Bus
32 bits
(base: 0x44A00000)
ZYNQ
Campaign
controller
program and
input data
Data Bus
32 bits de
write/read
AXI Interface (AXI_Slave)
IP Adapter
... 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
Inputs
... 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
slv_reg7
... 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
slv_reg8
... 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
slv_reg9
... 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
I/O
I/O
FMC-LPC
Connector
{
...
DUT's Interface
slv_reg1
Addres
Performing radiation ground testing in particle accelerators
is a mandatory step to qualify a circuit for space applications.
To control and observe the operation of the Device Under Test
(DUT) during its exposure to the particle beam, additional adhoc hardware and software developments are required.
The purpose of this work is to describe a new generic and
versatile tester that can accommodate different DUTs with
a minimal re-engineering effort. TGV (Tester Generic and
Versatile)1 is an evolution of the Test Thesic+ presented in
[1] now based on a Xilinx Zynq-7000 SoCs. The commercial
availability of this board combined with an active development
community, makes TGV an appealing testing platform for the
functional validation and test of digital circuits under radiation
environments.
Software Applications
Control Signals Data
I. I NTRODUCTION
UART
or
Processing
Ethernet System
Interface
Slave
registers
Abstract—The purpose of this work is to describe TGV (Tester
Generic and Versatile), a novel tester for radiation effects experiments based on a commercial development board ZEDBOARD.
DUT
PCB's daughter board
Anti SEL
slv_reg10
clock
Fig. 1. Block diagram of the TGV architecture
II. TGV OVERVIEW
The main idea behind TGV is to interface with a DUT
contained in a daughter-board exposed to radiation. An IP
adapter implemented in the Programmable Logic portion of
the Zed-board allows to remotely access the daughter-board
via a FMC cable. Thus, the mother-board can safely remain
outside the radiation beam during the experiment. A Dual
ARM CortexTM -A9 processor embedded in the same Zynq
chip is then used to control and operate the DUT using the
IP adapter. Therefore, changing the DUT does not require a
complete refactoring of the tester, but only an adapter update
(programmable logic) as well as the required hardware wiring
in the corresponding daughter-board.
Figure 1 illustrates the high-level architecture of TGV. An
Advanced Extensible Interface (AXI) interface is implemented
to communicate the ARM processor with the IP adapter (AXI
slave) embedded in the same motherboard. As a result, the
processing system can transparently control and operate the
DUT during the radiation campaign. This is achieved by
reading and writing a series of 32-bit registers in the AXI
slave which in turn configures the input and provide access to
the output values of the DUT.
1 This project is issued from exchanges during FACTOMETRICS STICAMSUD project.
∗ Institute of Engineering Univ. Grenoble Alpes
The Dual ARM CortexTM -A9 processor is then able to
execute the radiation campaign procedures required for the
DUT. These procedures can be conveniently designed and
debugged in the Software Development Kit (SDK) provided
by Xilinx. In general, a campaign imply an initialization of
the DUT and a permanent polling the output values which are
then compared with a golden output. When the comparison
evidences an output error, it is registered/reported and the DUT
is re-initialized. Also, to report the progress and status of the
experiment, the processor makes use of standard interfaces like
UART or Ethernet to communicate it with the user.
Last but not least, a dedicated circuit monitors the current
consumption of the DUT in order to protect it against destructive faults. Among these, SEL (Single Event Latch-ups) are
known to occur during radiation ground testing experiments
and can provoke short-circuits in the electronics. To this end,
a programmable watchdog allows detecting abnormal current
peaks to reset the device and restore an stable operation.
Evidently, these events are also registered and reported via
the AXI interface to the campaign controller.
R EFERENCES
[1] F Faure, P Peronnard, R Velazco, and R Ecoffet. Thesic+: A flexible
system for see testing. In Proc. of RADECS, 2002.