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Background Statement for SEMI Draft Document 4214A NEW STANDARD: SPECIFICATION FOR MICROFLUIDIC INTERFACES TO ELECTRONIC DEVICE PACKAGES Note: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this document. Note: Recipients of this document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided. This is a re-ballot of 4214 where references to wire bonding have been removed to avoid any concerns with existing intellectual property. A new figure 5 was added to include spacers and general editing has been performed. This document creates a standard fluidic interfacing system to integrated circuits that incorporate fluidics. Manufacturers of microfluidics have customized components and interfaces. Customized interfaces lead to increased cost, incompatible architectures, and long development times. Standard fluidic interfaces can reduce redundant engineering and re-engineering. This document defines an open industry-standard for fluidic interfaces with electronic devices. The specification describes the connection attributes and specifies the interface dimensions required to design and build devices and systems that are compliant with this standard. The goal is to enable devices from different vendors to interconnect via an open architecture. The specification is intended as an enhanced capability to state-of-the-art electronic device technologies incorporating a combination of electronics and fluidics. It is intended to provide device users adequate room for product versatility and market differentiation without the burden of carrying obsolete interfaces, losing compatibility, and choice. The standard is primarily targeted toward die manufacturers, design engineers, packaging engineers, chemical engineers, packaging equipment suppliers, peripheral developers and system OEMs. This specification can be used for developing new products and associated hardware If you need technical assistance, or have questions, please contact Mark Crockett at 408-563-1256 or email at [email protected]. For procedural issues, please contact Susan Turner at 408-943-7019 or e-mail at [email protected] Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT SEMI Draft Document 4214A NEW STANDARD: SPECIFICATION FOR MICROFLUIDIC INTERFACES TO ELECTRONIC DEVICE PACKAGES 1 Purpose 1.1 This document defines an industry-standard for fluidic interfaces with electronic devices. The specification describes the connection attributes and specifies the interface dimensions required to design and build devices and systems that are compliant with this standard. The goal is to enable devices from different vendors to interconnect via an open architecture. The specification is intended as an enhanced capability to state-of-the-art electronic device technologies incorporating a combination of electronics and fluidics. It is intended to provide device users adequate room for product versatility and market differentiation without the burden of carrying obsolete interfaces, losing compatibility, and choice. 2 Scope 2.1 The specification is primarily targeted toward die manufacturers, design engineers, packaging engineers, chemical engineers, packaging equipment suppliers, peripheral developers and system OEMs. This specification can be used for developing new products and associated hardware. NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the responsibility of the users of this standard to establish appropriate safety and health practices and determine the applicability of regulatory or other limitations prior to use. 3 Limitations 3.1 This specification does not address material-to-fluid compatibility, material-mechanical limitations, nor electromagnetic / fluid interactions. 4 Referenced Standards and Documents 4.1 SEMI Standards SEMI PR9-0705— Guide for Design and Materials for Interfacing Microfluidic Systems 4.2 JEDEC Standards JEDEC MO-187 — Solid State Product Outline; Plastic, Low/Thin/Very Thin Shrink Small Outline Package 0.65 and 0.50 Pitch, Issue E, Dec 2004 4.3 ANSI / SBS Standards ANSI/SBS 4-2004 — ANSI / Society for Biomolecular Screening; Well Positions for Microplates NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions. 5 Terminology 5.1 Abbreviations and Acronyms 5.1.1 IC — Integrated Circuit 5.1.2 EFIC — Electrofluidic Integrated Circuit 5.2 Definitions 5.2.1 Electrofluidic Integrated Circuit (EFIC) — the integration of semiconductor electronics and microfluidics on a common substrate. 5.2.2 Fluidic Routing Card- a fluidic manifold used to interconnect the fluid flow between any multiple of EFIC’s. 6 Architecture/System Considerations for A MEMS Fluidics System NOTE 1: The purpose of this document was initiated as a general reminder for MEMS Fluidic Interface designers that MEMS fluidics devices by themselves mostly provide certain localized functions. In order to fully explore the potential of MEMS fluidics devices some added functions and user-friendly interfaces to the outside world are required. These external functional providers could be well designed connected to or incorporated into the MEMS Fluidics interfaces. However in order not to provide these external functions as after thoughts, it is important to design them as an integrated parts of the whole MEMS Fluidics system at the beginning of the design, be at the system or subsystem architecture level. For convenience we will use the This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 1 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT terminology of MEMS Fluidics System to include MEMS Fluidics sub-systems. In order not to restrict creativity, it is not necessary to fix the actual architecture but to establish a set of guidelines that most of the practitioners in this field would agree. The following is set of such proposals: 6.1 Definition: a MEMS fluidics system consists of an integration of one or more MEMS fluidics components and related components to provide a new or replace an existing function with performance, cost, intelligence and footprints advantages. 6.2 A MEMS fluidics system should be easily adoptable to and interface to its environment with minimum requirements for existing environment modification. 6.3 A MEMS fluidics system is preferred to be “intelligent” such that its output requires minimum data or information processing to be real time and cost effective. Software for data and information processing necessary to provided meaningful real time output to save time and effort could be either loaded into the system IC chip or imbedded in the device as firmware. Only system with useful intelligence is worthy of replacement and/or adoptive consideration. 6.4 A MEMS fluidics system may consists the following components 6.4.1 A MEMS fluidics component which could be just a chamber or a more complex MEMS Fluidics device 6.4.2 Fluidics interface to Micro and/or Macro interfaces preferably a smooth transition to present standard fluidics connectors/tubing 6.4.3 Mechanical interface for positioning and equipment integration 6.4.4 Electrical interface for power supply (if required) and signal input and out put 6.4.5 Optical interface for optoelectric and /or opto-bio interaction or measurements. This may require minimum one side of the fluidics chamber to be optically transparent. 6.4.6 Software for data and information processing necessary to provide meaningful real time output to save time and effort could be either loaded into the system IC chip or imbedded in the device as firmware. Only system with useful intelligence is worthy of replacement and/or adoptive consideration. 6.5 A representative integrated MEMS fluidics system architecture is shown in Figures 1-3 below, where the fluidics I/O interfaces are on both top ends, electrical/electronic interface at the bottom, and the middle portion space could be a convenient optical interface. The integration of all the components requires engineering design of material compatibility, reliable connections, and compactness of spacing. Of course the fluidics dynamics in various physical regions should be considered/simulated to provide necessary functions in the first place. 6.6 If the system is a throw away type bio-medical devices, the disposal of the system and its environment impact should be considered during the design stage 6.7 From the cost point of view the final test and the testing procedures of the system should be designed at the beginning of the design cycle to assure high yield, i.e., low cost and easy to obtain reliability assurance data of the MEMS fluidics system. 7 Requirements NOTE 2: Refer to layout for typical package shown below. The package outline is taken from JEDEC MO-187 (a variation of an SOP surface mount 8-pin electronic device) typical package. An open cavity has been added with an array of 8 x 8 fluidic ports. Compliance to the EFIC, micro to micro adapter, fluidic routing card, and macro adapter, design constraint requirements provides compatibility with this standard for parts A, B, C, and D. All dimensions are mean values where tolerances are dependent upon material selection and application requirements. 7.1 Part A - EFIC fluidic I/O Design constraints: 7.1.1 Fluidic interconnects shall not to be closer than 0.075 mm to electrical bond pads. 7.1.2 Port diameters shall be uniform and consisting of either 25, 50, 100, 200, or 400 microns with a pitch to port size ratio of 2. 7.1.3 Rectangular array sizes shall consist of 2x ports. 7.1.4 Segregation of electronics and fluidics (not in mutual contact except where fluid sensing or flow control is required). 7.1.4.1 Fluidic distribution shall be at the top and flush with top of device package. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 2 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Figure 1 An example of an open cavity JEDEC MO-187 package containing an EFIC. Port dimensions are 0.100 mm diameter, a pitch of 0.200 mm, and a 2 6 = 8 x 8 array. 7.2 Part B - In-package (micro-to-micro) fluidic adapter design constraints: 7.2.1 In-package (micro-to-micro) fluidic adapters shall be used to interface a fluidic die to the same height as the package top surface. 7.2.2 The in-package fluidic adapter shall be the same port size and pitch as the EFIC. 7.2.3 The in-package fluidic adapter shall contain the same number of ports and pitch on both its top and bottom surfaces. 7.3 Part C - Fluidic routing card constraints: 7.3.1 A fluidic interface (or fluidic routing card) adapter shall be used to connect fluid I/O to the EFIC. 7.3.2 EFIC interface port diameters on the fluidic routing card shall be uniform and consisting of either 25, 50, 100, 200, or 400 microns with a pitch to port size ratio of 2. 7.3.3 On the fluidic routing card, rectangular array sizes shall consist of 2x ports. 7.3.4 On the fluidic routing card, the fluidic routing card shall terminate to a mini-fluidic adapter. 7.3.5 On the fluidic routing card, the mini-fluidic adapter port diameters shall be uniform and consisting of 1 mm diameter ports. 7.3.6 On the fluidic routing card, the mini-fluidic adapter port pitch shall be 2.25 mm x 2.25 mm. 7.3.7 On the fluidic routing card, there shall be an equal number of EFIC ports and mini-fluidic adapter ports. 7.3.8 One side of the fluidic routing card shall be 25 mm in length where the other shall be any multiple of 25 mm. 7.4 Part D - Mini-fluidic adapter constraints : 7.4.1 The mini–fluidic adapter port diameters shall be uniform and consisting of 1 mm diameter ports. 7.4.2 The mini-fluidic adapter port pitch shall be 2.25 mm x 2.25 mm. 7.4.3 One side of the mini-fluidic adapter shall be 25 mm in length. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 3 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Figure 2 Top: In-package (micro to micro) fluidic adapter and EFIC package. Figure 3 In-package fluidic adapter shown in normal place to create ports that are flush with top surface of the EFIC package. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 4 Doc. 4214A SEMI Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Figure 4 An example of multiple electrofluidic integrated circuit (EFIC) devices attached between an electrical printed circuit board and a fluidic andapter (fluidic routing card) above the devices. Figure 5 The same EFIC device as shown in Figure 2 in an assembly layout with mini to mini-fluidic adapters at top. The bottom layer (layer 1) is a printed circuit board with 2 EFIC’s. Layers 2-10 are the fluidic routing card, and the two blocks at the top are mini fluidic adapters. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 5 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Figure 6 The in-package micro-micro adapters are shown with seals. Spacers, also shown, may be used to control the amount of loading imparted to the seals. 7.5 Fluidic Routing Card Dimensions 7.5.1 The following figures contain the dimensions for a standard fluidic interface for connecting electrofluidic integrated circuits to larger fluidic devices. Layer 1 7x 0.200 25.00 0.250 7x 0.200 64x 0.100 A 25.00 DETAIL SCALE 20/1 A 11.80 8.80 Figure 7 Layer 1 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 6 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 2 16x R 0.050 48x 0.100 8x 0.100 4x 5.53 4x 4.87 25.00 7x 0.200 4x 6.15 16x 7x 0.200 DETAIL A R 0.50 25.00 A SCALE 20/1 4x 6.6 11.80 7x 2.25 4.62 2x 1.00 0.25 8.80 Figure 8 Layer 2 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 7 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 3 7x 0.200 48x 0.100 DETAIL 7x 0.200 25.00 0.25 A SCALE 20/1 A 11.80 4.62 2x 1.00 9.00 Figure 9 Layer 3 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 8 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 4 5x 0.200 16x R 0.050 0.200 7x 32x 0.100 4x 6.83 14x 16x 4x 5.61 0.100 16x 1.00 R 0.50 4x 8.36 4x 0.200 4x 0.400 0.800 4x DETAIL A 10.21 A SCALE 20/1 25.00 7x 2.25 4.62 2x 1.00 2x 3.25 9.00 25.00 0.25 Figure 10 Layer 4 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 9 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 5 7x 0.200 3x 0.200 32x 32x 1.00 0.100 25.00 DETAIL A A SCALE 20/1 25.00 7x 2.25 4.62 2x 1.00 2.25 2x 0.25 9.20 Figure 11 Layer 5 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 10 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 6 16x 0.100 R 0.050 16x 0.200 2x 0.100 14x 25.00 1.00 2x 7.00 8x R 0.50 16x 2x 0.800 0.200 3x 0.200 0.400 11.45 2x 0.800 DETAIL A SCALE 20/1 A 25.00 16.83 2x 7x 2.25 4.62 1.00 2.25 2.25 2x 8.32 9.200 0.25 Figure 12 Layer 6 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 11 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 7 16x 0.200 0.100 25.00 24x 1.00 0.200 7x DETAIL A SCALE 20/1 A 25.00 7x 2.25 4.62 1.00 0.250 2.25 2.25 9.40 Figure 13 Layer 7 for fluidic routing Card This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 12 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 8 25.00 R 0.050 18.56 2x 20.1 2x 0.100 0.825 A DETAIL A SCALE 20/1 25.00 0.200 0.400 0.800 B 2.25 2.875 39.50 2x 4.62 1.00 2.25 4.925 19.36 2x 0.25 2.25 2.25 DETAIL SCALE 10/1 B 9.40 Figure 14 Layer 8 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 13 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT Layer 9 25.00 32x 1.00 0.25 25.00 7x 2.25 4.62 1.00 3x 2.25 Figure 15 Layer 9 for fluidic routing card. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 14 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017 Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 Leadframe Leadframe Die attach pad Die attach pad Fluidic Routing Card Mold compound n Sequence A ncludes integrated nnel + sacrificial ated dice get mounted to pad cal interconnection encapsulation cial Material removal Mold compound Mold compound Fabrication Sequence A Fabrication Sequence A 1) Wafer includes integrated 1) Wafer includes integrated fluidic channel + sacrificial fluidic channel + sacrificial Micro – Fluidic material material Connectors2) Singulated dice get mounted to 2) Singulated dice get mounted to die attach pad die attach pad 3) Electrical interconnection 3) Electrical interconnection 4) Plastic encapsulation 4) Plastic encapsulation 5) Sacrificial Material removal 5) Sacrificial Material removal Micro – Fluidic Connectors Die attach pad Mold compound Entire Entire Stack Stack Fabrication Sequence A 1) Wafer includes integrated fluidic channel + sacrificial material 2) Singulated dice get mounted to die attach pad 3) Electrical interconnection Entire Die Entire Integrated 4) Plastic encapsulation Stack Stack fluidic 5) Sacrificial Material removal channel Die Die Fabrication Sequence B Fabrication Sequence C Fabrication Sequence B Fabrication Sequence 1) Wafer includes integrated 1) Wafer includes only C bare 1) Wafer includes integrated 1) Wafer includes only bare fluidic channel + Vertical Microsensor + sacrificial material fluidic channel + Vertical Microsensor + sacrificial material micro fluidic adapter 2) Singulated dice get mou micro fluidic adapter 2) 2) Singulated dice get mounted to dieSingulated attach pad dice get mou 2) Singulated dice get mounted to die attach padinterconnectio die attach pad 3) Electrical die attach padinterconnection 3) Electrical interconnectio 3) Electrical 4) Plastic Die Integrated 3) interconnection Vertical4) Plastic encapsulation Vertical encapsulation 4) Electrical Plastic encapsulation 5) Sacrificial material remo fluidic micro- 5) Sacrificial material remo micro-4) Plastic encapsulation channel micro micro fluidic fluidic Fabrication D Fabrication Sequence C Sequence adapter adapter Fabrication Sequence D 1) Wafer includes only bare 1) Wafer includes only bare 1) Wafer includes only bare sensor sensor + sacrificial material sensor 2) Singulated dicetoget mounted to 2) Singulated dice get mounted 2) Singulated attach pad dice get mounted to die attach pad die die attach padmaterial added 3) Sacrificial 3) Electrical interconnection 3) Sacrificial material added 4) Electrical interconnection 4) Plastic encapsulation 4) Electrical interconnection 5) Plastic encapsulation 5) Sacrificial material removal 5) encapsulation 6) Plastic Sacrificial material removal 6) Sacrificial material removal n Sequence B ncludes integrated nnel + Vertical Microic adapter ted dice get mounted to pad al interconnection encapsulation Fabrication FabricationSequence SequenceBC 1)1)Wafer Waferincludes includesintegrated only bare fluidic channel + Vertical Microsensor + sacrificial material micro fluidic adapter 2) Singulated dice get mounted to 2)dieSingulated attach paddice get mounted to die padinterconnection 3) attach Electrical 3)4) Electrical interconnection Plastic encapsulation 4)5) Plastic encapsulation Sacrificial material removal n Sequence D ncludes only bare Fabrication Sequence D 1) Wafer includes only bare Figure 16 sensor An example for a manufacturing process sequence for an EFIC. 2) Singulated dice get mounted to die attach pad 3) Sacrificial material added 4) Electrical interconnection 5) Plastic encapsulation 6) Sacrificial material removal ated dice get mounted to pad cial material added cal interconnection encapsulation cial material removal Micro – Fluidic Micro – Fluidic Connectors Connectors Fluidic Routing Card Leadframe LETTER (YELLOW) BALLOT 8 Assembly of the Fluidic Device Fluidic Routing Card 8.1 The assembly of the EFIC device may take the form of any of the 4 sequences below. This diagram is an Fluidic Routing Card example of an EFIC sequence. Applications will vary from this example. This particular implementation has 4 fluidic micro ports. me pad DRAFT Document Number: 4214A Date: 4/29/2017 This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 15 Doc. 4214A SEMI Semiconductor Equipment and Materials International 3081 Zanker Road San Jose, CA 95134-2127 Phone:408.943.6900 Fax: 408.943.7943 DRAFT 8.2 A functional description of the parts. Figure 17 Functional description of assembled parts. 9 Test Methods 9.1 Test per relevant SEMI standards or as required by the manufacturer. 10 Certification 10.1 This standard may be referenced when either paragraphs 7.1, 7.2, 7.3, or 7.4 are in full compliance and stating the relevant section(s) that apply. Partial compliance to an individual line item in one of these sections does not meet compliance to this standard. 11 Product Labeling 11.1 Label per manufacturer’s requirements. 12 Packing and Package Labeling 12.1 Package per relevant standards. NOTICE: SEMI makes no warranties or representations as to the suitability of the standards set forth herein for any particular application. The determination of the suitability of the standard is solely the responsibility of the user. Users are cautioned to refer to manufacturer's instructions, product labels, product data sheets, and other relevant literature, respecting any materials or equipment mentioned herein. These standards are subject to change without notice. By publication of this standard, Semiconductor Equipment and Materials International (SEMI) takes no position respecting the validity of any patent rights or copyrights asserted in connection with any items mentioned in this standard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, and the risk of infringement of such rights are entirely their own responsibility. This is a draft document of the SEMI International Standards program. No material on this page is to be construed as an offi cial or adopted standard. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited. Page 16 Doc. 4214A SEMI LETTER (YELLOW) BALLOT Document Number: 4214A Date: 4/29/2017