Download CMOD Tutorial - LeTourneau University

CMOD XC2C64A
CoolRunner-II CPLD
Starter’s Tutorial
Prepared by
Rusty Goldsmith
Supervisor
Joel Koblich
for
LeTourneau University
Spring 2009
CMOD Starter’s Tutorial
Table of Contents
Chapter 1: Introduction to the CMOD and ISE
2
Chapter 2: Protecting Your CMOD
3
Chapter 3: Create a New Project in ISE 10.1
5
Chapter 4: Create a Schematic Source Code File
7
Chapter 5: Create a VHDL Source Code File
11
Chapter 6: Create a Verilog Source Code File
13
Chapter 7: Implement Design and Pin Assignments 15
Chapter 8: Onto the Breadboard
18
Chapter 9: Programming the CMOD
19
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CMOD Starter’s Tutorial
Chapter 1: Introduction to the CMOD and ISE
The CMOD is the Digilent CPLD board used in this tutorial. It has a
Xilinx CPLD, a programming port, and the power circuit all on a 40-pin DIP
package. The CMOD was chosen because it is easy to handle on small
projects, and it is much cheaper for students since it is not a full prototyping
board.
You can buy a CMOD to use on your project at www.Digilentinc.com
for about $18 plus shipping and taxes. You will also need header pins and a
JTAG cable for programming the CMOD. The JTAG cable is also available
through Digilent, and the header pins can be bought online from electronics
suppliers like DigiKey or Mouser, or you can see your awesome lab
technician. Documentation for the CMOD board can be found at the Digilent
site, and additional documentation on the XC2C64A CoolRunner-II CPLD
can be found at the xilinx site.
If you need the Xilinx software for your own personal computer you
can download the student edition for free at www.xilinx.com. You will want
to install Xilinx ISE 10.1 from the webpack. Otherwise, some of the
computers in the resource room have the Xilinx software installed.
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CMOD Starter’s Tutorial
Chapter 2: Protecting Your CMOD
To keep from damaging your CMOD, you will need to keep a few
things in mind
 The CMOD is static sensitive, so avoid touching the pins or any
other metal parts on the board.
 The CMOD needs to be supplied 3.3V.
o Pin 20 is Vcc
o Pin 21 is GND
 Do not overload I/O pins. Look on the Coolrunner II-CPLDs
datasheet for I/O ratings.
Here is an example to help calculate the output current:
Say you need to find a resistor values that will drive an LED without
pulling too much current from the output pin. The LED used in this project
has a 1.8V drop and needs 5-20mA. Let’s say we want the LED to shine
brightly, so we choose the maximum current, 20mA. Look at the chart from
the XC2C64A Coolrunner-II CPLD datasheet (below) to find the output
voltage at that current rating. Based on the graph, you can assume the CPLD
output high level will be about 3V at 20mA.
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CMOD Starter’s Tutorial
The Xilinx data sheet chart below, which complements the graph, assumes a
3.3 V source and simply shows the expected high and low level output
voltages at two different load currents: 8 mA and 0.1 mA. To estimate VOH
and VOL at other load currents, the graph must be used.
With a 1.8V drop across the LED, that leaves 1.2V across the resistor.
Using circuit analysis, you can find the value of the resistor based on the
following circuit:
With 1.2V across the resistor and 20mA flowing through it, Ohm’s
Law gives us 60 ohms. Remember, this is only a rough estimate, but it
should get you close enough to keep from damaging your CMOD. Also,
you may choose a larger resistor and the LED should still be visible.
For additional information, refer to the Xilinx CPLD I/O User's Guide:
http://www.xilinx.com/support/documentation/user_guides/ug445.pdf
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CMOD Starter’s Tutorial
Chapter 3: Create a New Project in ISE 10.1
To create a new Project:
1) Open ISE 10.1 from the Desktop or Start Menu.
2) From the top left corner select File > New Project
 This should open the New Project Wizard.
3) In the Project name field type tutorial.
4) Enter or browse for a directory path. A subdirectory for tutorial is
created automatically.
5) Be sure that HDL is selected for the Top-level source type.
6) Click NEXT to view the Device Properties page.
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CMOD Starter’s Tutorial
7) Fill in the Device Properties table as shown below:
8) Click NEXT and then New Source to select the source type.
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CMOD Starter’s Tutorial
Chapter 4: Create a Schematic Source Code File
To demonstrate that the CMOD can take an input and send an output
signal in response, you will be making a simple circuit for a pushbutton
input and an LED output. To do this, you will be using a single AND gate to
control your input and output.
1) The first tutorial will be done in schematic, so select schematic on
the left side as shown. Type in SchematicTutorial as your File
name.
2) Click Next, Finish, Next, and Next.
3) Finally, click Finish on the Project Summary page to create a new
Project with a Schematic Source.
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CMOD Starter’s Tutorial
At this point you should see the following:
4) You may want to zoom in a little, so click the Zoom In button a
few times to get a good view of the drawing space.
Now, look for the Sources box on the left hand side of the screen. In
this box you can find all of the components the Xilinx software has to make
your life easier. You may want to make this box larger.
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CMOD Starter’s Tutorial
5) In the Categories menu, scroll down
and select Logic.
6) In the Symbols menu, scroll down
until you find and2.
7) With those selected, you now have an
AND gate that follows your mouse
around the screen. Just place one in
the middle of the drawing space.
Press Esc to deselect the AND gate.
8) By connecting one pin to Vcc, you
can tie the other terminal of the AND
gate to create a switch. Find the vcc
symbol under the general category
and place it next to the AND gate.
9) Connect vcc to one of the input
terminals of the AND gate by adding
a wire between the two. Add Wire
can be found on the Schematic Editor
Toolbar.
10) With Add Wire selected, click on the terminal of vcc and either
terminal of the and2 gate. Hit Esc to deselect the wire tool.
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CMOD Starter’s Tutorial
11) For I/O, you will find Add IO Marker on the Schematic Editor
Toolbar; select that.
12) Select Add an output marker
from the Processes sidebar. Now
click on the output terminal of the
and2 gate to add an IO marker for
output.
13) To add an input marker, select
Add an input marker from the
Processes ta and click on the
remaining input terminal of the
and2 gate. Hit Esc to deselect.
14) You may want to name your
inputs and outputs. To name input
ands outputs, double click the input
or output object you want to name and type in a name.
(Don’t label the object ‘output’ or ‘input’; however, you may label it
‘output1’ or ‘input1’ or any other convenient name like ‘LED’.)
15)
You should now have something similar to the following:
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CMOD Starter’s Tutorial
Chapter 5: Create a VHDL Source Code File
If you wish to use the CMOD with a VHDL source, you may create a
different source from the Schematic Source shown in the previous chapter.
The following steps explain how to add a New Source to the active project.
1) Be sure the current project is selected in the Sources tab of the
Sources sidebar.
2) From the Processes tab of the Processes sidebar, double click Add
New Source.
3) In the New Source Wizard, select VHDL Module and give the
source a file name.
4) Click Next.
5) In the Define Module window, give names for each of your inputs
and outputs and label their with the Direction dropdown menus.
6) Click Next and Finish.
The New Source Wizard creates a template VHDL file with the ports
already predefined. Be sure to check that the ports are the right direction
before continuing on.
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CMOD Starter’s Tutorial
Here is a VHDL example code that has the same function as the
Example Project in chapter 4:
VHDL Example Code
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity TestVHDL is
Port ( Input1 : in STD_LOGIC;
Output1 : out STD_LOGIC);
end TestVHDL;
architecture Behavioral of TestVHDL is
begin
Output1 <= Input1 and '1';
end Behavioral;
Additional VHDL Help
When using VHDL, remember that the code does not act like your
normal coding languages that you have learned up to this point. When
VHDL code executes it does not execute in a top to bottom sequence;
instead, all lines of the code will execute at the same time unless it’s in a
process of loop. I suggest looking at the following links to help your
understanding. Look at the first link to get a better understanding of VHDL,
and then move on to the second link which has more example code.
The Designer’s Guide to VHDL by Doulos
http://www.doulos.com/knowhow/vhdl_designers_guide/
VHDL Tutorial: Learn by Example by Weijun Zhang
http://esd.cs.ucr.edu/labs/tutorial/
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CMOD Starter’s Tutorial
Chapter 6: Create a Verilog Source Code File
If you wish to use the CMOD with a Verilog source, you may create a
different source from the Schematic Source shown in the previous chapter.
The following steps explain how to add a New Source to the active project.
1) Be sure the current project is selected in the Sources tab of the
Sources sidebar.
2) From the Processes tab of the Processes sidebar, double click Add
New Source.
3) In the New Source Wizard, select Verilog Module and give the
source a file name.
4) Click Next.
5) In the Define Module window, give names for each of your inputs
and outputs and label their with the Direction dropdown menus.
6) Click Next and Finish.
The New Source Wizard creates a template Verilog file with the ports
already predefined. Be sure to check that the ports are the right direction
before continuing on.
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CMOD Starter’s Tutorial
Here is a Verilog example code that has the same function as the
Example Project in chapter 4:
Verilog Example Code
`timescale 1ns / 1ps
module TestVerilog(
input input1,
output output1
);
assign output1 = input1 & 1;
endmodule
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CMOD Starter’s Tutorial
Chapter 7: Implement Design and Pin Assignments
When ISE generates a programming file, it assigns pins to the most
convenient locations for optimization. This may be convenient for the
computer, but it is very unfortunate since you’re not guaranteed the same
pins each time you reprogram your CMOD. However, with the floor plan
editor, you can control all the pin assignments. Be sure to Implement the
design before creating the floorplan or you may receive a parse error.
1) Be sure to save and then double-click Implement Design in the
Processes sidebar. Once it is finished implementing, Implement
Design will have a green checkmark next to it.
2) Expand User Constraints in the Processes sidebar.
3) Double click Floorplan IO – Pre-Synthesis. When asked if you
want Project Navigator to automatically create a UFC, click Yes.
4) If you receive a parse error message, just click OK.
5) Under New Constraints (UFC) File click Browse, choose your
.ufc file, and click Open.
6) Under Input Design File click Browse, choose your .ngd file, and
click Open.
7) Click OK.
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CMOD Starter’s Tutorial
8) You should see the following Package Pins view:
9) From the Design Object List window you can click and drag your
input and output pins onto the pin chart. To know what pin number
you are on, just hold you mouse over the pin.
To know how these pins correspond to the pins on the CMOD board,
you must look at the manual. The chart on the next page comes from the
manual. If you notice, the red column shows the pin number on the floorplan
editor for the XC2C64. The blue column is the pins on the physical CMOD
board. For example, look at the orange box and you can tell the pins 37/38
correspond to pins 27/28 on the physical board.
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CMOD Starter’s Tutorial
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CMOD Starter’s Tutorial
Chapter 8: Onto the Breadboard
Now that you have written you program and specified your pin
assignments you can move everything onto a breadboard. You will need to
set up the breadboard so that you can provide power to the CMOD since the
JTAG cable does not provide power to the chip. Remember that the chip is
static sensitive, so be careful. Just follow the circuit diagram below to wire
your breadboard:
On the breadboard, it should look similar to the following photograph:
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CMOD Starter’s Tutorial
Chapter 9: Programming the CMOD
To program the CMOD:
1) Attach the header pins and the JTAG cable. Make sure the CMOD
has power (JTAG cable will not supply power).
2) In the Processes tab, expand Implement Design and double click
Configure Target Device.
3) Click OK if an Impact warning pops up.
4) In the IMPACT menu, select Configure device using BoundaryScan (JTAG) and click Finish.
5)
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5) It will bring up the Assign New Configuration File menu, choose
the “.jed” file and click Open.
6) Click OK in the next menu.
7) In the processes sidebar, you should see all of the operations.
Double-click Program to program the CMOD. When its done, you
will see a blue box:
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