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Lecture #38 OUTLINE The MOSFET: • Bulk-charge theory • Body effect parameter • Channel length modulation parameter • PMOSFET I-V • Small-signal model Reading: Finish Chapter 17, 18.3.4 Spring 2007 EE130 Lecture 38, Slide 1 Problem with the “Square Law Theory” Qinv Coxe VG VT VS VC • Ignores variation in depletion width with distance y Spring 2007 EE130 Lecture 38, Slide 2 Modified (Bulk-Charge) Model VG VT • linear region: VD VDsat m W m I Dlin Coxe eff (VG VT VDS )VDS L 2 • saturation region: VD VDsat I Dsat where m 1 Spring 2007 VG VT m W Coxe eff (VG VT ) 2 2mL Cdm 3T 1 oxe Coxe WT EE130 Lecture 38, Slide 3 since Si 3 SiO2 MOSFET Threshold Voltage, VT The expression that was previously derived for VT is the gate voltage referenced to the body voltage that is required reach the threshold condition: VT VFB VSB 2F 2qN A Si (2F VSB ) Cox Usually, the terminal voltages for a MOSFET are all referenced to the source voltage. In this case, VT VFB 2F 2qN A Si (2F VSB ) and the equations for IDS are Cox W m Coxe eff (VGS VT VDS )VDS L 2 VDS VDSsat VGS VT / m I Dlin Spring 2007 EE130 Lecture 38, Slide 4 W Coxe eff (VGS VT ) 2 2mL VDSsat VGS VT / m I Dsat VDS The Body Effect Note that VT is a function of VSB: VT VFB 2F VFB 2F 2qN A Si (2F VSB ) Cox 2qN A Si (2F ) Cox 2qN A Si (2F ) Cox 2qN A Si VT 0 2F VSB 2F VT 0 g Cox where g is the body effect parameter 2qN A Si (2F VSB ) Cox 2F VSB 2F When the source-body pn junction is reverse-biased, |VT| is increased. Usually, we want to minimize g so that IDsat will be the same for all transistors in a circuit Spring 2007 EE130 Lecture 38, Slide 5 MOSFET VT Measurement • VT can be determined by plotting IDS vs. VGS, using a low value of VDS IDS VGS Spring 2007 EE130 Lecture 38, Slide 6 Channel Length Modulation Parameter, l • Recall that as VDS is increased above VDsat, the width DL of the depletion region between the pinch-off point and the drain increases, i.e. the inversion layer length decreases. 1 1 DL I Dsat 1 L DL L L DL VDS VDSsat DL l VDS VDSsat L I Dsat Spring 2007 W Coxe eff (VGS VT ) 2 1 l VDS VDSsat 2mL EE130 Lecture 38, Slide 7 P-Channel MOSFET • The PMOSFET turns on when VGS < VTp – Holes flow from SOURCE to DRAIN DRAIN is biased at a lower potential than the SOURCE VG VS • VDS < 0 VD GATE P+ IDS P+ N VB • IDS < 0 • |IDS| increases with • |VGS - VTp| • |VDS| (linear region) • In CMOS technology, the threshold voltages are usually symmetric: VTp = -VTn Spring 2007 EE130 Lecture 38, Slide 8 PMOSFET I-V • Linear region: 0 VDS I DS VGS VTp m W m Coxe p ,eff (VGS VTp VDS )VDS L 2 • Saturation region: VDS I DS I Dsat VGS VTp m W Coxe p ,eff (VGS VTp ) 2 2mL m = 1 + (3Toxe/WT) is the bulk-charge factor Spring 2007 EE130 Lecture 38, Slide 9 Small Signal Model id g d vd g m vg • Conductance parameters: gd I D VD V lI Dsat0 G const I D gm VG V Spring 2007 EE130 Lecture 38, Slide 10 D const Weff Coxe mL (VGS VT ) Inclusion of Additional Parasitics Spring 2007 EE130 Lecture 38, Slide 11 Cutoff Frequency • fmax is the frequency where the MOSFET is no longer amplifying the input signal – Obtained by considering the small-signal model with the output terminals short-circuited, and finding the frequency where |iout / iin| = 1 f max Weff gm 1 (VGS VT ) 2Coxe 2mL L Increased MOSFET operating frequencies are achieved by decreasing the channel length Spring 2007 EE130 Lecture 38, Slide 12