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A Comparative Study of FPGA and ASIC in the arena of
Electronics and Computer
Shruti*
[email protected]
Assistant Professor
BPSMV Khanpur kalan,Sonepat
Preeti Sharma**
Assistant Professor
BPSMV Khanpur kalan,Sonepat
[email protected]
Asha***
Assistant Professor
BPSMV Khanpur kalan,Sonepat
[email protected]
Abstract— In the field of electronics and computer
technology growing day by day to the height. This would not
have been possible without the basic arithmetic techniques,
experimental hardware realization and tool building efforts.
Only modules construction is not necessary. In the field of
VLSI the basic building blocks are modules. Modules can be
adder, multiplier, divider or an ALU which performs the
operation on the operands. To make adder, multiplier,
divider etc a designer requires a complete knowledge of
arithmetic techniques, but without FPGA it is not possible
to implement modules onto the system or a chip or onto
ASIC. ASIC is basically application specific integrated
circuit which is designed according to customer requirement
but only once while FPGA can be reconfigured infinite
number of times. Cost of ASIC is less if designed in bulk. So
firstly the design is checked and implemented onto FPGA
not on ASIC and then further dumped onto ASIC.
Keywords:- FPGA, ASIC, CLB, IOB
I
INTRODUCTION
In this paper we have discussed basic review of FPGA
and ASIC and their comparison. The role of FPGA and
ASIC in the field of VLSI is also discussed in this paper.
II
BASIC REVIEW OF FPGA
Field Programmable Gate Arrays are specialized chips
that are programmed to perform very specific functions in
hardware. An FPGA is basically a piece of programmable
logic. The first FPGA was invented in 1985. Rather than
executing a function in software, the same function can be
implemented in an FPGA and executed in hardware. One
can think of an FPGA as “soft-hardware”, since it can be
reprogrammed after manufacturing. It contain vast
amounts of programming logic and millions of gates but
there is some programming logic in an FPGA that is not
used for the “customer facing” or "mission specific"
application or function. In other words, not all the logic in
an FPGA is designed to be directly used by the application
the FPGA is providing for the customer. There are
additional gates needed to connect all the internal logic
that is needed to make it programmable; so an FPGA is
not fully optimized in terms of “customer facing” logic.
The advantage of an FPGA is its flexibility. Due to this it
has ability to rapidly implement or reprogram the logic in
an FPGA for a specific feature or capability that a
customer requires. FPGAs can also be used for developing
a “snapshot” version of a final ASIC design. In this way,
FPGAs can be re-programmed as needed until the final
specification is done. The ASIC can then be manufactured
based on the FPGA design. In simple words FPGA can be
used to implement any hardware design. The use of the
FPGA is the prototyping of a piece of hardware that will
further be implemented later into an ASIC. It have been
mostly used as the final product platforms. Their use
depends, on the desired performances, development, and
production costs.
Why FPGA???
Most of the typical logic circuit systems were
implemented within a small variety of Standard large
scale integrated (LSI) circuits: microprocessors, bus-I/O
controllers, System timers, and so on. FPGA circuits can
be implemented in a relatively short amount of time: no
physical layout process, no mask making, no IC
manufacturing, and short Time to Market. The basic
FPGA architecture consists of a two-dimensional array of
logic blocks and flip-flops for the user to configure the
function of each logic blocks, the inputs/outputs, and the
interconnection between blocks. Families of FPGAs differ
from each other by the physical means for implementing
user programmability, arrangement of interconnection
wires, and basic functionality of the logic blocks. Basic
Block diagram of FPGA is shown in Fig. 1
1
multipliers and a digital clock manager (DCM). It also
includes embedded Power-PC processors and full-duplex
high-speed serial transceivers.
Fig.1:-- Basic Block diagram of FPGA
To program FPGA some programming methods are
specified:a) SRAM based programming:-FPGA connections are achieved using pass-transistors,
transmission gates, or multiplexers that are controlled by
SRAM cells as shown in Fig 17 . This technology allows
fast in-circuit reconfiguration. The major disadvantages
are the size of the chip, required by the RAM technology,
and the needs of some external source to load the chip
configuration. The biggest advantage of FPGA is that it
can be programmed an unlimited number of times.
Fig. 2 :-- SRAM Basic cell and connections
b) Antifuse Technology:-An antifuse remains in a high-impedance state until it is
programmed into a low-impedance or “fused” state as
shown in Fig 18.. This technology can be used only once
on one-time programmable (OTP) devices; it is less
expensive than the RAM technology.
Fig. 3:-- Basic diagram of Antifuse
c) EPROM/EEPROM Technology:-This method is same as that used in EPROM/EEPROM
memories. The configuration is stored within the device,
without external memory. In-circuit reprogramming is not
possible.
A. FPGA internal Structure
All FPGAs contain the same basic resources as shown in
(Fig4), Configurable logic blocks (CLBs), containing
combinational logic and register resources. Input/output
blocks (IOBs), interface between the FPGA and the
outside world, Programmable interconnections (PIs),
RAM blocks. Other resources such as three-state buffers,
global clock buffers, boundary scan logic, and so on.
Some devices contain resources such as dedicated
Fig.4:-- Example of distribution of CLBs , IOBs , PIs,
RAM Blocks, and multipliers
Configurable Logic Blocks:-The basic building block of CLBs is the slice. It hold
two slices in one CLB. Each slice contains two 4-input
function generators (F/G), carry logic, and two storage
elements. Each function generator output drives both the
CLB output and the D-input of a flip-flop.
Look Up Tables:-Function generators are implemented as 4-input look-up
tables. Each LUT can be programmed as a (16)-bit
synchronous RAM. Furthermore, the two LUTs can be
combined within a slice to create a (16)-bit or (32)-bit
synchronous RAM, or a (16)-bit dual-port synchronous
RAM. The LUT can also provide a 16-bit shift register,
ideal for capturing high-speed data.
Storage Elements:-The storage elements in a slice can be configured either as
edge-triggered D-type flip-flops or as level-sensitive
latches. The D-inputs can be driven either by the function
generators within the slice or directly from the slice
inputs, bypassing the function generators. As well as
clock and clock enable signals, each slice has synchronous
set and reset signals.
Input/Output Blocks (IOB’s):-The IOB includes inputs and outputs that support a wide
variety of I/O signaling standards. The IOB storage
elements act either as D-type flip-flops or as latches. For
each flip-flop, the set/reset (SR) signals can be
independently configured as synchronous set, reset,
asynchronous preset, or asynchronous clear. Pull-up and
pull-down resistors and an optional weak-keeper circuit
can be attached to each pad. IOBs are programmable.
B. FPGA Generic Design Flow
The successive process phases (blocks) of Fig5 are
described as follows:-a) Design Entry:Creation of design files using schematic editor or
hardware description language.
2
WHAT IS A CHIP?
Fig.5:-- FPGA Generic Design Flow
b) Design Synthesis:-A process that starts from a high level of logic abstraction
(typically Verilog or VHDL) and automatically creates a
lower level of logic abstraction using a library of
primitives.
c) Partition or Mapping:-A process assigning to each logic element a specific
physical element that actually implements the logic
function in a configurable device.
d) Placement of Blocks:-Firstly floorplanning of circuit is done then it is decided
that which module or block would placed where?? After
that practically placement of blocks is done after
simulation. In other words “Maps logic into specific
locations in the target FPGA chip”.
e) Routing:-Global routing and detailed routing is done by choosing
least delay path. In other words “Connections of the
Mapped Logic”.
f) Program Generation:-A bit-stream file is generated to program the device.
g) Device Programming:-before programming of FPGA simulation is done and
then practically download of the bit-stream to the FPGA.
h) Design Verification:-Simulation is used to check functionalities. The
simulation can be done at different levels. The functional
or behavioral simulation does not take into account
component or interconnection delays. The timing
simulation uses back-annotated delay information
extracted from the circuit. Other reports are generated to
verify other implementation results, such as maximum
frequency and delay and resource utilization. The
partition (or mapping), place, and route processes are
commonly referred to as design implementation.
III
Why IC development leaded to high-tech revolution?
Integrated in one chip circuit (IC) replaces large amount
of discrete components on the board. Almost all
traditional discrete elements like processors, digital
discrete logic, memories, analog blocks can be integrated
in one “piece of silicon” – chip.
Advantage of IC versus PCB design:Advantages of ICs comparing to discrete components:1) Area:- integrated circuits are much smaller- both
transistors and wires are shrunk to micrometers. Small
size leads to advantages in speed and power consumption,
since smaller components have much smaller parasitic
resistance, capacitance and inductance.
2) Timing:- Digital logic switching, analog effects and
communication between blocks in the chip can occur
hundreds of times faster than with the discrete
components on the PCB.
3) Power Consumption:- Logic operation within a chip
also take much less power and allow operating on very
low voltage supply .
4) Reliability:- The probability for failure and impact of
external environment are much less in integrated circuits
compared to discrete components.
Chip Structure:Basic chip components:Each chip structure contains two regions. One is core area
and the other one is Pads(I/O) area.
The picture shows the division of chip into these regions
Fig 6:- Block diagram of chip structure
Chip Architecture:1) Core area design:- It contain the following blocks:*Digital logic circuits
*Analog blocks(Voltage regulators, Oscillators, PLL)
* On chip Memory blocks (ROM, SRAM etc….)
All these blocks are placed in the core area. The
connection between these blocks is implemented using
metal wires. Voltage supply to these blocks is
implemented with power (VDD and VSS rings)
Each chip may have one or more power segments. For
example pads and core area have separate supply rings.
INTRODUCTION OF A CHIP
3
Digital logic
(Hard Macro)
Analog Blocks
(Hard Macro)
RAM
ROM
Digital Logic
(Random Logic)
Fig 7:- Detailed Block diagram of chip architecture
Main components- Digital Blocks:1) Digital Logic is implemented on silicon using CMOS
transistors and metal (wires) connection between these
basic components.
2) Standard logic libraries are used for implementation of
digital logic. These libraries include optimized
implementation of basic elements like logic gates (NOR,
NAND, NOT etc…), flip flops etc...
3) Sometimes when a digital block has a very special
requirement it is implemented as a hard macro. This
approach can improve the characteristics of this block,
but has negative impact on chip placement.
Main components- Analog Blocks:Analog and mixed signal blocks are always designed in
transistor level. So all these blocks are integrated as hard
macros. Blocks which are implemented in silicon are:1) Voltage regulator – used for voltage supply of internal
logic and pads from external power supply. The most
popular regulator implemented on silicon is 0.18u
process.
2) Power on reset (POR) and voltage detectors:- used to
generate system reset for on chip logic during power up
and when external supply is going down and cant provide
sufficient voltage level for internal logic.
3) On chip oscillators and PLL:- used to create clock for
the on chip logic and systems. Wide range of clock
frequencies for the system clock can be generated.
4) Digital to Analog and Analog to digital converter:Provides interface between the on chip digital logic and
the on chip or the external analog blocks. Wide range of
application, like audio (MP3) and video, require
implementation of these blocks on silicon.
IV
INTRODUCTION OF ASIC
What is ASIC???
Application Specific Integrated Circuits are specialized
chips that perform specific functions, and which also
operate at very high performance levels. As technology
has improved over the years, the maximum complexity
(and hence functionality) possible in an ASIC has grown
from 5,000 gates to over 100 million. ASICs are often
used for very dense applications; for example, where port
density on high-end IP core routers is a critical
requirement. ASICs have a higher R&D cost to design
and implement, as compared to an FPGA. However, once
an ASIC is fabricated, it is not reprogrammable like an
FPGA is. The layout of the internal chip constructs are
fixed and cannot be modified without a “re-spin” of the
ASIC. This makes ASICs much less flexible than
FPGAs. ASICs are very dense chips, which typically
translates to high scalability with less real-estate
requirement on a line card. While ASICs typically have a
higher R&D cost to design, in high volume applications
the lower costs of manufacturing ASICs are attractive.
While ASICs have very high density in terms of logic
gates on the chip, the result of higher scalability in terms
of the same power metric can give ASICs a competitive
edge over an FPGA. One thing to note is that an ASIC is
designed to be fully optimized in terms of gates and logic.
All the internal structures are used for customer facing or
mission specific applications or functions. So, while an
ASIC may consume more power per unit die size than an
FPGA, this power is amortized over a higher density
solution; and hence, provides better power efficiency.
In simple words ASIC is a kind of integrated circuit that
is specially built for a specific application or purpose. It
can improve speed because it is specifically designed to
do one thing and it does this one thing well. It can also be
made smaller and use less electricity. The disadvantage of
this circuit is that it can be more expensive to design and
manufacture, particularly if only a few units are needed.
An ASIC can be found in almost any electronic device
and its uses can range from custom rendering of images
to sound conversion. Because ASICs are all custom-made
and thus only available to the company that designed
them, they are considered to be proprietary technology.
ASIC are used in a wide-range of applications, including
auto emission control, environmental monitoring, and
personal digital assistants (PDAs). An ASIC can be premanufactured for a special application or it can be custom
manufactured (typically using components from a
"building block" library of components) for a particular
customer application.
There are three different categories of ASICS:
 Full-Custom ASICS: These are custom-made
from scratch for a specific application. Their
ultimate purpose is decided by the designer. All
the photolithographic layers of this integrated
circuit are already fully defined, leaving no
space for modification during manufacturing.
Fig 8:- Block diagram of Full custom ASIC

Semi-Custom ASICs: These are partly
customized to perform different functions within
the field of their general area of application.
These ASICS are designed to allow some
4
modification during manufacturing, although the
masks for the diffused layers are already fully
defined.
Fig 12- PPGA package diagram view
VII
Fig 9:- Block diagram of Semi custom ASIC

Platform ASICs:- These are designed and
produced from a defined set of methodologies,
intellectual properties and a well-defined design
of silicon that shortens the design cycle and
minimizes development costs. Platform ASICs
are made from predefined platform slices, where
each slice is a premanufactured device, platform
logic or entire system. The use of
premanufactured materials reduces development
costs for these circuits.
Detailed chip design flow:Main stages of the ASIC design project:1) Marketing requirements specification (MRS)
2) Project Project initialization Stage
3) Specification stage
4) Logic design stage
5) FPGA implementation and validation stage
6) ASIC implementation stage
7) Tape out- transfer to production
Chip manufacturing:1) Mask generation
2) Silicon wafer preparation
3) Photolithography
4) Poly silicon layers creation
5) Metallization
6) Wafer post processing
7) Wafer test, sort and cut
8) Packaging
9) Final test+ silicon testing
Chip packaging:Different types of packages are:1) DIP :- Dual in line package
COMPARISON BETWEEN ASIC AND FPGA
FPGA vs. ASIC Design Advantages
FPGA Design
Advantage
Benefit
Faster time-to-market
No upfront non-recurring
expenses (NRE)
Simpler design cycle
More predictable project
cycle
Field reprogramability
ASIC Design
Advantage
No layout, masks or other
manufacturing steps are needed
Costs typically associated with an
ASIC design
Due to software that handles much
of the routing, placement, and
timing
Due to elimination of potential respins, wafer capacities, etc.
A new bitstream can be uploaded
remotely
Benefit
Full custom capability
For design since device is
manufactured to design specs
For very high volume designs
Since device is manufactured to
design specs
Lower unit costs
Smaller form factor
FPGA Detailed Design Flow
Functional Specification
HDL
Behavioral
Simulation
Synthesis
Place & Route
Static
Timing
Analysis
Download & Verify
in Circuit
ASIC Detailed Design Flow
Fig 10:- DIP package diagram view
2) PLCC:- Plastic leaded chip carrier
Fig 11:- DIP package diagram view
3) PPGA:- Plastic pin grid array
5
Functional Specification
HDL
DFT
Insertion
Behavioral
Simulation
Synthesis
Static
Timing
Analysis
Equivalency
Checking
Place & Route
Static
Timing
Analysis
Equivalency
Checking
Verification of
2nd and 3rd
order effects
Verify in Circuit
VIII
CONCLUSION
We have studied the different basic technologies by
which we dump a module onto a chip or a die. ASIC
designing is more popular than FPGA in some ways. The
costs of the modules dump onto ASIC are cheaper than
FPGA only when many of the units are required. FPGA
aare upcoming technology and used too much due to its
ability to reconfigure infinite number of times. In this
paper a comparative study is done between FPGA and
ASIC. This paper told us that where FPGA is better and
where ASIC are better, which are helpful in development
of a digital design. A VLSI designer always think about
area constraint first and then about power consumption
and Speed. A designer always think about simulation and
checking and verification of the circuit. Some tools are
used during FPGA implementation and ASIC realization.
Xilinx tools are one of them to implement any hardware
module onto the FPGA for the development of an
integrated circuit.
IX
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