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Technical
Article
How smart dimming technologies can help to optimise
visual impact and power consumption of new HDR TVs
David Gamperl
Resolution is the most obvious battleground on which rival TV and display manufacturers fight. Consumers have been willing to pay a premium for HD (High Definition) displays, and more recently for
4k displays. Eventually, ultra-high definition 8k displays are expected to supersede the current generation of high-end TVs.
But with the introduction of HDR (High Dynamic Range) displays, consumers are learning that contrast too has a strong impact on the viewing experience (see Figure 1). By providing a much greater
contrast between the brightest light colours and the deepest, darkest blacks, an HDR display offers
a richer, more exciting and more vivid viewing experience.
The development of new HDR displays, however, poses a power-system design problem for display
manufacturers to solve: the requirement for high contrast calls for a very high-brightness backlight,
able to reproduce extremely bright portions of an image faithfully. But the very high-current display
circuit must also be dimmed down to extremely low levels to render the dark portions of the image
correctly. At the same time, TV manufacturers must comply with stringent regulations and guidelines, such as the US Department of Energy’s ENERGY STAR® programme, which strictly limit the
average power consumption of a new TV.
Conventional PWM backlight dimming methods alone can achieve no better than a 1:1000 ratio between the highest and lowest current level. If implemented in a high-performance HDR display, a
power controller IC with digital PWM dimming alone will result in wasted power and impaired picture
quality. This is why a new approach to TV backlight power control is needed, to provide a wider
spread between peak and minimum brightness levels, as well as to provide for granular local control
of multiple segments of the display screen’s backlight.
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Fig. 1: according to AMD’s graphics processor division Radeon Technologies Group, HDR displays
should be able to render images with a dynamic range close to that of the human eye. (Image
credit: Radeon Technologies Group)
New peak illuminance requirement in HDR displays
Dolby, through its Dolby Vision™ initiative, was the first company to give the TV industry a high-profile demonstration of the way an HDR TV could perform. Its 2015 demonstration unit had a peak
display brightness of 4000 nits. For comparison, today’s HD or 4K TVs typically have a peak brightness of around 300 nits. The dramatic increase in peak illuminance both enables the TV to reproduce very bright images faithfully, and extends the contrast between bright and dark displayed images.
The very large contrast ratio is both the factor which makes an HDR display so pleasing to watch,
and which makes the power system design so difficult. This is because, in order to reproduce deep
blue, black and grey colours correctly, the backlight needs to be dimmed down to very low levels.
This means that if peak brightness is 4000 nits, and a conventional PWM controller can dim at best
to 0.1%, then the minimum display brightness is not low enough, and dark blacks will all be rendered as the same greyish colour.
In practice, manufacturers of today’s HDR displays are therefore specifying a peak brightness of
around 800-1000 nits, a compromise which provides for better rendering of very dark colours, but
which blunts the appeal of HDR displays by reducing the vividness of the brightest colours.
By relying on digital PWM control alone, there is no way out of this problem: a PWM-controlled
MOSFET has a certain minimum on-time, which is determined by its turn-off delay and fall time
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characteristics. The turn-off delay and fall time are basic properties of the power device’s silicon,
and these properties prevent PWM controllers from dimming to any less than 0.1% of peak output.
How local dimming helps improve display contrast performance
The way in which the display is backlit affects contrast, as well as the dimming arrangement. Most
TVs with LED backlights found in homes today are edge-lit, and implement global dimming. This
means that, if most of the image is bright, the backlight for the whole display is driven at or close to
full power, and if most of the image is dark, the backlight for the whole display is dimmed to a low
level. Global dimming is therefore unsuitable for HDR displays, particularly because it handles badly
the type of image shown in Figure 1, in which both bright and dark portions have to be displayed
simultaneously.
This means that HDR technology calls for direct backlighting with local dimming – a backlight architecture which requires more individual LEDs, more LED channels and a more complex LED driving
system. It is therefore more expensive. But by dividing the display’s backlighting system into segments – typically today between 16 and 256 in a direct-backlit 47” TV – the backlight brightness can
be precisely matched to the content of the image shown in the small square display area served by
each segment. Deep dark blues and bright whites can therefore be displayed simultaneously, with
no power wasted on the backlighting of dark portions of the image.
This local dimming approach calls for the LED driver to be synchronised to the video or graphics
processor (GPU). If the interface between the devices allows, the backlight driver may be directly
controlled by the GPU.
Frame 1
VSYNC
Frame 2
Segment 1 [ILED]
delay
Segment n [ILED]
Fig. 2: a synchronisation signal ensures that the backlight dimming signals are not out of phase with
the frame timing
Local dimming is a feature enabled by use of the AS3824 LED backlight controller from ams. Figure
2 shows how a vertical sychronisation signal (VSYNC – a patented feature of ams LED controllers)
may be used to mark the start of each new frame, providing a synchronisation input to a backlight
controller. The diagram shows that, in frame 1, a bright image calls for a very high PWM duty cycle
in segment 1, while segment n has a reduced PWM duty cycle because it is rendering a darker portion of the image. Then in frame 2, new video content means that the brightness of the segments
must change. Instructions for new PWM duty cycles in segment 1 and segment n are sent by the
GPU during frame 1, and the segments’ signals are refreshed with the rising edge of frame 2.
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Figure 2 shows a delay between the rising/falling edge of VSYNC and the rising edge of the PWM
signal. In the AS3824 controller, this delay is programmable: this enables the display manufacturer
to compensate for the turn-on delay of the LCD’s pixels, so that the LEDs start to draw current exactly at the same time as the pixels are turned on; this improves picture quality and minimises
power consumption. Delaying the PWM turn-on also reduces the load on the LEDs’ power supply,
enabling the system to generate less noise and interference.
Analogue dimming: a method for boosting peak brightness
So multi-channel LED controllers such as the AS3824 – which provides individual control of 16
channels – enable granular local dimming of segments of a display. Up to 32 AS3824 ICs may be
daisy-chained via their SPI interface to control displays with more than 16 segments (see Figure 3).
16x
MOSI
16x
SDI
Device #1
SCLK
xCS
SDO
AS3824
VSYNC
16x
SDI
Device #2
SCLK
xCS
SDO
AS3824
VSYNC
SDI
Device #N
SCLK
xCS
SDO
AS3824
VSYNC
Video/Graphic
Processor SCLK
xCS
MISO
VSYNC
Fig. 3: each daisy-chained AS3824 controller can control the LEDs in up to 16 display segments
But manufacturers of HDR displays still face the problem of the contrast ratio. How can they increase peak brightness above 1000 nits while retaining the ability to render very dark colours?
The answer is a patented innovation introduced in the AS3824 controller IC: an analogue method
for boosting the PWM-controlled current. This can boost the current controlled by the PWM signal
by up to a factor of eight over its base level, to illuminate properly the brightest segments of an image. At the same time, the darkest channel could have an analogue LED current of just 10% of its
base value, turned on for the minimum PWM duty cycle – potentially as little as 0.1%. In other
words, the dynamic range of the digital PWM part of the dimming scheme is unchanged, but the additional analogue scale extends the total (analogue + digital) dynamic range (see Figure 4).
The addition of analogue dimming is implemented through DACs integrated in the AS3824, which
provide a reference voltage output determined by a digital signal input from the display’s video processor or GPU. Amplified, this reference voltage controls the amplitude of the current supplied by
the FET that powers the channel’s LEDs. In effect, the application of analogue current control produces a power scheme based on simultaneous pulse width modulation and pulse amplitude modulation.
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Frame 1
VSYNC
Frame 2
Segment 1 [ILED]
delay
Segment n [ILED]
Fig. 4: the combination of digital and analogue dimming signals, as shown in segment 1/frame 1,
provides for a greater contrast ratio between the brightest and the darkest segments of the screen
The AS3824 may be used to drive FETs or BJTs with a high current rating. It is important to regulate any external switch-mode power supply so that its output voltage is matched to the voltage requirements of the LED strings connected to it. Voltage headroom above that required by the FETs
controlled by the AS3824 leads to power dissipation, reducing system efficiency.
To enable this, the DC-DC feedback function of the AS3824 works with any kind of DC-DC converter (boost or buck), as well as with other converter architectures such as LLC controllers, by
sinking the current across R1 to its feedback (FB) pins (see Figure 5). The timings of the feedback
function are fully programmable via SPI. In manual feedback mode, the output voltage of the SMPS
can be adjusted directly by the AS3824. In other words, the AS3824 is always in full control of the
output voltage of the SMPS, thus helping to minimise system power losses.
VLEDmin - VLEDmax
SMPS
1
Vsense
R1
16x
16x
16x
Vsense
R2
Device #2
Device #1
SDO
FB1
FB1
AS3824
SMPS
2
Device #N
FB2
FB2
AS3824
AS3824
Fig. 5: the feedback function in AS3824 controllers helps to optimise the regulation of the SMPS
output voltage
Sophisticated power control for better contrast ratios
Implementation of LED backlighting control with an AS3824 device, then, provides for granular,
multi-channel control of a direct backlit display screen, as well as an analogue + digital dimming
range many times wider than that of a typical LED backlight controller using digital-only PWM dimming.
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The result is a dramatically improved contrast ratio to allow the reproduction of the brightest white
colours in some segments of a display at the same time as rendering deep dark blues and greys in
other segments, providing a viewing experience dramatically better than that in today’s HD and 4k
TVs and displays.
The 16-channel AS3824 is the newest member of the AS382x family of LED backlight controllers,
and is intended for use in HDR displays. The other devices in the family are the 16-channel
AS3820, 12-channel AS3821, eight-channel AS3822 and six-channel AS3823.
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Summary
Resolution is the most obvious battleground on which rival TV and display manufacturers fight. But
with the introduction of HDR (High Dynamic Range) displays, consumers are learning that contrast
too has a strong impact on the viewing experience. By providing a much greater contrast between
the brightest light colours and the deepest, darkest blacks, an HDR display offers a richer, more exciting and more vivid viewing experience.
The development of new HDR displays, however, poses a power-system design problem for display
manufacturers to solve: the requirement for high contrast calls for a very high-brightness backlight,
able to reproduce extremely bright portions of an image faithfully. But the very high-current display
circuit must also be dimmed down to extremely low levels to render the dark portions of the image
correctly.
Conventional PWM backlight dimming methods alone can achieve no better than a 1:1000 ratio between the highest and lowest current level. If implemented in a high-performance HDR display, a
power controller IC with digital PWM dimming alone will result in wasted power and impaired picture
quality.
This article describes an innovative LED power controller technology from ams, which overlays analogue current control on top of the conventional PWM dimming signal, to provide for a hugely increased dimming scale compared to digital PWM-only control. This enables display manufacturers
to achieve much higher contrast ratios than today, for a vastly improved viewing experience.
Biography
David Gamperl has been a product manager in ams’s power management business line since
2014. He is responsible for LCD panel backlight drivers and other LED driver product families.
Before this, David was a staff application engineer at ams for eight years, providing design-in support to customers and developing reference and evaluation hardware for product lines such as
power management ICs, LED drivers, LCD panel backlight drivers and ambient light and colour
sensors.
For further information
ams AG
David Gamperl
Product Manager
Tel: +43 (0) 3136 500 31373
[email protected]
www.ams.com
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