Download Monolithic Power Systems_Solderability, Solder Joint, Whisker, SHRT Lead Integrity for all packages (see page 2 sample size used)

PRODUCT RELIABILITY REPORT
Solderability, Solder Joint, Whisker, SHRT & Lead Integrity for all packages
Reliability Department
Monolithic Power Systems
79 Great Oaks Boulevard
San Jose, CA 95119
Tel: 408-826-0600
Fax: 408-826-0601
1. Introduction
This report summarizes MPS Lead Free package/product reliability test data. All products
manufactured by MPS with Lead Free option include SOT-23, TSOT, MSOP, TSSOP,
SOIC, QFN, DIP etc.
2. Solderability Test
2.1 Purpose
This test is to assess the solderability of device package terminations that are intended to
be joined to another surface using Pb-Free solder for the attachment.
2.2 Test procedure
Standard: JESD22- B102
Step
Preconditioning
Flux Immersion
Condition
150 °C high temperature bake for 16
Hours ±30 min
Be immersed in the flux for 5-10 sec, be
drained 5-20 sec
Solder temperature: 245 ℃±5℃;
Solder Dip
Solder Immersion Time: 5±0.5sec;
Solder Immersion/ Emersion Rate: 1.00
± 0.25 in/s (25.4 ± 6.4 mm/s)
Comments
Solderability testing shall be completed
within 72 hours of removal from the high
temperature bake equipment.
Room Temp; Flux type: ROL1; For SMD,
the leads attitude should be 20 to 45
deg(one side at a time)
Pb-free solder should be used. Cool the
parts in the air after dip process. Remove
the residual flux from the terminations by
isopropyl alcohol.
Sample size: 5 units for each run
Acceptance criteria: Inspect all devices at 10x to 20x magnification. The inspected area
of each lead must have 95% solder coverage minimum; Pinholes, voids, porosity,
nonwetting, or dewetting shall not exceed 5 percent of the total inspected area; There
shall be no solder bridging between any termination area and any other metallization
not connected to it by design.
1
2.3 Test Results
Package Type
Test Result
Remark
TSOT
0/20
4 lots, assembled at ANST, UMY
MSOP
0/25
5 lots, assembled at ANST, UCD
TSSOP
0/25
5 lots, assembled at ANST, UMY
SOIC
0/100
20 lots assembled at ANST, UCD, ASEKS
QFN
0/100
20 lots assembled at UCD, UTAC, ASEKS
PDIP
0/15
3 lots assembled at ANST, JCET
For more detailed results display, please refer to attachment 1.
3. Solder Joint Reliability Test
3.1 Purpose
This test is to assess the solder joint reliability for board level SMT devices by expose the
PCB boards under TCJ stress and test the joint resistance at particular stop points.
3.2 Test procedure
Standards: IPC-9701 & JESD22-A104
Test condition: -0(+0, -10) ~ +100(+15, -0) °C; Air to Air; 15 minute soak; 2 cycles /
hour; Duration 6000 cycles.
Sample Size: 33 units for each run
Acceptance criteria: The resistances of the soldering joint are stable. No mechanical
damage, such as cracking, chipping, or breaking of the package (Inspected by Vision and
X-ray check).
3.3 Test Results
Package Type
Test Result
TSOT
0/99
Remark
3 lots, assembled at ANST, UMY
2
MSOP
0/99
3 lots, assembled at ANST, UCD
TSSOP
0/99
3 lots, assembled at ANST, UMY
SOIC
0/165
5 lots assembled at ANST, UCD, ASEKS
QFN
0/165
5 lots assembled at UCD, UTAC, ASEKS
For more test display, please refer to attachment 2
4. Whisker Growth test
4.1 Purpose
The purpose of this test is to assessing the whisker propensity for Tin-plating process on
SMD leads.
4.2 Test Procedure
Standard: JESD22-A121 & JESD201 & J-STD-020 & JESD22-A104
HTHS test condition: 60±5°C, 87% (+3/-2%) RH, 1500hrs
ATHS test condition: 30±5°C, 60%±10% RH, 1500hrs
TCA Test condition: -55(+0,-10) ~ +85(+10,-0) °C; 10 minutes soaking; 3cycles /hr;
500 cycles
Acceptance criteria: No long whisker growth (Whisker length<50 um)
3
Sample Size: 2 units for each run
4.3 Results:
Package Type
TSOT
MSOP
TSSOP
SOIC
QFN
PDIP
Test Result
TC
0/6
ATHS
0/6
HTHS
0/6
TC
0/10
ATHS
0/10
HTHS
0/10
TC
0/6
ATHS
0/6
HTHS
0/6
TC
0/20
ATHS
0/20
HTHS
0/20
TC
0/20
ATHS
0/20
HTHS
0/20
TC
0/6
ATHS
0/6
HTHS
0/6
Remark
3 lots, assembled at ANST, UMY
5 lots, assembled at ANST, UCD
3 lots, assembled at ANST, UMY
10 lots, assembled at ANST, UCD, ASEKS
10 lots, assembled at ANST, UCD, ASEKS
3 lots, assembled at ANST, JCET
For more detailed result display, please refer to attachment3.
5. Lead Integrity Test
5.1 Purpose
The test (Test condition C – Lead fatigue) is designed to check the resistance of the leads
to metal fatigue.
4
5.2 Test Procedure
Standard: JESD22-B105
Test condition:
1) ＞0.006 x 0.020 inch (0.15 x 0.51 mm) or round lead with a cross section of ＞ 0.020
inch (0.051 mm) in diameter, a weight of 8.0 ± 0.5 oz (227 ± 14 gram) shall be used.
2) ＞0.004 x 0.010 inch (0.10 x 0.25 mm) but ≤0.006 x 0.020 inch (0.15 x 0.51 mm), or
round lead with a cross section of ＞ 0.010 inch (0.025 mm) but ≤0.020 inch (0.051 mm)
in diameter, a weight of 3.0 ±0.3 oz (85 ± 9 gram) shall be used.
3) ≤0.004 x 0.010 inch (0.10 x 0.25 mm), or round lead with a cross section of ≤0.010
inch (0.025 mm) in diameter, a weight of 1.5 ± .1 oz (42.5 ± 3 gram) shall be used.
4) Bend times=3, Bend angle=30°
Acceptance criteria: Before lead fatigue test, all units should pass external visual
inspection without crack. After lead fatigue test, look at 10x-20x, all units also pass
external visual inspection without crack.
Sample size: 5 units for each run
5.3 Test Result
Package Type
Test Result
Remark
TSOT
0/10
assembled at ANST, UMY
MSOP
0/10
assembled at ANST, UCD
TSSOP
0/10
assembled at ANST, UMY
SOIC
0/15
assembled at ANST, UCD, ASEKS
For more detailed result display, please refer to attachment4.
6. Solder Heat Resistance
6.1 Purpose
This test is to assessing the ability of a device to withstand the thermal stresses of the
soldering process.
6.2 Test Procedure
Reference Standard: JESD22-A113; J-STD-020
5
Test condition:
Step
Condition
Preconditioning
Dry bake at 125°C for 24 hours
MSL1: 85%RH ,85°C 168Hrs
Moisture soak
MSL2: 65%RH ,85°C 24Hrs
Solder temperature: 260 ℃±3℃;
Solder Condition
Solder Immersion Time: 5sec;
Solder Alloy: 96.5-Sn, 3.0-Ag, 0.5-Cu
Sample size: 5 units for each run
Acceptance criteria: Pass Electrical test and no external package anomaly under 40X
microscope visual inspection (such as crack)
6.3 Test Result:
Package Type
Test Result
TSOT
0/5
MSOP
0/5
TSSOP
0/5
SOIC
0/5
QFN
0/5
Revision / Update History
Revision
1.0
2.0
3.0
4.0
5.0
Reason for Change
Date
Rel Engineer
Initial release
Update
Update
Update
Update
August 2005
October 2012
December 2012
September 2013
November 2013
J. Huljev
Edar Yu
Louis Liu
Louis Liu
Louis Liu
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ATTACHMENT1: SOLDERABILITY
MSOP
Fresh Unit – 30X Mag
After Solder Dip – 30X Mag
Fresh Unit – 50X Mag
After Solder Dip – 50X Mag
QFN
7
Fresh Unit – 30X Mag
After Solder Dip – 30X Mag
Fresh Unit – 50X Mag
After Solder Dip – 50X Mag
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ATTACHMENT 2: SOLDER JOINT
Daisy-Chain component optical photo
X-Ray photo
9
ATTACHMENT 3: WHISKER
TCA
TC 0 cycle: no whisker
TC 500 cycles: No long whisker (50um)
growth (Whisker length=16.5)
HTHS 0hr: no whisker
HTHS 1000hrs: no whisker
HTHS
HTHS 1500hrs: no whisker
10
ATHS
ATHS 0hr: no whisker
ATHS 1000hrs: no whisker
ATHS 1500hrs: no whisker
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ATTACHMENT 4: LEAD FATIGUE
PDIP
Before test
After test
TSSOP
Before test
After test
12
SOIC
Before test
After test
TSOT
Before test
After test
MSOP
Before test
After test
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