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Micro- and Nano-Electronics Group
Research Annual Report - 2006
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1) DESIGN OF RF INTEGRATED CIRCUITS
L. Larcher, A. Mazzanti, M. Borgarino, R. Brama, M. Pifferi, F.Ducati, F.Chiesi
Collaborations: ST-Microelectronics, Philips, Univ. Pavia, Univ. Pisa, Univ. Parma, Univ. Perugia.
Area: Integrated Circuits and Systems
2) COMPOUND-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS FOR RF
POWER APPLICATIONS
A. Chini, F. Fantini, M. Faqir, G. Verzellesi
Collaborations: Selex S.I., Univ. of Padova, Politechnic of Torino, Univ. of Roma Tor Vergata,
Univ. of Bologna (Dept. of Physics), University of California, Santa Barbara (USA), Research
Centre Jülich (Germany), Slovak Academy of Science, Bratislava (Slovakia).
Area: Microelectronic and Nanoelectronic Devices
3) CHARACTERIZATION AND MODELING OF THE LOW FREQUENCY NOISE
PROPERTIES OF BIPOLAR TRANSISTOR
M. Borgarino, F. Fantini
Collaborations: University of Bologna.
Area: Microelectronic and Nanoelectronic Devices
4) CHARACTERIZATION AND MODELING OF NON VOLATILE MEMORY
CELLS
P. Pavan, L. Larcher
Collaborations: Univ. Padova, Univ. Ferrara, Univ. ”La Sapienza” Roma, Politecnico di Milano,
IU.net, ST-Microelectronics, Saifun Semiconductors Ltd.
Area: Microelectronic and Nanoelectronic Devices
5) RADIATION DETECTORS ON 4H-SIC AND HIGH-RESISTIVITY SI
F. Nava, G. Verzellesi
Collaborations: INFN, Selex S.I., ITC-irst, CNR-IMM, Ioffe Institute, IKZ Berlin, Politecnic of
Milano, Univ. Bologna, Univ. of Trento, Univ. of Trieste, Univ. of Pisa, Univ. of Firenze, Univ.
of Perugia, Univ. of Torino, Univ. of Milano-Bicocca, Univ. of Catania.
Area: Sensors, Microsystems and Instrumentation
6) RELIABILITY OF ELECTRONIC SYSTEMS
F. Fantini, G. Cassanelli
Collaborations: Spal spa, Magneti Marelli Powertrain, Thermowatt spa, Digitek spa, Cnh, Prof.
M. Vanzi (DIEE Cagliari).
Area: Electronic Systems and Applications
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7) STEER-BY-WIRE SYSTEMS FOR OFF-HIGHWAY APPLICATIONS
A. Bertacchini, P. Pavan
Collaborations: Ognibene spa, Univ. Parma.
Area: Electronic Systems and Applications
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DESIGN OF RF INTEGRATED CIRCUITS
L. Larcher, A. Mazzanti, M. Borgarino, R. Brama, M. Pifferi, F.Ducati, F.Chiesi
Area:
Integrated Circuits and Systems
The activity on RF design of Silicon integrated circuits covers several research projects. We
focused on the analysis and design of wireless transceivers for communications and sensors applications. We investigated low power and innovative circuit techniques for RF front-ends, frequency
sysnthesis and power amplifiers. Several test chips (Class-E power amplifiers, injection locked oscillators, LNAs, mixers, PLLs) have been designed and succesfully tested. We investigated also effects
of high-voltage device stresses on oxide breakdown at Radio Frequency. Presently the attention is
focused on CMOS design of building blocks for Ultra Wide Band and millimeter-wave transceivers,
Clock and Data Recovery circuits for S-ATA, SSH and Fiber Channel standards, and CATV. The
design of a fully integrated radiometer operating in X-band is also in progress.
Publications
[1] A.Liscidini, A.Mazzanti, R.Tonietto, L.Vandi, P.Andreani, R.Castello A 5.4mW GPS CMOS
Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO Proceedings of the IEEE International Solid State Circuit Conference (ISSCC), San Francisco, February 2006
[2] L.Larcher, D.Sanzogni, R.Brama, A.Mazzanti, F.Svelto ”Oxide Breakdown After RF Stress:
Experimental Analysis And Effects On Power Amplifier Operation” Proc. of IEEE International
Reliability Physics Symposium, pp. 283 - 288, March 2006.
[3] R.Brama, L.Larcher, A.Mazzanti, and F.Svelto ”Impact of scaling on CMOS Radio-Frequency
Class-E Power Amplifiers” Proc. of Research in Microelectronics and Electronics, Ph.D., pp. 489492, June 2006.
[4] A.Mazzanti, F.Svelto A 1.8GHz Injection-Locked CMOS Quadrature VCO With Low Phase
Noise and High Phase Accuracy IEEE Transactions on Circuits and Systems-I: regular papers. Vol.
53, No. 3, pp.554 - 560, March 2006.
[5] A.Mazzanti, L.Larcher, R.Brama, and F.Svelto, ”Analysis of Reliability and Power Efficiency
in Cascode Class-E PAs” IEEE Journal of Solid State Circuits, Vol. 41, no. 5, pag. 1222 - 1229,
May 2006.
[6] A.Mazzanti, F.Svelto, P.Andreani On the Amplitude and Phase Errors of Quadrature CMOS
Oscillators IEEE Journal of Solid State Circuits” Vol.41 no.6, pp. 1305 - 1313, June 2006.
[7] A.Mazzanti, F.Svelto CMOS Injection Locked Oscillators for Quadrature Generation at Radio
Frequency Microelectronics Journal, pp. 1241 - 1250, Vol37, November 2006
[8] A.Liscidini, A.Mazzanti, R.Tonietto, L.Vandi, P.Andreani, R.Castello ”Single-Stage Low-Power
Quadrature RF Receiver Front-End: The LMV Cell” IEEE Journal of Solid State Circuits” Vol.41
no.12, pp. 2832 - 2841, December 2006.
[9] M.Pifferi, M.Borgarino, R.Codeluppi, F.Alimenti, ”High linearity CMOS Mixer for Domotic
5GHz WLAN Sliding-IF Receivers”, Microelectronics Journal, 2006, vol 37, no. 9, pp. 1012-1017
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[10] F.Alimenti, M.Borgarino, R.Codeluppi, V.Palazzari, M.Pifferi, L.Roselli, A.Scorzoni,
F.Fantini, ”A Single-Chip 5GHz WLAN Transmitter in 0.35um Si/SiGe BiCMOS Technology”,
Proceedings European Microwave Integrated Circuits Conference 2006, pp. 379-382.
[11] L.Vincetti, G.Borsari, M.Maini, A.Polemi, M.Borgarino, Microstrip Array Antenna ”Design
for a Radiometric Ground-Based Fire Detection Application”, Proc. European Conference on
Antennas and Propagation, EuCAP 2006, pg. 262
COMPOUND-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS FOR RF
POWER APPLICATIONS
A. Chini, F. Fantini, M. Faqir, G. Verzellesi
Area:
Microelectronic and Nanoelectronic Devices
This research activity addresses the development, characterization, numerical simulation, and
reliability of GaAs- and GaN-based field-effect transistors for RF power applications. Specific
results published in 2006 can be summarized as follows.
(i) Long-term on-state and off-state hot-electron stress tests have been carried out on unpassivated GaN/AlGaN/GaN HEMTs on SiC substrates [1]. Thanks to the thin GaN cap layer, devices
show minimal current-collapse effects prior to hot-electron stress, despite they are not passivated.
This comes at the price of a relatively-high gate-leakage current. Under the assumption that donorlike electron traps are present within the GaN cap, two-dimensional numerical device simulations
explain the current-collapse immunity of GaN/AlGaN/GaN HEMTs as the result of the partial
compensation of the negative polarization charge that is present at the GaN-AlGaN interface. The
higher the ionized donor charge, the higher, however, the free electron density and the conductance of the GaN layer, this explaning the observed reverse correlation between current-collapse
magnitude and gate-leakage current. Both on-state and off-state stresses produce simultaneous
current-collapse increase and gate-leakage-current decrease, which can be interpreted to be the result of gate-drain-surface degradation and/or reduced gate electron injection. This study has shown
that, although the thin GaN cap layer is effective in suppressing surface-related dispersion effects
in virgin devices, it does not, per se, protect the device from hot-electron degradation and should
to this aim be adopted in conjunction with other technological solutions like surface passivation,
pre-passivation surface treatments and/or field-plate gate.
(ii) High-electric-field degradation phenomena are investigated in GaN-capped AlGaN-GaN
HEMTs by comparing experimental data with numerical device simulations [2,3]. Degradations
effects characterizing both stress experiments were: a drop in the DC drain current, the amplification of gate-lag effects, and a decrease in the reverse gate leakage current. Simulations indicate
that the stress-induced amplification of gate-lag effects should be ascribed to the generation of acceptor traps within the gate-drain access region at the device surface and/or in the AlGaN barrier.
The drop in DC drain current should rather be attributed to acceptor-trap accumulation within
the GaN buffer layer. The drop in the reverse gate current can finally originate from either surface, barrier, or buffer trap accumulation. As a result, only the simultaneous generation of surface
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(and/or barrier) traps and of buffer traps can account for all of the degradation modes common
to both stress types. Experiments showed also that the power-state stress induces a drop in the
transconductance at high gate-source voltages only, whereas the off-state stress leads to a uniform
transconductance drop over the entire gate-source-voltage range. In this regard, simulations suggest
that under power-state stress traps should accumulate over a wide region extending laterally from
the gate edge towards the drain contact, whereas, under off-state stress, trap generation should
rather take place in a narrower portion of the drain access region close to the gate edge and should
be accompanied by a significant degradation of the channel transport parameters. Channel hot
electrons and electric-field-induced strain-enhancement are finally suggested to play major roles in
power-state and off-state degradation, respectively.
(iii) Increasing the RF power performance is one of the most challenging task in order to meet
the demand of modern wireless telecommunication systems. High RF power can be achieved mainly
by adopting new semiconductor materials with superior electrical properties, such as wide bandgap semiconductors, or by an optimized design of the device structure. We observed significant
improvement in device performances by implementing a field-plate structure into a GaAs-based
pHEMT [4,5]. Experimental measurements showed an increase in breakdown voltage from 23V
to 38V while maximum current remained unaffected. Since the device maximum current did not
change, the increase in breakdown voltage directly translated into an increase in the expected RF
output power. In fact, field-plated devices yielded output power levels as high as 1.6W/mm. This
represents a 60that yielded an output power density of 1W/mm. The observed improvements were
also confirmed by numerical simulations, proving that they can be a valuable and cost-effective
tool to design and optimize advanced device structures of the kind considered here. A device
optimization based on the experimental results obtained was also carried out by means of numerical
simulations [6]. It has been shown that by optimizing the field plate length and the silicon nitride
layer thickness the off-state breakdown voltage can be improved as much as four times for the
analyzed pHEMT structure.
Publications
[1] G. Meneghesso, F. Rampazzo, P. Kordos, G. Verzellesi, E. Zanoni, ”Current Collapse and
High-Electric-Field Reliability of Unpassivated GaN/AlGaN/GaN HEMTs”, IEEE Transactions
on Electron Devices, vol. 53(12), pp. 2932-2941, Dec. 2006.
[2] M. Faqir, A. Chini, G. Verzellesi, F. Fantini, F. Rampazzo, G. Meneghesso, E. Zanoni, J. Bernat,
P. Kordos, ”Study of high-field degradation phenomena in GaN-capped AlGaN/GaN HEMTs”,
Proc. of the 15th European Workshop on Heterostructure Technology (HeTech06), Manchester
(UK), Oct. 2006.
[3] M. Faqir, A. Chini, G. Verzellesi, F. Fantini, F. Rampazzo, G. Meneghesso, E. Zanoni, J. Bernat,
P. Kordos, ”Physical investigation of high-field degradation mechanisms in GaN/AlGaN/GaN
HEMTs”, Proc. of the Reliability of Compound Semiconductor Workshop (ROCS 2006), San
Antonio, Texas (USA), Nov. 2006.
[4] A. Chini, S. Lavanga, M. Peroni, C. Lanzieri, A. Cetronio, V. Teppati, V. Camarchia, G. Ghione,
G. Verzellesi, ”Fabrication, Characterization and Numerical Simulation of High Breakdown Voltage
pHEMTs”, Proc. of the 1st European Microwave Integrated Circuits Conference (EuMIC 2006,
formerly GAAS Symposium), Manchester (UK), Oct. 2006, pp. 50-53.
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[5] C. Lanzieri, M. Peroni, S. Lavanga, A. Chini, G. Verzellesi, G. Ghione, V. Camarchia, F.
Cappelluti, A. Angelini, E. Limiti, A. Serino, ”Very high power, low-cost field-plate GaAs PHEMTs
for X-band applications”, Proc. of TARGET Days 2006, Monte Porzio Catone (Roma), Oct. 2006.
[6] A. Chini, G. Verzellesi, ”Off-state breakdown optimization in field plated GaAs-pHEMTs
by means of two-dimensional numerical simulation”, Proc. of the 15th European Workshop on
Heterostructure Technology (HeTech06), Manchester (UK), Oct. 2006.
CHARACTERIZATION AND MODELING OF THE LOW FREQUENCY NOISE
PROPERTIES OF BIPOLAR TRANSISTORS
M. Borgarino, F. Fantini
Area:
Microelectronic and Nanoelectronic Devices
The research activity was devoted to the application of the experimental set-up developed in
the previous year of activity. In particular, the application was focused on the identification of nonlinear low frequency noise models suited for the design of microwave oscillators and mixers. The
identified model were implemented in the ADS CAD tool of Agilent Technology. The investigated
devices were GaInP/GaAs HBT’s. In a first step, the impact of a microwave large-signal on the low
frequency noise properties was addressed. Aim of this characterization was to test the correctness
of the identified model under experimental conditions less complicated than those offered by an
oscillator. In particular, it is worth noticing that the experimental set-up is very close to the setup required to investigate the low freqeuncy noise properties of an HBT when used in a mixer.
The particular kind of the emploied set-up, based on a short-circuit currents representation of
a noisy four-poles, allowed to characterize the low frequency noise of the investigated HBT in a
easier way than that the use of a more traditional multi-impedance technique would have made
possible. The high automatization degree of the developed experimental set-up allowed to collect
a large amount of data. These data amount together with the particular model extraction strategy
developed during the previous research activity year has made possible the identification of a well
accurated model. A very good agreement was obtained indeed between the experimental data and
the data generated by the CAD tool. In a second step, the characterization and the following model
identification procedures were then applied to the design of a microwave oscillator, with the aim of
verifying the capability of the identified non-linear low frequency noise model to correctly predict
the phase noise of a microwave oscillator. Again, a good agreement between measurements and
simulations was achieved.
Publications
[1] M.Borgarino, C.Florian, P.A.Traverso, F.Filicori, ”Microwave Large-Signal Effects on the Low
Frequency Noise Characteristics of GaInP/GaAs HBTs”, IEEE Transactions on Electron Devices,
vol. 53, no. 10, 2006, pp. 2603-2609.
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[2] P.A.Traverso, C.Florian, M.Borgarino, F.Filicori, ”An Empirical Bipolar Device Non-Linear
Noise Modeling Approach for Large-Signal Microwave Circuit Analysis”, IEEE Transactions on
Microwave Theory and Techniques, vol. 54, no. 12, 2006, pp. 4341-4352.
[3] M.Borgarino, N.Corciulo, C.Florian, P.A.Traverso, F.Fantini, F.Filicori, ”Bias Dependent,
Compact Low-Frequency Noise Model of GaInP/GaAs HBT: Experimental Identification and CAD
Implementation”, German Microwave Conference 2006, Karlsruhe (Germany)
[4] C.Florian, P.A.Traverso, M.Borgarino, F.Filicori, ”A Non-linear Noise Model of Bipolar Transistors for the Phase-Noise Performance Analysis of Microwave Oscillators”, Proceedings International
Microwave Symposium 2006, pp. 659-662
[5] C.Florian, P.A.Traverso, F.Filicori, M.Borgarino, ”Non-linear Measurement-Based Noise Models of Electron Devices for Low Phase-Noise Oscillator Design”, Workshop at European Microwave
Integrated Circuits Conference 2006.
CHARACTERIZATION AND MODELING OF NON VOLATILE MEMORY
CELLS
P. Pavan, L. Larcher
Area:
Microelectronic and Nanoelectronic Devices
We have continued the research activity concerning the characterization and the modeling of
traditional and emerging non-volatile memories. Specifically, the research activity we carried out
has been focused on investigating methods allowing profiling the storage charge in NROM devices.
We are investigating and developing new experimental techniques to characterize NROM reliability.
Finally, we investigated the effects of single ion radiation on oxide reliability, using Flash memories
as very acurate subattoampere current measurement tools.
Publications
[1] G. Cellere, A. Paccagnella, L. Larcher, A. Visconti, and M. Bonanomi ”Subattoampere current
induced by single ions in silicon oxide layers of nonvolatile memory cells”, Appl. Phys. Lett. 88,
Issue 19, 192909, 2006.
[2] L. Avital, A. Padovani, L. Larcher, I. Bloom, R. Arie, P. Pavan, Boaz Eitan, ”Temperature
Monitor: a New Tool to Profile Charge Distribution in NROMTM Memory Devices” Proc. of IEEE
International Reliability Physics Symposium, pp. 534 - 540, March 2006.
[3] A. Padovani, L. Larcher, P. Pavan, ”Profiling charge distribution in NROMTM devices” Proc.
of Research in Microelectronics and Electronics, Ph.D., pp. 69-72, June 2006.
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RADIATION DETECTORS ON SIC AND HIGH-RESISTIVITY SI
F. Nava, G. Verzellesi
Area:
Sensors, Microsystems and Instrumentation
This research activity is aimed at the development of ionizing radiation detectors on SiC and
high-resistivity Si for scientific and industrial applications. Results achieved on SiC detectors are
the following
(i) development and realization of semiconductor Schottky barrier nuclear detectors on epitaxial
silicon carbide of 4H polytype in different suitable geometries, such as simple planar device, coplanar
grid, microstrip and pixelled array detectors and drift detectors;
(ii) electrical and optical characterization by current-voltage, capacitance-voltage and nuclear
spectroscopy measurements of Schottky barrier diodes realized on 4H-SiC epitaxial layers with
thickness and dopant concentration of 50 µm and 5×1014 cm−3 , respectively;
(iii) study of the radiation resistance of epitaxial 4H-SiC and nuclear-radiation detectors based
on 4H-SiC films by irradiating the detectors with 1MeV neutron at fluences ranging from 1013 to
1016 n/cm2 ; characterization of the induced defects, acting as electron and hole trapping centers,
by means of junction spectroscopy techniques such as DLTS and PICTS; identification of the the
trapping centers which play the main role in the degradation in the defect complex involving carbon
vacancy and carbon and silicon vacancy;
(iv) responsivity measurements of 4H-SiC epitaxial SiC Schottky barrier diodes used as UV
photodiodes as a function of the wave length ranging from 200 to 400 µm.
Results on Si detectors can be summarized as follows.
We have proposed a novel n-p-n BJT radiation detector on high-resistivity silicon with integrated p-n-p transistor providing the quiescent base current of the detector [2]. The DC operational
limits of the proposed detector have been analyzed by means of numerical device simulations, pointing out that, by properly outdistancing the base of the p-n-p transistor from the emitter of the
n-p-n detector, the latch up of the parasitic thyristor embedded within the detector-plus-biasingtransistor structure takes place at relatively-high current levels, where detector operation should
anyway be avoided in order to prevent the associated current-gain loss. Numerical simulations
provided insight about the bias dependence of charge-collection waveforms, indicating that minimization of the collecting time requires the detector quiescent current to be adjusted at the highest
value still allowing high-injection effects to be avoided. A small-signal equivalent circuit of the
proposed structure has also been derived, allowing the impact of p-n-p biasing transistor and load
resistance on the charge-collecting time constant to be evaluated. Experimental results [3] have
shown that the predicted latch-up effect actually takes place, but, in agreement with simulations,
fabricated structures are immune from this phenomenon throughout their high-current-gain operating region. Tested devices have shown a minimum charge-collecting time constant of 35 µs, as
measured under pulsed laser illumination. In comparison with other silicon detectors, like p-i-n
diodes, silicon drift chambers and active pixel detectors (e.g., DEPMOS, DEPJFET), the principal
limitations of the BJT detector are its relatively small bandwidth and modest noise performance.
More specifically, maximum counting rates achievable are in order of 10-40 kHz, while the lowest ENC (Equivalent Noise Charge) demonstrated so far is of about 380 e- r.m.s [4]. On the other
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hand, the key benefit of the BJT detector is its internal signal amplification capability, allowing the
readout chain complexity to be significantly reduced and/or the output signal to be propagated for
some distance (up to tens of cm) through metal wires or external cables before reaching the readout
circuitry. A reduced output signal amplification can also be traded with a higher counting rate, by
inserting a C-R high-pass filter at the output of the BJT detector. In summary, this type of detector is suited for particle counting, in cases where high resolution and speed are not required and/or
where system simplicity is a primary goal. It can also be employed as a radiation-intensity sensor in
industrial applications (e.g., for monitoring of materials quality and/or density, level sensing, etc.)
in situations where X rays are more suited than light as probing radiation. By exploiting the BJT
detector in conjunction with commercial-IC-base readout electronics, a simple, low-cost, and lowpower alpha-particle detection system is currently being developed for environmental radioactivity
monitoring applications.
Publications
[1] F.Nava et al., ”Radiation detection properties of 4H-SiC Schottky diodes irradiated up to 1016
n/cm2 by 1MeV neutrons”, IEEE Trans. on Nucl. Science 53 (2006), 2977.
[2] G. Verzellesi, D. Bergamini, G.-F. Dalla Betta, C. Piemonte, M. Boscardin, L. Bosisio, S.
Bettarini, G. Batignani, ”N-p-n bipolar-junction-transistor detector with integrated p-n-p biasing transistor-feasibility study, design and first experimental results”, Semiconductor Science and
Technology, vol. 21, pp. 194-200, 2006.
[3] G. Verzellesi, G. Batignani, S. Bettarini, M. Boscardin, L. Bosisio, G.-F. Dalla Betta, G.
Giacomini, C. Piemonte, ”BJT-based detector on high-resistivity silicon with integrated biasing
structure”, Nuclear Instruments and Methods in Physics Research A, vol. 567, pp. 285-289, 2006.
[4] L. Bosisio, G. Batignani, S. Bettarini, M. Boscardin, G.-F. Dalla Betta, G. Giacomini, C.
Piemonte, G. Verzellesi, N. Zorzi, ”Performance evaluation of radiation sensors with internal signal
amplification based on the BJT effect”, Nuclear Instruments and Methods in Physics Research A,
vol. 568, pp. 217-223, 2006.
RELIABILITY OF ELECTRONIC SYSTEMS
F. Fantini, G. Cassanelli
Area:
Electronic Systems and Applications
Aim of this activity is the development of reliability methodologies that can be used to evaluate
and to improve the reliability of electronics systems during the early design phase. The concept of
Failure Analysis-assisted FMEA (Failure Modes and Effect Analysis) developed during the last year
has been improved by using different failure analysis techniques. Failure Analysis-assisted FMEA
has been tested on a real electronics system for automotive application to evaluate the advantages
of this methodology with respect to the original FMEA technique.
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Publications
[1] G. Cassanelli, G. Mura, F. Fantini, M. Vanzi, B. Plano, Failure Analysis-assisted FMEA,
Microelectronics Reliability, Vol. 46, Issues 9-11, pp1795-1799, September-November 2006.
[2] G. Mura, M. Vanzi, G. Cassanelli, F. Fantini, The rules of the Rue Morgue: a decade later”, in
Proceedings of the 13th International Symposium on the Physical and Failure Analysis of Integrated
Circuits (IPFA) 2006, 3 - 7 July 2006, Meritus Mandarin, Singapore.
[3] G.Mura, G.Cassanelli, Failure Analysis and field failures: a real shortcut to reliability improvements”, in Proceedings of the International Workshop on Thermal Investigations of ICs and
Systems (THERMINIC) 2006, 27-29 September 2006, Nice, France.
STEER-BY-WIRE SYSTEMS FOR OFF-HIGHWAY VEHICLES
A. Bertacchini, P. Pavan
Area:
Electronic Systems and Applications
We have continued the research activity concerning the design and implementation of a Steerby-Wire System (SBW). In particular,the research activity has been focused on the implementation
of a preliminary architecture of a complete steer-by-wire system. The system is composed by three
main ECUs. The first one concerns the force feedback. The implemented ECU executes a torque
control of the chosen force-feedback actuator (in this case, a brushless motor) in order to recreate on
the steering wheel the same drive feeling of a traditional steering system. The second one concerns
the steering command actuation on the wheels. It has been chosen a fully electric implementation,
particularly suitable for light vehicles. The implemented ECU executes a torque control of the
motor used as steering command actuator, in agreement with the data coming out from the forcefeedback ECU. The third ECU operates as gateway between the previous two ECUs and contains
the software needed to implement some typical steer-by-wire add on like variable steering ratio,
fixed wheel position, and so on). Moreover, in a more complex system, it can be used to operate
with other ECUs (i.e. ABS, ESP, etc...) to improve active and passive safety of the vehicle. In
order to implement a reliable system, fault tolerance aspects have been taked in account. Several
redundant architectures have been investigated using an Hardware-in-the-Loop (HIL) approach for
each subsystem. It is very easy to set up a test bench able to test in real work conditions a force
feedback subsystem, therefore the experiments have been concentrated on this subsystem. Once the
different architectures will be validated and compared, it will be possible to implement the chosen
one on board vehicle. Thanks to the collaboration with the Mectron Lab of REI (Reggio Emilia
Innovazione), the system described has been implemented on a small lawnmower and presented in
several exhibitions.
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Publications
[1] A. Bertacchini, L. Tamagnini, P. Pavan, ”Force Feedback in Steer-by-Wire Systems: Architecture and Experimental Results” in Proceedings of IEEE International Symposium on Industrial
Electronics, ISIE06 paper MF-002576, Montreal, Canada, 9-13 July, 2006. ISBN 1-4244-0497-5.
[2] A. Bertacchini, P. Pavan, L. Tamagnini, M. Mistrorigo, M. Morandi, ”Hardware-in-the-Loop
Approach for Redundant Brushless Motor Control System” in Proceedings of 32nd Annual Conference of the IEEE Industrial Engineering Society, IECON06, paper MF-005762, Paris, France,
November 7-10, 2006. ISBN 1-4244-0136-4.