Download Analog signal chain design considerations

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts

Ground loop (electricity) wikipedia , lookup

Immunity-aware programming wikipedia , lookup

Rectifier wikipedia , lookup

Dynamic range compression wikipedia , lookup

Current source wikipedia , lookup

Stray voltage wikipedia , lookup

Time-to-digital converter wikipedia , lookup

Control system wikipedia , lookup

Ohm's law wikipedia , lookup

Pulse-width modulation wikipedia , lookup

Voltage optimisation wikipedia , lookup

Schmitt trigger wikipedia , lookup

Voltage regulator wikipedia , lookup

Islanding wikipedia , lookup

Switched-mode power supply wikipedia , lookup

Oscilloscope history wikipedia , lookup

Buck converter wikipedia , lookup

Alternating current wikipedia , lookup

Mains electricity wikipedia , lookup

Metadyne wikipedia , lookup

Integrating ADC wikipedia , lookup

Multimeter wikipedia , lookup

Resistive opto-isolator wikipedia , lookup

Analog-to-digital converter wikipedia , lookup

Opto-isolator wikipedia , lookup

Transcript
Analog signal chain design considerations
By: Kannan Sadasivam, Applications Engineer Staff and Sachin Gupta, Applications Engineer Sr., Cypress Semiconductor
Corp.
Signal chains for measurement of analog quantities typically pose the toughest design challenges for engineers. Even a
simple signal chain with a resistive sensor and an analog-to-digital data acquisition system involves multiple complex factors
that have to be dealt with before a valid measurement can be made. These factors are even more complex to manage when a
system is working with different sensors. This article discusses different issues developers need to tackle for accurate
measurement with illustrations of different type of resistive sensors.
On an abstract level, the analog signal chain in all the systems using resistive sensors will be more or less similar to as shown
in figure 1.
Figure 1: Basic analog signal chain
Though all signal chains look identical on a block level, the parameters for each block will differ based upon many factors. The
most important of these factors to consider are change in resistance (and hence change in voltage) across the sensor for unit
change in physical quantity, distance of sensor from the measurement system (i.e., the error in measurement due to wire
resistance), required precision of the system, type of interference, and required accuracy. These factors decide the type of
excitation required, the way the sensor has to be connected to the measurement circuit, the gain required for the pre
processing circuit and the ADC, the type of filter needed as well as its cut off frequency, and the resolution and input range of
ADC.
Let’s look into different sensors and major constraints related to analog signal chains while using them, starting with a
thermistor. Thermistors are extremely nonlinear over the temperature range. The variation of resistance over temperature is
the complex nonlinear function as shown below:
where T is temperature and R is resistance. A, B and C are constants specific to the thermistor. Due to the arithmetic
complexity of the equation, it might not be advisable to implement it in a microcontroller. Hence, the general way of
implementing this calculation is to use a look up table for the resistances and corresponding temperature values. The
temperature is then calculated using piece-wise arithmetic. While there may be errors in measurement due to gain variations
and offsets, these errors are too small for the precision requirements of a thermistor-based temperature sensor. Gain variation
and offsets will be discussed in the RTD section later in the article.
Considering the measurement of resistance, there can be multiple ways of direct measurement as shown in figure 2.
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 1 of 8
January 2011
Figure 2(a), 2(b), 2(c): Resistance measurement topologies
The topology shown in Fig 2(a) uses a voltage DAC to excite the resistor divider. One of the resistances in the circuit is the
sensor itself and another resistance is the known value reference resistance. This topology will work; however, single-ended
measurement has some drawbacks. One of them is the ground shift between the Vss near the sensor and actual internal Vss
to ADC, which will result in an offset.
On the other hand, as shown in figure 2(b), when the –ve input for the ADC is tapped near to the resistance, both analog
ground and the ADC’s ground are same. Since the differential lines would be running close to each other until the sensor, any
pick up on one will be replicated on the other. This signal, when measured using a differential measurement structure, gets
cancelled since it is a common mode signal. Another point to be noted in this diagram is that while measuring the voltage
across Rsensor, the +ve input is tapped near the sensor itself. This ensures there is no error in measurement due to wire
resistance.
Figure 2 (c ) shows the topology which uses a current DAC to excite the sensor. The voltage measured across the sensor will
provide an accurate measure of its resistance. Current excitation is the best topology in terms of the number of external
components needed. It does not need any reference resistance. However, to calibrate the system for gain errors, an external
resistance is needed. Note that for those applications where very high accuracy is not needed, there is no need of gain error
compensation and hence no external reference resistance is required.
Resistance Temperature Detectors (RTD)
RTDs (Resistance Temperature Detectors) have a resistance at 0o C is of the order of 100 ohms with every degree change in
temperature causing a change of close to 0.385 ohms. As RTDs have low resistance, the effect of wire resistance plays a
major role in their accuracy. RTDs are excited using a constant current source. The voltage across an RTD can be measured
either using a 3-wire method or 4-wire method, based on the number of wires running parallel from the measurement system
to the RTD. As RTDs are installed away from the measurement system, the 3-wire measurement method is typically preferred
due to wire cost. Figure 3 shows the diagram of an RTD interfaced for 3-wire measurement.
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 2 of 8
January 2011
Figure 3: 3-wire RTD measurement
In figure 3, when the voltage is measured on the first channel, it is not just the voltage across the RTD. In fact, it is the voltage
drop measured across the RTD and the wire resistance between IDAC and RTD. The error due to wire resistance can be
handled in multiple ways. One way is to measure the resistance of wire manually and then store it as a constant. Every time a
measurement is made, this resistance can be subtracted. Another way is to measure the voltage drop between the positive
terminal of the RTD and the output pin of the DAC. If the wires are of same specifications, then they will have the same
resistance and the voltage measured in the previous step can be subtracted from the voltage measured across the sensor.
However, still there may be some error if the wires are not symmetrical. Also, this method will consume one additional pin to
connect the DAC’s output pin to the ADC input.
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 3 of 8
January 2011
Figure 4: 4-wire RTD measurement
For accurate measurements, the 4-wire configuration as shown in figure 4 is preferred. Both negative and positive inputs are
tapped from close to the RTD, thereby eliminating error due to wire resistance. While designing the signal chain for the RTD,
the input impedance of the chain needs to be very high to keep input current negligible. If the ADC has a low input impedance,
the signal should be fed to a buffer before connecting to the ADC.
As mentioned earlier, there will be an offset in the system which will vary with temperature. Offset/offset drift with temperature
and low frequency noise can be removed using correlated double sampling (CDS). With CDS, first the zero referenced offset
is measured (to measure it, both inputs are shorted) and then the voltage across the sensor is measured. In figure 3 and 4, to
measure the zero referenced signal, the ADC is connected to channel 1. When the voltage across the sensor is measured, it
will include the actual thermocouple voltage, offset, and noise (equation 1). In figure 3 and 4, it is the voltage measured on
channel 0.
VR_Signal = VRTD + VN + Voffset -- (1)
The zero referenced reading is given by equation 2.
VZero_Ref = VN + Voffset -- (2)
The previous zero referenced sample with respect to the current zero referenced measurement is given by equation 3.
VZero_ref_Prev = (VN + Voffset)*Z-1 -- (3)
The difference, then, between the current voltage measurement across the sensor and previous zero referenced signal is
given by equation 4.
Vsignal = (VRTD + VN + Voffset) - (VN + Voffset)*Z
-1
--(4)
Vsignal = VRTD – (VN + Voffset)*(1-1/Z) –(5)
As an offset is fairly constant for consecutive samples, equation 5 will result in equation 6.
Vsignal = VRTD - VN*(1-1/Z) – (6)
Using the bilinear transform, Z = (1 + sT/2)/(1-sT) where T is 1/fsample, equation 6 can be written as equation 7.
Vsignal = VRTD – VN*(2s/(s+ 2fsample) – (7)
If we analyze equation 7, it is a high pass response. On the other hand, ADCs have a low pass response. This helps to reduce
overall noise of the system. Also, looking at the topology shown in figure 4, it is evident that the accuracy of the system is
dependent entirely on the accuracy of the IDAC. If the IDAC deviates by 5%, then the calculation is also going to deviate by
5%. This is a gain error term in the measurement and is not be acceptable for most systems. There are other contributors to
gain error as well, ADC and its reference accuracy being the first reason. If the ADC had a reference that is accurate to just
1%, all the measurements made using the ADC suffer from this 1% gain error. Since we are measuring temperature here, the
issue of drift can pose an even deeper issue.
The best way to avoid the effect of these different gain errors is by referencing all measurements against a more accurate
parameter. An 0.1% accurate resistance can be used for this purpose. Figure 5 shows the topology in which the calibration
resistance is connected.
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 4 of 8
January 2011
Figure 5: 4-wire RTD measurement with gain error compensation
The current is first passed through the reference resistor and the voltage is measured, thus giving a measure of its resistance.
This measurement is prone to the gain errors discussed earlier. However, in the next step the same current is passed through
the RTD and the voltage across it is measured using the same setup. The ratio of the two ADC measurements eliminates any
gain error that is present since the RTD’s resistance measurement is made with reference to the reference resistor. The
accuracy of the system is now based on the accuracy/tolerance of the reference resistor used.
Considerations for measurements in mVs
Up to this point, we have discussed challenges faced in making precision analog measurements in generic high-precision
systems where the range of measurement is typically in the volts range. There are systems that have measurement range in
the mVs, and these pose a completely new array of challenges for designers. A good example of such a system is a load cell.
Load cells are sensors that convert force applied on them into an electrical quantity. They are generally used in digital
weighing scales for weight measurement. A typical load cell is four resistors arranged in a whetstone bridge network. The
sensor is excited from the two excitation terminals using a voltage and, based on the force that was applied to the sensor, a
small voltage gets set up in the measurement terminals. The output voltage range of a load cell is generally specified in mV/V,
which is the output range for a 1V excitation voltage.
Let us take an example of 2mV/V load cell, measuring a maximum weight of 10kg. If the user excites it using a 5V input, then
the net output voltage range is just 10mV. This means that even when the load cell is experiencing a 10 kg force, the output
would be just 10mV. To resolve close to 16 bits of precision in this 10mV range means that we need to reduce the ADC range
to fit this input range.
The most commonly used method is to implement a gain stage to amplify the input to fit the ADC range, thus resolving more
bits inside a smaller range. For example, to have a measurement range of 10mV as discussed earlier using an ADC that
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 5 of 8
January 2011
generally has a 0+/- 1V range, the user can resort to getting close to 100x gain on the signal using an amplifier based gain
stage
When the ADC is measuring a dynamic range of 1V, the lowest resolved voltage a 20-bit ADC would see is 1uV. When a gain
stage is used to improve the range, the gain stage also amplifies the noise and makes it prominent enough to affect the ADC’s
measurement. This noise affects the number of usable bits that the ADC can provide at this gain setting. Therefore, one has to
pick an ADC which gives an optimum resolution at the required gain settings.
The ADCs generally used for measuring the output of a load cell are Delta Sigma (DelSig) ADCs and are redundantly low pass
filters. Some DelSig ADCs like the ones found on Cypress’ PSoC3 and PSoC5 devices, have an ability to add the gain in the
Delta Sigma modulator itself. The effect of a gain of two on the ADC in this case would result in a change of the ADC’s input
range from 0+/- 1.024V to 0+/-0.512V. Thus, we can achieve higher gains in the ADC’s modulator itself. There is also a
redundancy advantage in doing this. As we increase the gain in the modulator of the ADC, the ADC’s bandwidth starts
reducing. This is not of concern for the sensor measurement since the sensor update rates are much smaller. However, the
reduction in the bandwidth can be an advantage since it acts as a low pass filter and doesn’t allow noise to enter the system.
Another major concern in a load cell interface is that it is prone to gain error because the output signal range is dependent on
the excitation voltage. A small variation in the excitation voltage can cause a similar percentage of gain error in the
measurements. We can avoid this if the signal measurements are made as a ratio against the excitation voltage. This can be
achieved by two means:
1.
We can measure the signal and excitation voltage separately and then calculate the ratio, thus taking out the gain error.
However, this method requires multiplexing of the ADC between the two signals. The other problem is that the signal we
are measuring is in the 10mV range and the excitation voltage would be in the volts range. This would mean dynamically
changing gain settings and ADC range parameters, which might not be advisable in most analog systems.
2.
The other means of achieving this is by using the reference to the ADC itself. ADCs generally have a reference pin to
connect to an external reference. Every measurement made in the ADC is made with respect to the reference. Thus, if we
were to provide the excitation voltage or a divided derivative of it as a reference to the ADC, we can achieve a ratio-metric
measurement for the signal.
Figure-5: Load Cell interface Circuit
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 6 of 8
January 2011
Digital Filter
We discussed several means for avoiding noise and other error sources in analog signal chains. One of the final stages to get
a noise-free output can be achieve using a firmware-based mathematical filter to average out the noise. An easy filter to
implement is a moving average filter which uses an array where the input values keep getting streamed in from one side and
the oldest values fall of the array from the other side. At any given time, the output of the filter is the average of all elements in
the array.
Figure 6: Moving average filter
The moving average filter is one of the easiest yet most effective filters to achieve higher noise free bits from your
measurement system. The disadvantage is that there is a constant delay which is proportional to the depth of the array being
used. That means that change in an n-element moving average filter is going to take n cycles to reflect itself in the output. This
can be a bit misleading if there are larger variations and the output slowly catches up. This condition can be avoided by having
a threshold condition check on the variations. If the input varies more than a threshold at a specific point of time, the whole
filter is flushed and new data is copied in the filter and also into the output, thus reducing the latency for larger variations.
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone: 408-943-2600
Fax: 408-943-4730
http://www.cypress.com
© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the
use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended
to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of
Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or
registered trademarks referenced herein are property of the respective corporations.
This Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and
foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used
only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code
except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 7 of 8
January 2011
herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical
components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support
systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Design Considerations The Analog Signal Chain
Published in EE Times Design (http://www.eetimes.com/design)
Page 8 of 8
January 2011