Download geminate model - Silicon Detector Laboratory

Applicazioni industriali
delle radiazioni ionizzanti
(Effetti della radiazione ionizzante nella
Tecnologia CMOS)
Andrea Candelori
Istituto Nazionale di Fisica Nucleare and Dipartimento di Fisica, Padova
1
5A. MOS and MOSFET: a brief review
2
The MOS capacitor
MOS is the acronym of metal oxide semiconductor
Gate
tox
bulk contact
3
The MOS capacitor band diagram
Ef is the fermi level
Eg is the energy gap
Ec is the conduction band energy level
Ev is the valence band energy level
 is the electron affinity
 is the work function
q is the potential barrier
q·m,e=3.15 eV
Eo
q·Si,e=3.15 eV
q·ox=0.95 eV
q·m=4.1 eV
q·Si=4.05 eV
Ec,ox
q·Si,e
Ef,m
q·Si
Ec,Si
Ei,Si
Eg,ox=9 eV
Ef,Si
Eg,Si=1.1 eV
q·m,h=5.9 eV
Ev,ox
q·Si,h=4.8 eV
Ev,Si
4
The MOS capacitor band diagram (accumulation and depletion)
electron accumulation
close to the SiO2/Si interface
ns>Nd
Vg>0
n-type silicon
Vg<0
electron are pushed back
from the SiO2/Si interface
leaving the donor ionized
ns<Nd
5
The MOS capacitor band diagram (accumulation and depletion)
Vg=VT<0
donor are ionized
holes are attracted
at the SiO2/Si interface
hs=Nd
Vg<VT<0
n-type silicon
6
The MOS capacitor band diagram
Flatband
Accumulation
Depletion
Inversion
7
MOSFET
MOSFET is the acronym of Metal Oxide Semiconductor Field Effect Transistor
Applets: http://jas.eng.buffalo.edu/education/mos/mosfet/mosfet.html
8
N-channel MOSFET (conduction is due to electrons)
G
S
D
n+
n+
The n-MOSFET threshold voltage (VT>0) is the voltage which
has to be applied to the gate in order to form a conductive
channel (electrons) between source and drain.
VG=VT>0
p
G
S
D
B
n+
n+
p
B
The silicon at the SiO2/Si interface is in
strong inversion (n=Na), and a
conductive channel of electrons is
formed between source and drain.
9
P-channel MOSFET: conduction is due to holes
G
S
D
p+
p+
The p-MOSFET threshold voltage (VT<0) is the voltage which
has to be applied to the gate in order to form a conductive
channel (holes) between source and drain.
VG=VT<0
n
G
S
D
B
p+
p+
n
B
The silicon at the SiO2/Si interface is in
strong inversion (p=Nd), and a
conductive channel of holes is formed
between source and drain.
10
Measurement of the MOSFET threshold voltage
ID
A
G
S
D
p+
VG=VD<0
is variable
p+
0.15
n
Oxide thickness 5.5 nm
W=2000 m
L=0.36 m
0.12
|ID|1/2 (A1/2)
B
0.09
0.06
0.03
|VT|=0.416 V
0.00
0.0
0.4
|VG|=|VD| (V)
0.8
Threshold voltage (VT) for the p-MOSFET at the input at the APV-25 read-out electronics.
1.2
11
MOSFET operation in sub-threshold
VG is variable
VT<VG<0
ID
G
VD=-50 mV
A
S
Above-threshold
D
p+
Sub-threshold
p+
1E-1
n
1E-3
1E-5
|ID| (A)
B
VD=-50 mV
1E-7
Threshold
1E-9
1E-11
1E-13
1E-15
0.4
0.2
0.0
-0.2
-0.4
VG (V)
-0.6
-0.8
Sub-threshold curve for the p-MOSFET at the input at the APV-25 read-out electronics.
-1.0
12
-1.2
MOSFET operation above threshold
VG>VT and VG is fixed
Linear region
VG>VT and VD<VG
B
Pinch-off condition
VG>VT and VD=VG
B
Saturation region
VG>VT and VD>VG
B
13
MOSFET operation above threshold
VG is fixed
VG<VT<0
ID
G
VD is variable
A
S
D
p+
p+
30
VG=-0.40 V
VG=-0.50 V
VG=-0.60 V
VG=-0.85 V
VG=-1.00 V
VG=-1.20 V
n
B
|ID| (mA)
20
10
0
0.0
0.2
0.4
0.6
|VD| (V)
0.8
Output curve for the p-MOSFET at the input at the APV-25 read-out electronics.
1.2
1.0
14
The MOSFET as an amplifier
VOUT=VINgmRD
VDD
R
VOUT
gm=IDS/VG
Trans-conductance
VIN
D
p+
50
G
40
VG
B
|gm| (mS)
VD=-450 mV, AsRec
S
30
VD=-650 mV, AsRec
VD=-850 mV, AsRec
20
p+
VD=-50 mV, AsRec
VD=-250 mV, AsRec
VD=-1050 mV, AsRec
n
10
0
0.0
-0.2
-0.4
VG (V)
-0.6
-0.8
15
-1.0
5B. Radiation Effects in thick oxide (>10 nm)
16
Materials for study
1) T.R. Oldham and F. B. McLean, "Total Ion ionizing Dose Effects in MOS Oxides",
IEEE Trans. Nucl. Sci., vol 50, n.3, June 2003, pp. 483-499, and references therein.
2) J. R. Schwank et al., "Radiation Effects in MOS Oxides",
IEEE Trans. Nucl. Sci., vol 55, n.4, August 2008, pp. 1833-1853, and references therein.
3) J. R. Schwank et al., "Radiation Effects in MOS Oxides",
IEEE Trans. Nucl. Sci., vol. 50, n. 3, June 2003, pp.522-538.
4) R. C. Lacoe., "Improving Integrated Circuits Performance Through the Application of Hardnessby-design Methodology",
IEEE Trans. Nucl. Sci., vol. 55, n. 4, August 2008, pp.1903-1925.
5) G. Anelli et al., "Radiation Tolerant VLSI Circuits in Styandard Deep Submicron CMOS
Technologies for the LHC Experiment: Practical Design Aspects",
IEEE Trans. Nucl. Sci., vol. 46, n. 6, December 1999, pp.1690-1696.
17
MOSFET: the gate oxide
n-MOSFET before irradiation:
electron channel: VT>0
n-MOSFET after irradiation:
positive oxide charge trapped in the
oxide, VT decreases and becomes
negative. Also at VGS=0 V the electron
channel is formed.
18
The MOSFET sensitive parts to radiation
SiO2/Si interface
to ionizing radiation
G
S
SiO2 to
ionizing radiation
D
p+
p+
The substrate can be sensitive to bulk damage, but
this effect is less relevant because the conduction is
close to the SiO2/Si surface
n
B
19
The MOSFET sensitive parts to radiation
SiO2/Si interface
to ionizing radiation
G
S
SiO2 to
ionizing radiation
D
n+
n+
The substrate can be sensitive to bulk damage, but
this effect is less relevant because the conduction is
close to the SiO2/Si surface
p
B
20
Ionizing radiation in SiO2: p-MOSFET threshold voltage
VT<0: channel of holes
21
Ionizing radiation in SiO2: n-MOSFET threshold voltage
VT>0: channel of electrons
22
MOSFET: the gate oxide
Which are the physical mechanisms governing radiation damage in
Silicon Oxide (SiO2)?
Which is the dependence of these mechanisms considering the
following experimental parameters?
-Oxide thickness.
-Time.
-Electric field in the oxide.
-Temperature.
We will consider first the results of investigations for
thick oxide (>10 nm), whose thicknesses are typical for old
technologies (2000) and nowadays field oxides.
23
Ionizing radiation in SiO2 and defect generation mechanisms (1)
VG>0
-When radiation passes through the oxide electron/hole pairs are created by the deposited energy.
-In SiO2 electrons are much more mobile than holes, and they are swept out of the oxide typically in
picoseconds or less. However in the first picosecond some fraction of the electrons and holes will
recombine, depending on the energy and type of the impinging radiation.
-Holes escaping recombination are relatively immobile and remain near the point of the generation
causing the initial negative threshold voltage shift.
24
Ionizing radiation in SiO2 and defect generation mechanisms (1)
(1) The initial negative threshold voltage shift described in the previous slide.
25
Ionizing radiation in SiO2 and defect generation mechanisms (2)
VG>0
-The transport of the holes to the SiO2/Si interface causes a short term recovery of the threshold
voltage: this process takes place over may decades of times and is very sensitive to the electric field,
temperature, oxide thickness and process history (<1 s at RT, orders of magnitudes slower at low
temperature).
26
Ionizing radiation in SiO2 and defect generation mechanisms (2)
(2) The short recovery of the initial negative threshold voltage shift, due to the transport
27
of holes to the SiO2/Si interface, described in the previous slide.
Ionizing radiation in SiO2 and defect generation mechanisms (3)
VG>0
-When holes are close to the SiO2/Si interface a fraction is trapped in relatively deep
long-lived trap sites. The trapped holes cause a remnant negative voltage shift which can persist for
hours or even for years. But even these stable trapped holes undergo a gradual annealing.
28
Ionizing radiation in SiO2 and defect generation mechanisms (3)
(3) The remnant negative threshold voltage shift due to hole trapping in deep long-lived
29
sites close to the SiO2/Si interface.
Ionizing radiation in SiO2 and defect generation mechanisms (4)
VG>0
-Generation of interface states at the SiO2/Si interface. These defects introduce energy levels in the
Si band-gap, whose occupancy depends on the Fermi level at the SiO2/Si interface, which in turn
depends on the applied gate voltage: consequently they cause a threshold voltage shift which varies
depending on the applied gate voltage.
-Interface states in the upper part of the band-up are acceptor (can trap electrons and are relevant for
n-MOSFET: VT increases).
-Interface states in the lower part of the band-up are donors (can emit electrons and are relevant
30 for
p-MOSFET: VT decreases).
Ionizing radiation in SiO2 and defect generation mechanisms (4)
(4) The positive threshold voltage shift due to interface states at the SiO2/Si interface in
n-MOSFET (VT decreases due to the contributions from the oxide charge, VT increases
31
due to the contributions from the interface states in the upper part of the band-gap
which are negative charged)
Ionizing radiation in SiO2 and defect generation mechanisms (4)
In n-MOSFET, the long-term
threshold voltage shift is positive
(rebound effect) due to negative
trapped charge in interface states.
14 orders of magnitude for time:
1 day: 8.6·104 s
1 month: 2.6 ·106 s
1 year: 3.15·107 s
32
Electron-hole pairs generation in SiO2
The mean energy to create and electron hole pair in SiO2 is: (17 ± 1) eV [1986].
The electron-holes pairs created in the volume of 1 cm3 by the dose of 1 rad is
8.1·1012. We define g0= 8.1·1012 e-h/(cm3·rad)
SiO2
N e  h  g 0  V  D  8.11012
eh
V  D
3
cm  rad
Dose (rad)
Volume (V)
eh
eh
12
N eh 

g

t

D

8
.
1

10
 tox  D
0
ox
2 
3
cm  rad
 cm 
33
Initial hole yield
-Ionizing radiation generates electron-hole pairs in SiO2.
-Electrons are swept out of the oxide very rapidly (1 ps or less), but in that time some
fraction of electrons recombine with holes.
-The fraction of holes surviving recombination depends on:
a) the magnitude of electric field in the oxide
(operative condition of the device);
b) the initial electron-hole pairs density in the oxide
(the LET of the impinging radiation or primary electrons).
N h  g 0  V  D  f ( Eox, Radiation )  8.1 1012
eh
 V  D  f ( Eox, Radiation )
cm 3  rad
eh
N eh 
 g 0  tox  D  f ( Eox , Radiation ) 
2 
 cm 
eh
12
 8.1 10
 tox  D  f ( Eox , Radiation )
3
cm  rad
34
Initial hole yield: geminate and columnar recombination models
Geminate recombination model (can be applied for electron and Co60 irradiation):
a) The average separation distance between electron-hole pairs is higher than the thermalization distance.
b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.
c) Electrons and holes drifts in opposite direction due to the electric field.
d) Electrons and holes moves randomly due to thermal fluctuations of the system.
c) The interactions with other electron-hole pairs can be neglected.
Columnar recombination model (can be applied for heavy ions (Z>1)):
a) The average separation distance between electron-hole pairs is lower than the thermalization distance: there
are several electrons closer to any given hole than the electron, which was its original partner.
b) The recombination probability is higher for the columnar model than for geminate model.
35
Initial hole yield: geminate recombination model
Geminate recombination model (can be applied for electron and Co60 irradiation):
a) The average separation distance between electron-hole pairs is higher than the termalization
distance.
b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.
c) Electrons and holes drifts in opposite direction due to the electric field.
d) Electrons and holes moves randomly due to thermal fluctuations of the system.
c) The interactions with other electron-hole pairs can be neglected.
V  E  d  1
MV
100 nm 
cm
106V
1
105 cm  10V
cm
-The fraction yield for holes . . . . . . by increasing the oxide electric field.
-The maximum value of the fraction yield for holes at 2.5 MV/cm is . . .
-At 1 MV/cm the fraction yield for holes is . . .
36
Initial hole yield: columnar recombination model
Columnar recombination model (can be applied for heavy ions (Z>1)):
a) The average separation distance between electron-hole pairs is lower than the termalization
distance: there are several electrons closer to any given hole than the electron, which was its
original partner.
b) The recombination probability is higher for the columnar model than for geminate model.
2 MeV  particle
B is the radius at half-maximum for the
Gaussian charge distribution of the 2 MeV
 particle: i.e. 1.178·.
V  E  d  1
MV
100 nm 
cm
106V
1
105 cm  10V
cm
-The fraction yield for holes . . . . . . by increasing the oxide electric field.
-The maximum value of the fraction yield for holes at 2.5 MV/cm is . . .
-At 1 MV/cm the fraction yield for holes is . . .
37
Initial hole yield for different radiations [1983]
Geminate
model
Intermediate condition
Co60 -rays and 10 keV X-ray
sources: which is the better
solution for radiation damage
due to electrons in Van Allen
Belts?
Columnar
model
Experimental values of the fractional yield for holes as a function of the oxide electric field for
38
different radiations
Initial hole yield for different radiations
The fractional yield for holes as a function of
the proton energy:
-at low proton energy: columnar model
-at high proton energy: geminate model
Linear Energy Transfer for different radiations
(values for 10 keV X-rays and Co60 -rays are for primary
electrons) [2002]:
- geminate model applied at low dE/dx;
- columnar model applied at high dE/dx;
-10 keV X-rays simulates 20-60 MeV protons;
- Co60 -rays simulates 1 MeV electrons;
39
Hole transport in SiO2 (1)
Hole transport occurs over many decade of times after the radiation pulse.
1) Changes in temperature does not charge the "S" shape of the recovery curve
(VFB vs time). At temperature higher than -130 ºC the hole transport is strongly temperature
activated.
1978
Flat band voltage variation after
irradiation as a function of time.
VFB (t )
VFB (0  )
Flat band voltage variation just
after the LINAC electron pulse.
-Oxide thickness:
tox=96.5 nm
-Radiation:
LINAC 12 MeV electron pulse (30 krad)
(geminate model)
-Oxide electric field:
1 MV/cm
40
16.6 min
Hole transport in SiO2 (2)
Hole transport occurs over many decade of times after the radiation pulse.
2) Changes in the oxide electric field does not charge the shape of the recovery curve (VT vs
time). The hole transport is activated by the oxide electric field.
1978
Flat band voltage variation after
irradiation as a function of time.
VFB (t )
VFB (0  )
Flat band voltage variation just
after the LINAC electron pulse.
-Oxide thickness:
tox=96.5 nm
-Radiation:
LINAC 12 MeV electron pulse (30 krad)
(geminate model)
-Temperature:
80 K
41
16.6 min
Hole transport in SiO2 (3)
Hole transport occurs over many decade of times after the radiation pulse.
3) Changes in the oxide thickness does not charge the shape of the recovery curve (VT vs
time) but the hole transport time has a super linear power law dependence on the oxide
thickness.
1978
tTR  c  (tox )
The "hole transit time" tTR is
the time at which:
VFB (t1/ 2 ) 1


VFB (0 ) 2
-Oxide thickness:
tox=96.5 nm
-Radiation:
LINAC 12 MeV electron pulse (30 krad)
(geminate model)
42
Hole transport in SiO2 (3)
Proposed mechanisms for hole transport in SiO2:
-Continuous-time-random-walk (CTRW) hopping (hopping of holes between localized shallow
trap states having a random spatial distribution, but having an average separation of about 1
nm);
-Multiple-trapping model.
1978
Flat band voltage variation after
irradiation as a function of time.
Eox=1 MV/cm
VFB (t )
VFB (0  )
Flat band voltage variation just
after the LINAC electron pulse.
-Oxide thickness:
tox=96.5 nm
-Radiation:
LINAC 12 MeV electron pulse (30 krad)
(geminate model)
The "S" shape of the recovery curve is . . .
The data can be fitted by . . .
The "hole recovery time" t1/2
is the time at which:
VFB (t1/ 2 ) 1


VFB (0 ) 2
43
5C. Radiation effects in SiO2:
microscopic considerations
44
Silicon oxide (SiO2)
-The silicon oxide used in microelectronic applications is composed by tetrahedral
SiO4 blocks, but they are irregular: the SiO2 structure is not crystalline but
amorphous (a-SiO2).
-The SiO4 blocks are connected by Si-O-Si bridging bonds, as shown in the
following figure, the corresponding formula is O3Si-O-SiO3. In a-SiO2, the Si-OSi bonds are strained: the angle between the oxygen and the two Si neighbours can
assume values between 120° and 180°.
Two tetrahedral SiO4 blocks and the oxygen bonding the two silicon atoms.
45
Microscopic defects in SiO2: the oxygen vacancy
-The oxygen vacancy (Vo) is a structure of fundamental importance for defect
studies in SiO2. The Vo defect is obtained by removing the oxygen bonding two Si
atoms, as shown in the following Figure.
-It is schematically represented by the formula: O3Si-SiO3. When the oxygen is
removed, the c-SiO2 structure relaxes: the two silicon atoms move to the oxygen
vacancy by near equal amount along the Si-O direction.
The oxygen vacancy density can be high up to 6·1019 cm-3, in oxides thermally
grown in oxygen reach atmosphere (dry oxide).
The SiO2 structure (left). The oxygen vacancy defect (right).
46
Hole trapping and annealing in SiO2
Holes are trapped close to the SiO2/Si interface because there is a transition region where
oxidation is not complete, this region contains excess Si atoms, i.e. "Oxygen vacancy defects".
(a) "Oxygen vacancy": a Silicon atom is back bonded to three Oxygen atoms and with a weak
bond to a Silicon atom.
(e)
(d)
47
Hole trapping and annealing in SiO2
(b) When a hole is trapped by a "Oxygen vacancy" the Si-Si bond is broken and the lattice
relaxes to the E’ center: the first Silicon atom is positive charged and back bonded to three
Oxygen atoms, the second Silicon atoms is neutral and back bonded to three Oxygen
atoms. The E’ center is a positively charge defects which is detectable by ESR (Electron
Spin Resonance).
(e)
(d)
48
The positive charge oxygen vacancy
-The bonding between the two Si atoms of the Vo defect can be broken by exciting
a bonding electron to the SiO2 conduction band or by hole trapping.
-The new defect, is called positive charged oxygen vacancy (Vo+). It is represented
by the chemical formula: O3Si°SiO3, where the symbols "" and "°" are the
unpaired electron and the trapped hole, respectively.
-The Vo+ center is positive charged (°SiO3) and paramagnetic (O3Si). It can be
characterized by the electron-spin-resonance (ESR) technique. The paramagnetic
part of the Vo+ defect is called E' center.
The positive charged oxygen vacancy defect. The arrow indicates the unpaired
electron of the neutral Si atom. The Vo+ defect is strongly correlated to the positive
charge induced by ionising radiation.
49
Hole trapping and annealing in SiO2
(c) Trapped holes are relatively stable but they can undergo a long-term annealing which can
extend from hours to years. The microscopic mechanism for the annealing of the trapped
hole: at room temperature is electron tunneling from the Si substrate and at higher
temperature is electron thermal excitation from the Si substrate valence band: an electron
can be trapped by the neutral Silicon atom back bonded to the three Oxygen atoms,
becoming negative and compensating the positive charge of the other Si atom back bonded
to three Oxygen atoms. This effects is enhanced for positive gate bias: VG>0 V.
(e)
VG>0
(d)
50
Hole trapping and annealing in SiO2
(d) Depending on the local microscopic strain of the two Si atoms, the weak Si-Si bond can be
reformed coming from (c) to (a): true annealing of the trapped holes.
(e) Depending on the local microscopic strain of the two Si atoms, the weak Si-Si bond can not
be reformed coming from (c) to (b) when a negative gate bias VG<0 is applied: neutral
electron
trap,
which
can
emit
the
trapped
electron
for
VG<0
(from (c) to (b)) and which can trap an electron for VG>0 (from (b) to (c)).
(e)
(d)
VG<0
51
-Oxide thickness:
tox= 45 nm
-Radiation source:
Co60 -rays
-Bias during irradiation
VGS=10 V
Vot
Hole trapping and annealing in SiO2
1984
(e)
VG>0
(d)
VG<0
52
Hole trapping and annealing in SiO2
Annealing of the midgap voltage variation
(Vmg ) for MOS capacitors. Vmg depends on
the oxide trapped charge:
-Vmg negative => positive oxide trapped
charge (Vmg decreases: positive trapped
charge increases; Vmg increases: positive
trapped charge decreases).
VG>0: Trapped hole annealing: electron tunneling from
the Si substrate, from (b) to (c).
(e)
VG>0
(d)
VG<0
VG<0: Si-Si weak bond reformation (true annealing of
the trapped holes) from (c) to (a); Reverse annealing
(electron tunneling back from neutral electron traps to
the Si substrate) from (c) to (b).
53
Hole trapping and annealing in SiO2
The neutral electron trap, which can be positive charged or neutral and are close to the SiO2/Si
interface are also called border traps.
MOS capacitor with p-substrate and VG>0. In the Figure are shown the interface states and the neutral
54
electron traps close to the SiO2/Si interface which can be positive charged or neutral.
Positive and negative charge trapping in SiO2
Oxigen vacancy
(D)
+h
hole trapping
o oo
Si
o
Si
o
o
electron redistribution
bond reformation
o oo
Si
o
Si
o
o
Oxigen vacancy
(A)
+h
hole trapping
o oo
Si
o
Si
o
+e
electron trapping
o oo
Si
o
o
Positive charged
oxygen vacancy
Si
o
Unstable state
not observed
(C)
o
electron redistribution
no bond reformation
(B)
+h
hole trapping
o oo
Si
o oo
Si
+e
electron trapping
o
Si
o
o
Neutral compensated defect
(E)
o
Si
o
o
Fixed negative charge
(F)
Oxygen vacancy (A). Positive charged oxygen vacancy (B). Unstable state (C).
Oxygen vacancy after bond reformation (D). Neutral compensated defect (E). Fixed
negative charge (F).
55
Interface states
Interface states are identified with the Pb0 center, i.e. a Si atom which is
back-bonded to three Si atoms and with a dangling bond.
This defect is amphoteric:
1) donor type in the lower part of the Si bandgap:
-if the Fermi level is higher than midgap the defect is neutral
-if the Fermi level is lower than midgap the defect emits an electron and
becomes positive charge (positive charge trapping relevant for p-MOSFET)
2) acceptor type in the upper part of the Si bandgap:
-if the Fermi level is higher than midgap the defect traps an electron and
becomes negative charged (negative charge trapping relevant for n-MOSFET)
-if the Fermi level is lower than midgap the defect is neutral.
56
Interface states
-The Pb center is a trivalent Si defect at the SiO2/Si interface: i.e., a silicon atom
bonded to three other Si atoms with an unpaired electron in an orbital pointing out
to a vacancy. It is represented by the chemical formula Si3Si.
-The Pb defect is amphoteric, that is its charge condition can be positive, negative
or neutral.
Pb: Si3Si  Pb- : Si3Si (acceptor)
qB
Pb: Si3Si  Pb+ : Si3Si°
(donor)
The donor (close circles) and acceptor (open circles) Pb centers
in the Si band-gap at midgap condition for a MOS on n-Si substrate.
57
Interface traps
-The Pb centers whose energy level is in the lower part of the Si band-gap are donor interface
states: at midgap they are neutral and paramagnetic (Pb: Si3Si), if the Fermi level in the Si
substrate moves to the Si valence band edge (Vg<0), they emit the trapped electron and
become positive charged and diamagnetic (Pb+: Si3Si).
-The Pb centers whose energy level is in the upper part of the Si band-gap are acceptor
interface states: at midgap they are neutral and paramagnetic (Pb: Si3Si), if the Fermi level
in the Si substrate moves to the Si conduction band edge, (Vg>0) they trap an electron from
the Si substrate and become negative charged and diamagnetic (Pb-:Si3Si ).
Pb: Si3Si  Pb- : Si3Si (acceptor)
qB
Pb: Si3Si  Pb+ : Si3Si°
(donor)
The donor (close circles) and acceptor (open circles) Pb centers
in the Si band-gap at midgap condition for a MOS on n-Si substrate.
58
Interface states
-When the SiO2 layer is grown at the SiO2/Si interface there are 1013 cm-3
Si atoms, each back-bonded to three Si atoms, with a dangling bond:
Si3Si, which are neutral interface states.
-In the subsequent processing, almost all these centers are passivated by reacting
with Hydrogen, which saturates the Si dangling bond: Si3Si H.
-However they can be depassivated by radiation and/or electrical stress giving rise
to neutral interface states: Si3Si.
-Two stage model for radiation induced interface states:
1) In SiO2, due to H2 atmosphere processing steps, neutral Hydrogen is present. In
the fist stage radiation induces holes cause positive hydrogen ions (protons) in the
oxide;
2) In the second stage, protons undergo hopping transport under positive gate bias,
and when they reach the SiO2/Si interface, they interact with the passivated trivalent
Si centers (Si3Si H)  (H) giving rise to an interface states and an Hydrogen
molecules (by capturing an electron): Si3Si  H2.
59
Defect classification in SiO2
-Location: oxide traps, border traps and interface traps
-Electrical behavior:
fixed states (positive and negative charge or neutral)
switching states (can exchange charge by tunneling)
Gate
tox
bulk contact
The MOS capacitor.
The classification of the defects in the SiO2/Si system,
depending on their location (a) and electrical behaviour (b).
60
Ionizing radiation in SiO2: summary
(a) Before irradiation.
(b) During irradiation: electrons and holes are
generated by ionizing radiation.
(c) Electrons are sweep out in picoseconds,
under Vg>0 holes slowly moves to the
SiO2/Si interface.
(d) Holes are trapped in SiO2 close to the
SiO2/Si interface. Interface states are created
at the SiO2/Si interface.
Effects of the positive oxide trapped charge and of
the charge trapped in the interface states on the
threshold
characteristics
of
p-MOSFET and n-MOSFET.
61
5D. The rebound effect in n-MOSFETs
and ELDRS in BJT
62
The rebound effect
Positive charge trapping: VT<0 (VT decreases)
Negative charge trapping: VT>0 (VT increases)
p-MOSFET
1) Oxide trapped charge is positive:
Vot contribution to VT=> VT<0
2) Positive trapped charge in interface states for p-MOSFET:
Vit contribution to VT=> VT<0
The two contributions have the same sign.
n-MOSFET
1) Oxide trapped charge is positive:
Vot contribution to VT=> VT<0
3) Negative trapped charge in interface states for n-MOSFET:
Vit contribution to VT=> VT>0
The two contributions have opposite sign.
63
The rebound effect
-Oxide thickness:
tox= 45 nm
-Radiation source:
Co60 -rays
-Bias during irradiation
VGS=10 V
1984
n-MOSFET
VT
1) Which is the trend for VT during irradiation and annealing?
2) Which is the trend for Vit during irradiation and annealing?
3) Which is the trend for Vot during irradiation and annealing?
4) Which is the effect of the annealing temperature increase on the oxide charge?
5) Which is the effect of the annealing temperature increase on the interface states?
64
The rebound effect
Interface state buildup occurs on time frames much slower than oxide charge build up.
Example in the figure: the time for reaching 50% build up is 35 s for the 5 pulse curve, but the
interface state buildup does not begin to saturate up to 105 s (27.8 hours).
Si bandgap 1.12 eV
-Oxide thickness:
tox= 47 nm
-Oxide electric field
1 MV/cm
-Pulse repetition rate:
4 Hz
Orders of magnitude for time:
1 day: 8.6·104 s
1 week: 6.05 · 105 s
1 month: 2.6 ·106 s
1 year: 3.15·107 s
Time after the end of the irradiation (s)
65
The rebound effect
1
VT  Vox  Vit  
Cox
Qit
0(Gate/ SiO2 Interface) ox ( x) xdx  Cox
tox( SiO2 / Si Interface)
At high dose rates, taking into account that: the interface state
buildup occurs on time frames much slower than oxide charge
buildup, Vox predominates on Vit:
in n-MOSFET Vox<0 predominates on Vit>0: VT<0
(Laboratory testing)
At low dose rates, taking into account that: the interface state
buildup occurs on time frames much slower than oxide charge
buildup, and the annealing of the positive oxide trapped charge,
Vit predominates on Vox :
in n-MOSFET Vit>0 predominates on Vox<0: VT>0
(Space environment)
At intermediate dose rates, taking into account that: the interface
state buildup occurs on time frames much slower than oxide charge
buildup, and the annealing of the positive oxide trapped charge,
Vit and Vox are comparable:
in n-MOSFET Vox>0 compensates Vit<0: VT0
Gate
0
tox
bulk contact
66
Apparent dose rate effects
1984
Intermediate dose rates:
In n-MOSFET compensation for the
contribution from
-Oxide positive trapped charge Vot
-Negative charge trapped in interface
states Vit>0
VT=Vot+Vit
Low dose rates:
n-MOSFET, failure due to
interface states
and negative charge trapping therein
VTVit>0
(at low dose rates, the oxide positive charge anneals)
High dose rates:
n-MOSFET, failure due to
oxide positive charge trapping
VTVot<0
(long times and proton transport is required67
for

interface state activation by SiSi H depassivation)
The rebound effect
In the space environments, electronic components are typically exposed to relative
low dose rates for very long mission times:
-the positive oxide trapped charge anneals;
-the interface states buildup.
In order to compare the radiation induced degradation by Laboratory testing (at high
dose rates) for prediction in the Space environments (low dose rates) after irradiation
devices are annealed at 100ºC for 1 week to anneal the positive oxide trapped
charge and to complete the interface state build-up.
68
ESA ESCC Basic Specification 22900
The rebound effect: 100º for 168 h (1 week): 100ºC is a compromise because this temperature is
not high enough to accelerate trapped hole annealing, but if one goes much higher temperature,
69
the interface states may anneal too.
Enhanced Low Dose Rate Sensitivity (ELDRS)
-La carica positiva intrappolata nell’ossido tra base ed emettitore causa un aumento dell’ampiezza della
regione di svuotamento nelle zone p/p- della base all’interfaccia SiO2/Si.
-Gli stati interfacciali all’interfaccia SiO2/Si dell’ossido tra base ed emettitore provocano un aumento
nella generazione di portatori della regione di svuotamento nelle zone p/p- della base all’interfaccia
SiO2/Si.
-La conseguenza è un aumento della corrente di base IB e quindi una diminuzione del parametro =IC/IB del
transistor.
-Tale effetto, che si manifesta a bassi ratei di dose (rad(SiO2)/s), viene chiamato "Enhanced Low Dose Rate
Sensitivity " (ELDRS) ed è particolarmente rilevante per i BJT in applicazioni spaziali.
Sezione di un BJT p-n-p
70
Enhanced Low Dose Rate Sensitivity (ELDRS)
In BJT technology the degradation induced by ionizing radiation, estimated by
Laboratory testing (high dose rates) even after the 100ºC annealing for 1 week,
underestimates the degradation induced by the Space environments (low dose
rates): Enhanced Low Dose Rate Sensitivity (ELDRS).
ELDRS is due positive charge trapping in the oxide which modify the oxide electric
field and the subsequent spatial distribution of the trapped holes (Space Charge
effects in the oxide) and lowering the annealing rates at low dose rates.
71
Apparent dose rate effects [opzionale]
1988
n-MOSFET or p-MOSFET?
-Oxide thickness:
tox= 60 nm
-Bias during irradiation
and annealing:
VGS=6 V
Vit is positive and iincreases with time:
-the interface states are positively or
negatively charged?
-the interface states density increases or
decreases?
-Identical samples were exposed to the same dose (100 krad), with the dose rate varied
over 11 orders of magnitude.
-The threshold voltage variation, due to the oxide positive trapped charge, as a function
of the total time (the sum of the irradiation time and of the annealing time) is the same.
72
Apparent dose rate effects [opzionale]
1988
n-MOSFET or p-MOSFET?
-Oxide thickness:
tox= 60 nm
-Radiation source:
Co60 -rays
-Bias during irradiation
and annealing:
VGS=6 V
Vot is negative and decreases with time:
-the oxide charge is positive/negative?
-the oxide charge decreases/increases?
-Identical samples were exposed to the same dose (100 krad), with the dose rate varied
over 11 orders of magnitude.
-The threshold voltage variation, due to the oxide positive trapped charge, as a function
of the total time (the sum of the irradiation time and of the annealing time) is the same.
73
Apparent dose rate effects [opzionale]
1988
n-MOSFET or p-MOSFET?
-Oxide thickness:
tox= 60 nm
-Radiation source:
Co60 -rays
-Bias during irradiation
and annealing:
VGS=6 V
-At high dose rates, the main contribution to
Vot is due to…
-At low dose rates, the main contribution to
Vot is due to…
A-t intermediate dose rates, the main
contribution to Vot is due to…
-Identical samples were exposed to the same dose (100 krad), with the dose rate varied
over 11 orders of magnitude.
-The threshold voltage variation as a function of the total time (the sum of the irradiation
time and of the annealing time) is the same.
74
Oxide hardening
Thermal oxidation of silicon is usually performed at high temperature
(800°C-1200°C): High Temperature Oxide layer (HTO):
Oxidant: a) water vapor (H2O: wet oxide); b) molecular oxygen (O2 dry oxide).
Si  2HO2  SiO2  H 2
Vox  tox
n
Si  O2  SiO2
Vit  tox
n
Wet oxides are more radiation hard for what concerns the positive oxide trapped charge.
No significant improvement appears for interface states.
75
Oxide hardening
High temperature annealing (>800ºC)
can cause a decrease in oxide
hardening for what concern the positive
oxide trapped charge.
Processing in H2 atmosphere after the
deposition of the polysilicon gate
material can cause a decrease in oxide
hardening for what concern the interface
states.
76
5E. Radiation Effects in thin oxide (<10 nm)
77
Device scaling
In the figures the VT for n-MOSFET produced by different commercial technologies (AMI
1.6 m, Orbit 1.2 m, HP 0.8 m, HP 0.5  m, HP 0.35 m, TSMC 0.25 m, TSMC 0.18 m)
is reported.
What can be observed?
Why it happens?
78
Device scaling
79
Device scaling
In 1985: gate oxide thickness: 100 nm
In 2005: gate oxide thickness: 10 nm
Vox  
1986
Qox
d
2
 Vox  ox  d ox
1
Cox
d ox
-The electron tunneling distance in SiO2 is 3 nm.
-In thin oxides (dox<20 nm), electron tunneling from
both gate/SiO2 and SiO2/Si interfaces eliminates or at
least neutralize trapped charge near the interfaces.
-For very thin oxides (dox<6 nm), the two tunneling
fronts meets in the center of the oxide layer, leaving
no positive oxide trapped charge.
-The problem of hardening gate oxides is basically
solved for what concerns positive charge trapping.
2
4 6
20
80
Device scaling
1) Electrons from Al and Si recombine with the trapped SiO2 positive charge
within 3 nm from the SiO2 interfaces.
2) SiO2 positive charge trapping is negligible for oxide thickness lower than 6 nm.
EC
Ef,m
+
+
+
+
+
+
Ef,Si
-
Ei
3 nm
3 nm
EV
Al
SiO2
Si
81
The conduction through SiO2 layers
Thick oxides
Oxide thickness
> 6 nm
Conduction mechanism
Fowler-Nordheim tunneling
Ultra-thin oxides
Oxide thickness
< 3 nm
Conduction mechanism
Direct tunneling
Thin oxides
Oxide thickness
< 6 nm and > 3 nm
Conduction mechanism
Trapped assisted tunneling
82
The conduction through thick (>3 nm) SiO2 layers
1) Electrons tunnel from gate to the SiO2 conduction band through the triangular potential
barrier and move in the SiO2 conduction band to the Si substrate.
2) The conduction mechanism through a triangular potential barrier is called FowlerNordheim (FN) tunnelling.
C
V<0
Ef,m
-
3 nm
Al
VAl<0
SiO2
Al
VSi=0
SiO2
Si
EC
Ef,Si
Ei
Si
+
EV
MOS capacitor with a negative gate voltage applied, and the corresponding band diagram
showing the Fowler-Nordheim conduction mechanism (right).
83
The conduction through thick (>3 nm) SiO2 layers
 B 
 | F |
 C
q2m
A= 
8 h C mox
J  A| FC | e
2
4 82 mox (qC )3/ 2
B= 
3
q
h2
10-3
Oxide
breakdown
|Ig| (Ampere)
Eox=120 V/200 nm=6 MV/cm
10-6
FN
region
10-9
10-12
0
20
40
60
80
100
|Vg| (Volt)
120
140
160
Fowler-Nordheim conduction through a 200 nm thick SiO2 layer.
84
The conduction through ultra-thin (<3 nm) SiO2 layers
-The direct tunnel effect is relevant for ultra-thin (<3 nm) SiO2 layers: electrons
tunnel from gate to the SiO2 conduction band through the trapezoidal potential
barrier directly to the Si substrate.
Is there any implication for technology and radiation hardness?
V<0
VAl<0
VSi=0
<3 nm
Al
Ef,m
EC
Ef,Si
Ei
-
SiO2
Si
EV
+
Al
SiO2
Si
MOS capacitor with a negative gate voltage applied, and the corresponding band diagram
showing the direct tunneling conduction mechanism (right).
85
The conduction through ultra-thin (<3 nm) SiO2 layers
The decrease in gate oxide thickness (<3 nm) for CMOS technology nodes under
100 nm has resulted in negligible radiation-induced charge trapping, but it also result in
increased gate-substrate tunneling current:
-increase in MOSFET off-state current and power dissipation;
-new materials with dielectric constant (K) higher than SiO2, so that, for a given gate
capacitance value, the thickness of the dielectric film can be increased, limiting the direct
tunneling current: Hf-O/SiO2/Si, Al2O3/SiOXNY/Si: which is the radiation hardness of these highK dielectric materials?
Nowadays research issues
Cox   0 SiO2
A
tox
Cdielectric   0 dielectric
A
tdielectric
86
The conduction through thin (3 nm<TSiO2<6 nm) SiO2 layers
1) The trap assisted tunneling (TAT) is the tunnel effect by a defect in the SiO2 layers. 2) TAT
is active at lower voltages than the Fowler-Nordheim (FN) conduction because TAT is through
a trapezoidal potential barrier, while FN is through a triangular potential barrier.
3) The electron tunneling distance is 3 nm: TAT cannot be observed for oxide thickness than 6
nm.
V<0
VAl<0
VSi=0
Oxide trap
6 nm
Al
Ef,m
EC
Ef,Si
Ei
-
SiO2
Si
EV
+
Al
SiO2
Si
MOS capacitor with a negative gate voltage applied, and the corresponding band diagram
showing the trapped assisted tunneling (TAT) conduction mechanism (right).
87
Radiation effects: gate oxides in deep submicron CMOS technologies
-The scaling down of contemporary CMOS technologies decreases the gate oxide thickness and the
threshold voltage variation after irradiation ....
.... but also new reliability issues for radiation hardness appears due to defect generation
in the SiO2 layer:
Radiation Induced Leakage Current (RILC);
Radiation Soft Breakdown (RSB);
Radiation Hard Breakdown (RHB).
2004
Gate current versus voltage (Ig-Vg) measured before and after irradiation of 3 nm oxide. The
curves referring to RILC have been measured after 51010 Si ions/cm2 (E=158 MeV, LET=8.5
MeVcm2/mg). The curve referring to RSB has been measured after 107 I ions/cm2 (E=277 MeV,
88
LET=61.8 MeVcm2/mg).
Radiation Induce Leakage Current (RILC)
The radiation induced leakage current (RILC) is an increase of the current through the SiO2 layer
due to an inelastic trap assisted tunneling by neutral defects generated by ionizing radiation (rays, electrons, protons, ions). The traps are distributed all over the oxide area.
1999
89
Radiation soft breakdown (RSB)
1) The radiation soft breakdown (RSB) is a huge increase of the current through the SiO2 layer due
to multi-trap assisted tunneling through a localized path of neutral defects generated by ionizing
radiation (mainly ions).
2) A single high LET ion strike is able to generate RSB along its high ionizing track.
RILC
RSB
RHB
RILC and RSB in 4 nm oxides
90
RILC and RSB
Oxide conduction
Oxide conduction
and RSB
Oxide conduction
and RILC
2001
91
Mobility degradation
Defects in SiO2 close to the SiO2/Si interface can also reduce the carrier mobility in
the channel by acting as scattering centers.
92
5F. Radiation effects due to positive charge
trapping in field oxides
93
Radiation induced field oxide leakage current in n-MOSFET
-Technology scaling down: decrease of the gate oxide thickness, but the field oxide of
advanced commercial technologies for are still relative thick and are soft to ionizing radiation. A
relatively small dose in field oxides (10 krad) can induce sufficient positive charge trapping to
cause field oxide induced IC failure.
-Field oxide thickness: 100 nm – 1000 nm.
-Field oxide are not produced only by thermal oxidation, but also by deposition techniques: the
trapping properties of field oxide may be poorly controlled.
-Field oxide isolation is performed by
a) Local oxidation of Silicon (LOCOS)
b) Shallow Trench Isolation (STI) in advance sub-micron technologies
94
CMP=Chemical Mechanical Polishing
Radiation induced field oxide leakage current in n-MOSFET
1) In n-MOSFETs with LOCOS isolation, the positive charge build-up in the birds’ beak regions
can invert the underlying p-type surface forming an n-type region underneath the filed oxide,
i.e. a conductive path can be generated from source to drain, which will greatly increase the
leakage current even at VGS=0V.
-Similar conductive path are generated for n-MOSFETs with STI isolation:
a) a leakage path occurs at the edge of the gate oxide transistor between the source and the
drain;
b) a leakage path occurs between the n-type source and drain regions of a n-MOSFET and the
n-well of adjacent p-MOSFET.
1)
b)
a)
1998
95
Radiation induced field oxide leakage current in n-MOSFET [op]
Ionizing radiation in the field oxide isolation structures, i.e. in the Local Oxidation of
Silicon (LOCOS), causes positive charge build-up in the bird’s beak region and in nMOSFET it turns on a parasitic lateral leakage paths from source to drain, even if
there is no channel formed under the gate.
Top view
LOCOS
1987
Lateral view
96
Radiation induced field oxide leakage current in n-MOSFET
The field oxide form a parasitic field oxide transistor
in parallel with the gate oxide transistor: the parasitic
field oxide transistor consists of the gate polysilicon,
a portion of the filed oxide and the source and drain
of the gate transistor
LOCOS
Parasitic field oxide transistor: large thickness of the
field oxide => high VT>0 before irradiation and high
VT<0 due to positive charge trapping after irradiation.
Contributions to the source-drain current in n-MOSFET with LOCOS isolation before and after
irradiation from:
-the channel under the gate oxide for the gate oxide transistor;
-the parasitic lateral channel under the LOCOS bird’s beak region for the parasitic field oxide 97
transistor.
Radiation induced field oxide leakage current in n-MOSFET
PA= Annealing: 1 week a 100ºC
VT is not a problem but …
300 k
100 k
ID(VG=0)
70 k
400 k
ID(VG=0)
300 k
After annealing . . .,
consequently is it a problem for Space?
98
PA= Annealing: 1 week a 100ºC
500 k
Radiation induced field oxide leakage current in n-MOSFET
Technology node: 130 nm (year: 2005)
New technology node: evaluation of its radiation hardness . . .
A continuous running to evaluate radiation hardness of new commercial technologies
99
Enhanced Low Dose Rate Sensitivity (ELDRS) in n-MOSFETs
In MOSFET technology, the degradation induced by ionizing radiation in field
oxides (LOCOS), inducing parasitic leakage current paths from source to drain,
estimated by Laboratory testing (high dose rates) even after the 100ºC annealing
for 1 week, underestimates the degradation induced by the Space environments
(low dose rates): Enhanced Low Dose Rate Sensitivity (ELDRS).
ELDRS is due positive charge trapping in the oxide which modify the oxide electric
field and the subsequent spatial distribution of the trapped holes (Space Charge
effects in the oxide) and lowering the annealing rates at low dose rates.
LOCOS
100
Radiation induced field oxide leakage current in n-MOSFET
The variation of the shallow insulator thickness at the
top corner of the trench can results in very high
oxide electric fields:
-reduction of the gate oxide integrity;
-anomalous humps in the sub-threshold Ids-Vgs
characteristic;
-limiting the radiation hardness: as the electric field
increases, the VT<0 amplitude for the parasitic field
oxide transistor increases;
-worst case condition "ON": VGS>0, VDS=VBS=0
STI
Vfb (red) and contributions from the positive
trapped oxide charge (Vox) and from the
interface
states
(Vit)
in
n-MOSFET, whose gate oxide has been
deposited, as for the field oxide in STI, as a
function of the electric field inside the oxide.
The electric field in the field oxide must be
kept lower than 1 MV/cm.
101
Radiation induced field oxide leakage current in n-MOSFET
LOCOS
How to solve this problem?
How to eliminate the parasitic leakage paths
from source to drain?
Parasitic leakage current path in a n-channel MOSFET transistor with LOCOS design for
the gate-field oxide structure due to charge trapping in the oxide (left) and effect on the
sub-threshold characteristics (right).
102
n-MOSFET leakage current path mitigation by enclosed layout
Solution: change the transistor topology from “Standard" to “Enclosed".
Standard layout: leakage current path between source and drain
Enclosed layout: no leakage current path between source and drain
103
Radiation induced field oxide leakage current in n-MOSFET
Enclosed layout transistor
Is it working?
104
Radiation induced field oxide leakage current in n-MOSFET
Enclosed layout transistor
Disadvantages:
1) area increases by a factor 3.2 for the minimum geometry transistor;
2) avoid sharp corners where the electric field can become large, resulting in undesiderable reliability
consequences;
3) which is the effective channel length? The electric field for carriers traversing the device near the
corners is variable.
4) Difficulties in modelling: requires the development of a custom cell library.
3) Increased gate and source/drain capacitance.
4) Are not symmetric devices: asymmetry in the output characteristics: dIds/Vds for a fixed Vgs is
higher for the drain inside configuration. Chosing the inner ring as drain minimize the drain area
and the drain to substrate capacitance.
105
Radiation induced field oxide leakage current in n-MOSFET
Effective channel lenght
Enclosed layout transistor
Real layout (0.25 m node)
=0.05
K=3.5 se L 0.5 m
K=4 se L>0.5 m
·L
c
Leff: gate length shortening due to under-diffusion,
lithography and etching
d
d’
106
Loss of interdevice isolation
n-well
n-MOSFET
Radiation induced hole trapping in thick isolation oxides can drive
the channel of parasitic n-type field oxide transistor into inversion (ON) resulting in
leakage between adjacent devices and a lack of isolation (n-well and n-MOSFET source)
Signal corruption
Additional supply current
Increase in rail voltage drop
How to solve this problem?
107
Loss of interdevice isolation
n-well
n-MOSFET
Radiation induced hole trapping in thick isolation oxides can drive
the channel of parasitic n-type field oxide transistor into inversion (ON) resulting in
leakage between adjacent devices and a lack of isolation (n-well and n-MOSFET source)
Cross-section of a CMOS process with a p+-channel stop implant designed into the isolation field oxide to mitigate
the loss of interdevice isolation due to ionizing radiation.
The p+-channel stop implant must surround each transistor: area penalty. It can be implemented in CMOS108
technology but the layout rules of the technology must be respected.
Loss of interdevice isolation
Development of ad-hoc test structures (transistor with a polysilicon gate over the field oxide
for isolation between the n-well and the source of the n-MOSFET)
Polysilicon gate
PA= Annealing: 1 week a 100ºC
After annealing . . .,
consequently is it a problem for Space?
109
5G. Radiation effects in
Silicon on Insulator (SOI) Technology
110
SOI Technology
CMOS Standard bulk technology
-SOI transistor are built on
top of an oxide instead of a
silicon substrate.
-SOI process technology is
similar to standard bulk
technology.
CMOS Silicon on Insulator Technology (SOI)
20-250 nm
350-400 nm
111
SOI Technology
Standard top gate transistor
How to measure
the Vds-Ids characteristic
of the back gate transistor
112
Parasitic back-gate transistor
SOI Technology
"Partially depleted" SOI technology: the depletion region under the top gate transistor does not
extend completely through the p+ body region, there is a non-depleted region between the top gate
and the back gate, the top gate transistor and the back gate transistor are not directly coupled, the p+
body region is floating, the top gate transistor characteristics are not directly affected by charge
buildup in the buried oxide. Silicon thickness: 100-250 nm
"Fully depleted" SOI technology: the depletion region under the top gate transistor extend
completely through the p+ body region, there is a fully depleted region between the top gate
and the back gate, the top gate transistor and the back gate transistor are directly coupled, the
top gate transistor characteristics are directly affected by charge buildup in the buried oxide.
Silicon thickness: 20-50 nm
Floating body region
113
SOI Technology
"Partially depleted" SOI technology: the depletion region under the top gate transistor does not
extend completely through the p+ body region, there is a non-depleted region between the top gate
and the back gate, the top gate transistor and the back gate transistor are not directly coupled, the p+
body region is floating, the top gate transistor characteristics are not directly affected by charge
buildup in the buried oxide. Silicon thickness: 100-250 nm
"Fully depleted" SOI technology: the depletion region under the top gate transistor extend
completely through the p+ body region, there is a fully depleted region between the top gate
and the back gate, the top gate transistor and the back gate transistor are directly coupled, the
top gate transistor characteristics are directly affected by charge buildup in the buried oxide.
Silicon thickness: 20-50 nm
114
SOI Technology
In SOI technologies the parts sensitive to the dose deposited by ionizing radiation are:
1) the gate oxide of the front-transistor (analogous to the bulk CMOS technology, and already
considered);
2) the field oxide of the Shallow Trench Isolation (analogous to the bulk CMOS technology,
and already considered);
3) the buried oxide of the parasitic back-transistor.
The positive charge trapped in the buried oxide of the parasitic back-transistor in
n-MOSFET can:
-invert the surface of the body region from p-type to n-type causing a parasitic leakage path from
the source to the drain of the top gate transistor;
-high VT<0 of the parasitic back-transistor (VT becomes negative) which is in the on condition
also for VBack Gate=0.
1999
115
SOI Technology
The positive charge trapped in the buried oxide of the parasitic back-transistor in
n-MOSFET can:
-invert the surface of the body region from p-type to n-type causing a parasitic leakage path from
the source to the drain of the top gate transistor;
-high VT<0 of the parasitic back-transistor (VT becomes negative) which is in the on condition
also for VBack Gate=0.
Parasitic back gate transistor
Top gate transistor (n-MOSFET)
2000
n-MOSFET, Unibond wafer, Co60 -ray irradiation, all terminals grounded during irradiation.
116
SOI Technology
SIMOX
(Separation by Implanted Oxygen)
(Unibond) Smart cut splitting
(a) Protons are implanted at
5·1016 cm-2 in Wafer A with
has a SiO2 surface layer.
(b) Wafer A is bonded on
Wafer B by using Van der
Waals Force.
(a) Deep O ion implantation
(b) High temperature annealing (1350 ºC)
to form theSiO2 deep layer
(c) The top Wafer is
removed
by
thermal
activation at 500ºC by
forming a cleavage plane.
Then
High
thermal
annealing and polishing.
High temperature processes cause O diffusion from the buried oxide, leaving oxide defects, which
117
can cause positive charge trapping due to ionizing radiation exposure.
SOI Technology
Technology node: 0.5 m
Oxide thickness for the front gate transistor: tox=12.5 nm
Shallow Trench Isolation
Unibond wafer
Buried oxide thickness: 400 nm
Partially depleted
Top silicon thickness: 185 nm
SIMOX wafer
Buried oxide thickness: 370 nm
Partially depleted
Top silicon thickness: 170 nm
2000
118
SOI Technology
Which is the best SOI substrate for radiation hardening?
(Minimum threshold voltage variation of the parasitic back gate transistor)
2000
n-MOSFET
0V
"0 V":
All terminal grounded
VS=VD=VG=VBody= 0V
"OFF" (Front gate n-MOSFET)
VD=VDD
All other terminals grounded
VS=VG=VBody= 0V
Answer . . . . . . . . . . . . .
....................
....................
Unibond=Smart cut technology by SOITEC
119
SOI Technology
Which is the worst case irradiation condition?
(Maximum threshold voltage variation of the parasitic back gate transistor)
Gate
Source Drain
Body
Substrate
Which is the picture For the "ON" condition?
The electric field lines are perpendicular to the equi-potential line: the electric field
is from points at high potential (red) to points at low potentials (blue)
120
SOI Technology
Which is the worst case irradiation condition?
(Maximum threshold voltage variation of the parasitic back gate transistor)
"TG" (Transmission bias condition):
VS=VD=VDD
VG=VBoby=0V
"OFF" (Front gate n-MOSFET)
VD=VDD
All other terminals grounded
VS=VG=VBody= 0V
"ON" (Front gate n-MOSFET)
VG=VDD
All other terminals grounded
VS=VD=VBody= 0V
Answer . . . . . . . . . . . . .
....................
....................
n-MOSFET, Unibond wafer, Co60 -ray irradiation, all terminals grounded during irradiation.
121
SOI Technology
"Fully depleted" SOI technology: the depletion region under the top gate transistor extend
completely through the p+ body region, there is a fully depleted region between the top gate
and the back gate, the top gate transistor and the back gate transistor are directly coupled, the
top gate transistor characteristics are directly affected by charge buildup in the buried oxide.
The positive charge trapped in the buried oxide of the parasitic back-transistor in
fully depleted n-type MOSFET can cause a decrease in the threshold voltage of the top gate transistor:
more sensitive to radiation than “Partially depleted" SOI devices.
In advanced "Fully depleted" SOI devices with gate length in the range of several tens of nanometers a
radiation-induced high current regime from source to drain can exist in floating body devices, both at
low and high drain voltages.
This high current regime is attributed to a floating body effects and is sometimes refereed to as "Total
dose latch" or "Total dose snap back effect".
An external body contact in the device prevents the onset of this high leakage current regime from
source to drain.
122
SOI Technology
source
N+
source
N+
drain
N+
p+ body
p+ body
drain
N+
p+ body
123
SOI Technology
Improving the radiation hardness of the buried oxide by technology by Silicon ion implantation.
-The Silicon ion implantation creates in the buried oxide electron traps, which can be filled during
irradiation by ionizing radiation, so compensating the positive trapped charge.
Improving the radiation hardness by new device layout.
-In the BUSFET (Body-Under-Source-Field-Effect-Transistor), the source penetrates only partially
through the top silicon layer, and is isolated from the buried oxide by the body silicon region which is
also contacted by the p+ body contact. The inverted n-type layer at the buried oxide surface can not
create a parasitic leakage path from source to drain.
SOI n-MOSFET without body contact
SOI n-BUSFET with body contact
124
Radiation-hard vs Commercial Technologies
Commercial vs Radiation-Hard technologies
(MIPS=Million of Instructions Per Second)
125
Test
126
Test: domande 1-5
1) Descrivi gli effetti della radiazione ionizzante (carica positiva intrappolata nell’ossido e
generazione di stati interfacciali) sulla caratteristica Ids-Vgs di un transistor MOSFET a
canale p e di un transistor MOSFET a canale n.
2) Dopo aver descritto l’effetto dell’annealing sulla carica positiva intrappolata
nell’ossido e sulla generazione di stati interfacciali per un MOSFET a canale n e per
un MOSFET a canale p, descrivi cosa si intende per effetto "Rebound" in un MOSFET a
canale n.
3) Descrivi dal punto di vista microscopico il modello per l’intrappolamento e l’annealing
della carica positiva nel SiO2 tenendo presente l’importanza della vacanza dell’ossigeno
e del centro E'. Descrivi dal punto di vista microscopico il modello per la generazione
degli stati interfacciali a partire dal centro Pb0 passivato dall’idrogeno.
4) Descrivi sinteticamente l’effetto ELDRS (Enhanced Low Dose Rate Sensitivity) nei BJT
5) Perchè con lo scaling down delle tecnologie, l’ossido di gate dei MOSFET diventa
intrinsecamente meno sensibile agli effetti da dose totale della radiazione ionizzante?
127
Test: domande 6-10
6) Quali sono le differenze tra la conduzione di Fowler-Nordheim, per tunneling assistito da
trappole e per tunneling diretto attraverso l’isolante SiO2, e per quali spessori di ossido
tali tipi di conduzione sono rilevanti?
7) Che cosa si intende per RILC, RSB, RHB?
8) Descrivi gli effetti del danno da dose totale indotti dalla radiazione ionizzante negli
ossidi di isolamento LOCOS dei MOSFET a canale n e le conseguenze sulle
caratteristiche Igs-Vds. Quali sono le tecniche di layout per prevenire tali effetti?
9) Descrivi gli effetti del danno da dose totale indotti dalla radiazione ionizzante negli
ossidi di isolamento tra dispositivi MOSFET. Quali sono le tecniche di layout per
prevenire tali effetti?
10) Dopo aver descritto le principali caratteristiche della tecnologia CMOS SOI,
evidenziando le differenze rispetto alla tecnologia CMOS Bulk, indica gli effetti da dose
totale indotti dalla radiazione ionizzante con particolare riguardo all’attivazione del
transistor parassita sul backside e alle tecniche di layout per prevenire l’attivazione di tale
transistor parassita.
128
Note
-Il materiale, la cui raccolta e organizzazione ha richiesto un notevole impegno, può
essere utilizzato liberamente per fini di studio e ricerca, se possibile citandone la
fonte e le referenze.
-Ringrazio tutti coloro che mi segnaleranno parti da correggere/migliorare.
129
Riassunto
130
Ionizing radiation in SiO2: p-MOSFET threshold voltage
VT<0: channel of holes
131
Ionizing radiation in SiO2: n-MOSFET threshold voltage
VT>0: channel of electrons
132
Ionizing radiation in SiO2 and defect generation mechanisms
14 orders of magnitude for time:
1 day: 8.6·104 s
1 week: 6.05 · 105 s
1 month: 2.6 ·106 s
1 year: 3.15·107 s
Initial hole yield: geminate and columnar recombination models
Geminate recombination model (can be applied for electron and Co60 irradiation):
a) The average separation distance between electron-hole pairs is higher than the thermalization distance.
b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.
c) Electrons and holes drifts in opposite direction due to the electric field.
d) Electrons and holes moves randomly due to thermal fluctuations of the system.
c) The interactions with other electron-hole pairs can be neglected.
Columnar recombination model (can be applied for heavy ions (Z>1)):
a) The average separation distance between electron-hole pairs is lower than the thermalization distance: there
are several electrons closer to any given hole than the electron, which was its original partner.
b) The recombination probability is higher for the columnar model than for geminate model.
134
Initial hole yield: geminate recombination model
Geminate recombination model (can be applied for electron and Co60 irradiation):
a) The average separation distance between electron-hole pairs is higher than the termalization
distance.
b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.
c) Electrons and holes drifts in opposite direction due to the electric field.
d) Electrons and holes moves randomly due to thermal fluctuations of the system.
c) The interactions with other electron-hole pairs can be neglected.
V  E  d  1
MV
100 nm 
cm
106V
1
105 cm  10V
cm
-The fraction yield for holes . . . . . . by increasing the oxide electric field.
-The maximum value of the fraction yield for holes at 2.5 MV/cm is . . .
-At 1 MV/cm the fraction yield for holes is . . .
135
Initial hole yield: columnar recombination model
Columnar recombination model (can be applied for heavy ions (Z>1)):
a) The average separation distance between electron-hole pairs is lower than the termalization
distance: there are several electrons closer to any given hole than the electron, which was its
original partner.
b) The recombination probability is higher for the columnar model than for geminate model.
2 MeV  particle
B is the radius at half-maximum for the
Gaussian charge distribution of the 2 MeV
 particle: i.e. 1.178·.
V  E  d  1
MV
100 nm 
cm
106V
1
105 cm  10V
cm
-The fraction yield for holes . . . . . . by increasing the oxide electric field.
-The maximum value of the fraction yield for holes at 2.5 MV/cm is . . .
-At 1 MV/cm the fraction yield for holes is . . .
136
Initial hole yield for different radiations
The fractional yield for holes as a function of
the proton energy:
-at low proton energy: columnar model
-at high proton energy: geminate model
Linear Energy Transfer for different radiations
(values for 10 keV X-rays and Co60 -rays are for primary
electrons) [2002]:
- geminate model applied at low dE/dx;
- columnar model applied at high dE/dx;
-10 keV X-rays simulates 20-60 MeV protons;
- Co60 -rays simulates 1 MeV electrons;
137
The positive charge oxygen vacancy
-The bonding between the two Si atoms of the Vo defect can be broken by exciting
a bonding electron to the SiO2 conduction band or by hole trapping.
-The new defect, is called positive charged oxygen vacancy (Vo+). It is represented
by the chemical formula: O3Si°SiO3, where the symbols "" and "°" are the
unpaired electron and the trapped hole, respectively.
-The Vo+ center is positive charged (°SiO3) and paramagnetic (O3Si). It can be
characterized by the electron-spin-resonance (ESR) technique. The paramagnetic
part of the Vo+ defect is called E' center.
The positive charged oxygen vacancy defect. The arrow indicates the unpaired
electron of the neutral Si atom. The Vo+ defect is strongly correlated to the positive
charge induced by ionising radiation.
138
Defect classification in SiO2
-Location: oxide traps, border traps and interface traps
-Electrical behavior:
fixed states (positive and negative charge or neutral)
switching states (can exchange charge by tunneling)
Gate
tox
bulk contact
The MOS capacitor.
The classification of the defects in the SiO2/Si system,
depending on their location (a) and electrical behaviour (b).
139
Interface states
-The Pb center is a trivalent Si defect at the SiO2/Si interface: i.e., a silicon atom
bonded to three other Si atoms with an unpaired electron in an orbital pointing out
to a vacancy. It is represented by the chemical formula Si3Si.
-The Pb defect is amphoteric, that is its charge condition can be positive, negative
or neutral.
Pb: Si3Si  Pb- : Si3Si (acceptor)
qB
Pb: Si3Si  Pb+ : Si3Si°
(donor)
The donor (close circles) and acceptor (open circles) Pb centers
in the Si band-gap at midgap condition for a MOS on n-Si substrate.
140
Ionizing radiation in SiO2: summary
(a) Before irradiation.
(b) During irradiation: electrons and holes are
generated by ionizing radiation.
(c) Electrons are sweep out in picoseconds,
under Vg>0 holes slowly moves to the
SiO2/Si interface.
(d) Holes are trapped in SiO2 close to the
SiO2/Si interface. Interface states are created
at the SiO2/Si interface.
Effects of the positive oxide trapped charge and of
the charge trapped in the interface states on the
threshold
characteristics
of
p-MOSFET and n-MOSFET.
141
Device scaling
142
The conduction through ultra-thin (<3 nm) SiO2 layers
-The direct tunnel effect is relevant for ultra-thin (<3 nm) SiO2 layers: electrons
tunnel from gate to the SiO2 conduction band through the trapezoidal potential
barrier directly to the Si substrate.
Is there any implication for technology and radiation hardness?
V<0
VAl<0
VSi=0
<3 nm
Al
Ef,m
EC
Ef,Si
Ei
-
SiO2
Si
EV
+
Al
SiO2
Si
MOS capacitor with a negative gate voltage applied, and the corresponding band diagram
143
showing the direct tunneling conduction mechanism (right).
The conduction through thin (3 nm<TSiO2<6 nm) SiO2 layers
1) The trap assisted tunneling (TAT) is the tunnel effect by a defect in the SiO2 layers. 2) TAT
is active at lower voltages than the Fowler-Nordheim (FN) conduction because TAT is through
a trapezoidal potential barrier, while FN is through a triangular potential barrier.
3) The electron tunneling distance is 3 nm: TAT cannot be observed for oxide thickness than 6
nm.
V<0
VAl<0
VSi=0
Oxide trap
6 nm
Al
Ef,m
EC
Ef,Si
Ei
-
SiO2
Si
EV
+
Al
SiO2
Si
MOS capacitor with a negative gate voltage applied, and the corresponding band diagram
144
showing the trapped assisted tunneling (TAT) conduction mechanism (right).
Radiation induced field oxide leakage current in n-MOSFET
The field oxide form a parasitic field oxide transistor
in parallel with the gate oxide transistor: the parasitic
field oxide transistor consists of the gate polysilicon,
a portion of the filed oxide and the source and drain
of the gate transistor
LOCOS
Parasitic field oxide transistor: large thickness of the
field oxide => high VT>0 before irradiation and high
VT<0 due to positive charge trapping after irradiation.
Contributions to the source-drain current in n-MOSFET with LOCOS isolation before and after
irradiation from:
-the channel under the gate oxide for the gate oxide transistor;
-the parasitic lateral channel under the LOCOS bird’s beak region for the parasitic field oxide 145
transistor.
Radiation induced field oxide leakage current in n-MOSFET
Enclosed layout transistor
Is it working?
146
SOI Technology
CMOS Standard bulk technology
-SOI transistor are built on
top of an oxide instead of a
silicon substrate.
-SOI process technology is
similar to standard bulk
technology.
CMOS Silicon on Insulator Technology (SOI)
20-250 nm
350-400 nm
147
SOI Technology
Standard top gate transistor
How to measure
the Vds-Ids characteristic
of the back gate transistor
148
Parasitic back-gate transistor
SOI Technology
In SOI technologies the parts sensitive to the dose deposited by ionizing radiation are:
1) the gate oxide of the front-transistor (analogous to the bulk CMOS technology, and already
considered);
2) the field oxide of the Shallow Trench Isolation (analogous to the bulk CMOS technology,
and already considered);
3) the buried oxide of the parasitic back-transistor.
The positive charge trapped in the buried oxide of the parasitic back-transistor in
n-MOSFET can:
-invert the surface of the body region from p-type to n-type causing a parasitic leakage path from
the source to the drain of the top gate transistor;
-high VT<0 of the parasitic back-transistor (VT becomes negative) which is in the on condition
also for VBack Gate=0.
1999
149
SOI Technology
Improving the radiation hardness of the buried oxide by technology by Silicon ion implantation.
-The Silicon ion implantation creates in the buried oxide electron traps, which can be filled during
irradiation by ionizing radiation, so compensating the positive trapped charge.
Improving the radiation hardness by new device layout.
-In the BUSFET (Body-Under-Source-Field-Effect-Transistor), the source penetrates only partially
through the top silicon layer, and is isolated from the buried oxide by the body silicon region which is
also contacted by the p+ body contact. The inverted n-type layer at the buried oxide surface can not
create a parasitic leakage path from source to drain.
SOI n-MOSFET without body contact
SOI n-BUSFET with body contact
150