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Course Outline CMPE328 Microprocessors (Spring 2008-09) Preliminaries and Introduction to Computing Credits: ( 4 / 1 / 0 ) 4 Prerequisites: CMPE224 Co-requisites: None 0- Introduction to computing: Inside the computer, CPU-RAM-ROM. 1- 80x86 microprocessor: short history, registers, 8086 assembly: mov and add instructions, program segments, logical and physical addresses, stack, push, pop, flag register, addressing modes. 2- Assembly Language Programming: Directives, .asm, .lst, .obj, .map, linking, and .exe files, control transfer instructions, data types and data definition. 3- Arithmetic Logic Instructions: unsigned multiplication and division, unsigned, signed, bcd, packed-bcd and ascii number conversion, rotate and shift instructions. 4- Bios and DOS programming: bios display and keyboard interrupts, int 21h dos function calls. 5- Macro definitions: mouse button and cursor position. 6- Signed Arithmetics: Shift, Rotate, and String Manipulations. 9- 8088 PC/XT expansion slot, 80286 and the ISA bus, Memory and memory interfacing: EPROM, SRAM and DRAM devices, address decoding circuits, 10- ISA bus memory interfacing. Memory mapped and Isolated I/O methods and device interfacing: ISA bus I/O address decoding and simple I/O ports, 11-12 Programmable Peripheral Interface 8255 and LED, 7-segment-display, switch, button, keypad, stepper motor interfacing. D/A converters, A/D converters. 17- Serial Data Communication and 8251 USART. 14- Hardware Interrupts: NMI and INTR pins, interrupt servicing and TSR programs. Lab 15%, Quiz 25%, MT 25%, Attendance 5%, Final 30%, Total 100% CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 2 Section 0.1 Preliminaries – 1 Preliminaries – 1b Introduction to computing (reading assignment) Introduction to computing (reading assignment) Numbering Systems Decimal and Binary number systems Example: Decimal-Binary and Binary-Decimal Conversion Hexadecimal System Unsigned numbers, Signed numbers, Sign-bit, and two’s complement operation. Addition and Subtraction with binary and hexadecimal numbers Overflow condition in signed arithmetics. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Decimal to Binary Conversion 3 Convert 2510 to binary. LSB Solution: 25 =12×2 + 1 12 = 6×2 + 0 6 = 3×2 + 0 3 = 1×2 + 1 MSB 1 = 0×2 + 1 Result is 2510= 110012. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 25 12 6 3 1 LSB 1 0 0 1 1 MSB 4 Preliminaries – 1c Preliminaries – 1d Introduction to computing (reading assignment) Introduction to computing (reading assignment) Decimal to Binary Conversion of Fractions Example: Convert 0.62510 to binary. Example: Solution: Convert 110010.1110102 to Hexadecimal. Solution: Split the binary number to 4-bit groups, starting from the binary-point. Complete the missing bits with zeros. 0 0 11 0010.1110 10 0 0 Æ 32.E816 . 0.625 1.250 1 Å MSB .500 0 1.0 1 .0 0 Å LSB Result is 0.62510= 0.10102 If a number has both integer and fraction parts, convert them separately and combine the results. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Binary to Hexadecimal Conversion. 5 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 6 Section 0.1 Preliminaries – 1e Arithmetic on Binary Numbers Introduction to computing (reading assignment) Carry to the Next Digit Hexadecimal to Decimal Conversion. Addition: 0+0=0, 0+1=1, 1+0=1, 1+1=1 1. Example: carry: 1 1 0 0 0 0 1 1 0 End Carry Convert 32.E816 to Decimal. Solution: 32.E816 = 3×16+2 + 14/16+8/256. = 50.90625 Dr.Mehmet Bodur, EMU-CMPE 7 01001011 + 11000001 = 1 00001100 Negation: For signed binary numbers CMPE328 Spring 2007-08 01001011 + 11000001 Complement – N = 2-complement of N. – 01100101 = 10011010 + 1 = 10011011 – 01101100 = 10010011 + 1 = 10011100 Subtraction: N – M = N + (– M) CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Copy Complement Copy Sign Bit 8 Section 0.1 Preliminaries – 2 Sign Bit and Overflow MSB of signed binary numbers is the sign bit. Negative numbers have Sign-bit=1. When adding two positive numbers, or two negative numbers, resulting sign may come out inconsistent to the operands. for 8-bit registers (-96) + (-106) Æ 10100000 + 10010110 = 1 00110110 Sign bit of result is positive Æ overflow. Example: Introduction to Computing (reading assignment) Coding of Numbers and Text Coding of Decimal Numbers Coding of Binary Numbers Dr.Mehmet Bodur, EMU-CMPE 9 ASCII coding: binary/decimal/hex ASCII Other Coding methods CMPE328 Spring 2007-08 8-bit, 16-bit, 32-bit numbers and sign bit Coding the text strings. Packed BCD and Unpacked BCD representation Coding of positions (Gray coding) CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Section 0.1 Preliminaries – 2b Introduction to Computing (reading assignment) Introduction to Computing (reading assignment) Packed BCD 120810 Æ 1208pBCD = 120816 = 0001 0010 0000 10002 each decimal digit occupies one nibble. Unpacked BCD Section 0.1 Preliminaries – 2a Coding of Decimal Numbers 10 120810 Æ 1208uBCD = 0102000816 = 00000001 00000010 00000000 000010002 each decimal digit occupies one byte. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 11 Coding of Numbers and Text ASCII coding of characters. Each character is coded by a single byte. Examples -0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -A -B -C -D -E -F “4” Æ 3416 . 2! " # $ % & ' ( ) * + , - . / 3- 0 1 2 3 4 5 6 7 8 9 : ; < = > ? “a” Æ 6116 . 4- @ A B C D E F G H I J K L M N O “A” Æ 4116 . 5- P Q R S T U V W X Y Z [ \ ] ^ 6- ` a b c d e f g h i j k l m n o “[“ Æ 5B16 . 7- p q r s t u v w x y z { | } → ← backspc Æ7F16 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 12 Section 0.1 Preliminaries – 2c Preliminaries – 2d Introduction to Computing (reading assignment) Introduction to computing (reading assignment) ASCII Coding of Numbers (for display and print) Binary/decimal/hex ASCII Example: Convert 50 to decimal and binary ASCII string. -0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -A -B -C -D -E -F Decimal Solution 2! " # $ % & ' ( ) * + , - . / 3- 0 1 2 3 4 5 6 7 8 9 : ; < = > ? “50”=353016 4- @ A B C D E F G H I J K L M N O Binary Solution 5- P Q R S T U V W X Y Z [ \ ] ^ 6- ` a b c d e f g h i j k l m n o “110010” = 7- p q r s t u v w x y z { | } → ← 31313030313016 Dr.Mehmet Bodur, EMU-CMPE CMPE328 Spring 2007-08 13 Gray coding. 0 Æ 0000, 1 Æ 0001, 2 Æ 0011, 3 Æ 0010, 4 Æ 0110, 5 Æ 0100, 6 Æ 0101, 7 Æ 0111, 8 Æ 1111, 9 Æ 1110, 10 Æ 1100, 11 Æ 1101, 12 Æ 1001, 13 Æ 1011, 14 Æ 1010, 15 Æ 1000, One bit changing at a time when counting up or down. It eliminates the transient glitches in counting. Mainly used in positional sensors. Dr.Mehmet Bodur, EMU-CMPE CMPE328 Spring 2007-08 14 Section 0.2 Preliminaries – 3 Preliminaries – 4 Introduction to computing (reading assignment) Introduction to computing (reading assignment) Inside the Computer Data types and registers Bit, Instruction Nibble, Byte, Word Internal Organization of Computers Inside CPU: Execution of Instructions Next Instruction is pointed by Program Counter. Program Address-bus, Control-bus Set Operations defined on Registers and Memory Locations. Mostly they are carried in ALU. Serial Instruction Decoder, Registers Arithmetic Logic Unit Internal Data/Address buses. Data-bus, Stored Program Concept Flow control: Jumps and Branches ALU condition is stored in Flags, CF, ZF, PF, OF Connects CPU, Memory and I/O devices CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 15 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 16 Section 0.2 Section 1.1 Preliminaries – 5 8086 Architecture – 1 Introduction to computing (reading assignment) How a CPU works Instruction is fetched from Memory Decoded by Instruction Decoder into control signals to determine the paths and operations for several clock cycles. Their instruction sets and register architecture are upward compatible (4004 programs run in 8008, etc.) They are typical Complex Instruction Set Computers Register to register move, Arithmetic Logic operations on Registers Move between Registers and Memory. Flow Control instructions: Jump and Branches Bit and Status manipulation instructions CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Evolution of Intel Processors 4004 Æ 8008 Æ8080 Æ8085 Æ 8086 Æ 8088 Æ 80186 Æ 80286Æ 80386 ... 17 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Section 1.2 Section 1.2 8086 Architecture – 2 16-bit 8-bit 8-bit Registers of 8086 General: AX, BX, CX, DX (AXÅAH:AL) Pointer: SP (stack) and BP (base) 16-bit, Index: SI (source) and DI (destination) 16-bit, Segment: CS, DS, SS and ES 16-bit, Program Counter: IP (instruction-ptr) 16-bit, Flags: FR register (CF, PF, AF, ZF, SF,TF, IF, DF, OF) Carry Parity CMPE328 Spring 2007-08 Zero Sign Dr.Mehmet Bodur, EMU-CMPE Overflow 19 18 8086 Architecture – 3 Internal Block Diagram of 8086 CPU registers CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 20 Section 1.2 Section 1.2 8086 Data Address Segmentation 16-bit Registers Æ 64k = 65536 locations Segmented Addressing Æ 20-bit = 1M locations. DS segment: 16-bit, it points the start of 64k data block Physical Address of a data at Logical Address DS:DATA1 is obtained by PAddr = 16×DS+DATA1 Example: DS contains 0100H, and DATA1 = 0123H, then Physical Address of DS:DATA1 is 01000 H + 0123 H = 01123 H in the Memory. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 21 8086 Code Address Segmentation CS segment: 16-bit, It points the start of 64k instruction code block Physical Address of the code to execute next is at CS:IP Æ PA = CS×10h + IP Example: CS and IP contain 0100H, and 4321H. Then, Physical Address of next instruction to be executed is 01000H + 4321H = 05321H in the Memory. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Section 1.3 and 2.1 Assembly Programming Format Assembly program source is a series of lines [label:] [mnemonic [operands] ] [;comments] Each line carries a label, a comment, a directive, or a program instruction. Directives defines symbols, macros, code placement and provides conditional assembly . Program instructions and directives are written in mnemonics and operands, Comments start after a semicolon “;”, and provide information for humans. Using symbolic names for registers and constants makes the program readable. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 23 22 Section 2.1 Assembly Programming Example Example Code .MODEL SMALL .STACK 64 .DATA DATA1 DB 52H DATA2 DB 29H SUM DB ? .CODE MAIN PROC FAR MOV AX,@DATA MOV DS,AX MOV AL,DATA1 MOV BL,DATA2 ADD AL,BL MOV SUM,AL MOV AH,4CH INT 21H MAIN ENDP END MAIN CMPE328 Spring 2007-08 Directives to assembler setting the type of the executable, its stack and data segments Data placed into Memory, in the Data Segment. Directive for the Start of Code Segment ;Program Entry ;Data Seg. Addr ;First Number ;2ND Number ; AL <- AL+BL ; SUM <- AL+BL ; return to DOS Program starts at this point. Comments start after a semicolon End of Program End of Assembly Source Dr.Mehmet Bodur, EMU-CMPE 24 Section 1.2 Section 1.2 MOV Instruction – 1 MOV Instruction – 2 Examples MOV destination, source copies the source into the destination. Examples of MOV instruction with 8-bit data Immediate values cannot be moved into segment registers (CS, DS, ES or SS). Only nonsegment registers can move into segment registers. 8-bit data can be moved between all registers, except the flag register FR. CMPE328 Spring 2007-08 of MOV instruction with 16-bit data Dr.Mehmet Bodur, EMU-CMPE 25 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 26 Section 1.2 MOV Instruction – 3 ILLEGAL MOV instructions Moving too large values into a register MOV CL, 3B7H ; immediate value larger than 8-bit MOV AX, 54321H ; immediate value over 16-bit Moving immediate value into a segment register MOV DS, 1020H ; not allowed MOV CS, 4321H ; not allowed MOV AX, 1020H ; immediate value goes into AX MOV DS, AX ; then it is moved into DS Register cannot moved into a value MOV 1234H, AX ; destination cannot be a value. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE ADD Instruction – 1 27 ADD destination, source Adds source onto destination. Examples Executing the code results AL = 25H+34H=59H. BL = 34H Register AX is called Accumulator, but ADD accepts all general purpose registers for source and destination. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 28 Flags after 8-bit ADD ADD effects CF, PF, AF, ZF, SF and OF. Flags after 16-bit ADD ADD instruction changes CF, PF, AF, ZF, SF and OF. Show how the flag register is affected by Solution: 1 Dr.Mehmet Bodur, EMU-CMPE CMPE328 Spring 2007-08 29 CMPE328 Spring 2007-08 Looping on Zero Flag ZF INC reg ; increments contents of reg. DEC reg ; decrements contents of reg. INC or DEC instructions effect zero flag ZF. JZ Label ; gives jump to Label on ZF=1. JNZ Label ; makes jump to Label on ZF=0. MOV CX, 1000 LOOP1000: DEC CX JNZ LOOP1000 loops for DEC CX and JNZ for 1000 times, making a small delay in execution. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 31 30 Looping on Zero Flag ZF Example: Dr.Mehmet Bodur, EMU-CMPE ZF is changed by DEC CX before the JNZ instruction tests it. CX is initially 5. After the fifth looping DEC CX makes CX = 0, and ZF=1. Consequently, JNZ ADD_LP does not result in a jump, and looping comes to end. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 32 Memory Organization A microprocessor system needs several kinds of memory devices. Only Memory (ROM) keeps data even if power turns off. BIOS and Boot up program shall stay in ROM. Read-Write Memory (RAM) is a large block of memory to load and execute the operating system and user programs, and to keep data before saving to the mass storage devices. Data in a RAM device is lost whenever power is turned off. Mass Storage Memory is peripheral memory system, usually interfaced through I/O ports, or external buses. Read CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 33 Memory System Addressing 8086 has 20-bit address space (=1024 kBytes). A 16-bit Instruction Register (IR) allows addressing 64k byte effective address range. A 16-bit Code Segment registers (CS) determine the start address of this 64k block. The same segmentation mechanism works also for data addressing, and for the stack CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 34 Section 1.5 8086 Stack Memory Organization in DOS – 2 CPU keeps the return addresses and temporary data in a section of Read-Write Memory. A stack pointer SP, and the stack-segment SS together form the physical address of the top-of-stack. Examples: PUSH AX stores AX into the stack. Let’s denote the initial contents of SP by SP0. After the execution of PUSH AX, Mem-Address(SS:[SP0] – 1) Å AH ; Mem-Address(SS:[SP0] – 2) Å AL ; SP Å SP – 2 (i.e., AX is saved to stack in little-endian convention, and stack pointer is decremented by 2. Stack has grown from higher addresses to lower addresses.) PC-DOS Operating system uses 640k Bytes main memory. A0000H to BFFFFH is reserved for video display. C0000H to FFFFFH is occupied by BIOS ROM. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 35 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 36 Section 1.5 Section 1.5 8086 Stack – 2 Example: Assume that SP=1236, AX=24B6, DI=85C2, and DX=5F93, show the contents of the stack after each of the following push instructions is executed. 8086 Stack – 3 Example POP AX restores AX from the stack, and shrinks the stack 2-bytes . PUSH AX PUSH DI PUSH DX If we denote the initial contents of SP by SP0. After the execution of POP AX, Even if not written explicitly an address AL Å SS:[SP0] ; denotes the contents of the addressed AH Å SS:[SP0] + 1 ; memory location SP Å SP + 2 (i.e., AX is restored from the stack in little-endian convention, and stack pointer is decremented by 2. Stack has shrunk from lower addresses to higher addresses.) CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 37 CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE Section 1.5 Section 1.6 8086 Stack – 4 Example: Assume that SP=18FA, AX=24B6, DI=85C2, and DX=5F93, show the contents of the stack after each of the following pop instructions is executed. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE POP CX POP DX POP BX 8086 Addressing Modes – 1 Register Immediate Direct Register Indirect Based Relative Indexed Relative Based Indexed Relative 39 38 CMPE328 Spring 2007-08 AL, AH, BX, DI, SP 0123H, 100, 10010100B [0123H] [BX] Memory [BX] + 12 Locations [DI] + 12 [BX] [DI ] + 4 Dr.Mehmet Bodur, EMU-CMPE 40 Section 1.6 8086 Addressing Modes – 2 Register Immediate Direct Register Indirect Based Relative Indexed Relative Based Indexed Relative CMPE328 Spring 2007-08 MOV AH, BL MOV AX, 0123H MOV DL, [0123H] MOV AL, [BX] MOV AL, [BX] + 12 MOV AL, [DI] + 12 MOV AL, [BX][DI] + 12 Dr.Mehmet Bodur, EMU-CMPE Register Addressing Registers are addressed by their names. Register names are keywords. Source Register Destination Register Examples MOV BX,DX ; copy the contents of DX into BX MOV ES,AX ; copy the contents of AX into ES Segment registers are loaded only through AX. ADD AL,BH ;add the contents of BH to the contents of AL Source and destination registers must match in size. Register name addresses the contents of that register. 41 CMPE328 Spring 2007-08 Immediate Addressing A constant is used as the source operand. This constant number is immediate in the instruction. Examples MOV CX,625 ; load the decimal value 625 into CX MOV BL,40H ; load 40H into BL. Use AX to load immediate numbers into a segment register. MOV AX,2550H ; load hexadecimal 2550 into AX MOV DS, AX ; move AX into DS. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 43 42 Direct Addressing Dr.Mehmet Bodur, EMU-CMPE A memory address is directly specified immediate in the instruction. Examples MOV DL, [2400] ; moves contents of DS:2400H into DL MOV AL,40H ; loads 40H into AL. MOV [2800], AL ; moves AL to location DS:2800H MOV AX,1234H ; loads the value 1234H into AX. MOV [2800], AX ; moves AX to location DS:2800H ; in the LITTLE ENDIAN convention, i.e., ; DS:2800H Å 34H , DS:2801H Å12H CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 44 Register Indirect Addressing A memory address is directly specified by a register instruction. Based Relative Addressing DSx10h+BX Examples MOV AL, [BX+10] ; DS:BX+10 Æ AL MOV AL, [BX]+10 ; DS:BX+10 Æ AL (alternate form) MOV CX, [BP]+4 ; SS:BP+ 4 Æ CL and ; SS:BP+ 5 Æ CH Examples MOV AL, [BX] ; moves contents of the memory location ; pointed by DS:BX into AL MOV [SI], AX ; DS:SI Å AL ; and ; DS:SI+1 ÅAH . Even if not written explicitly, an address denotes the contents of ; Byte ordering is Little Endian. the addressed memory Pointers BP and SP use the segment SS, BX uses DS. Byte ordering for words and double-words is Little Endian. BP+4 is called the effective address SS:BP+4 forms the physical address PA=SSx10h+BP+4 location CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 45 CMPE328 Spring 2007-08 A memory address is specified by an index register and a relative immediate address. Even if not written DI and SI are index registers. explicitly an address denotes the contents of the addressed Examples memory location MOV AL, [DI+10] ; DS:DI+10 Æ AL MOV AL, [SI]+10 ; DS:SI+10 Æ AL (alternate form) MOV CX, [DI]+4 ; DS:DI+4 Æ CL and ; DS:DI+5 Æ CH ; BX, DI and SI holds offset address, and uses DS. ; Byte ordering is Little Endian. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 46 A memory address is specified by an index register and a relative immediate address. DI and SI are index registers. Examples MOV CL, [BX] [DI]+8 ; DS:BX+DI+8 Æ CL MOV CL, [BX+DI+8] ; DS:BX+DI+8 Æ CL (alternate) MOV CX, [BP] [SI]+4 ; SS:BP+SI+4 Æ CL, SS:BP+SI+5 Æ CH ; Byte ordering is Little Endian. 47 Dr.Mehmet Bodur, EMU-CMPE Based Indexed Relative Addressing Indexed Relative Addressing A memory address is specified by a base register and a relative immediate address. BX and BP are the only base registers. By default, BP and SP uses SS. BX, DI and SI holds offset address, and uses DS. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 48 Section 1.6 Section 1.6 8086 Default Segments Even if not written explicitly an address denotes the contents of the addressed memory location Default Segments for addressing registers. CS DS SS Segment Registers: IP BX, SI, DI BP, SP Offset Registers Examples, MOV AL, [BX] ; AL <- DS:BX MOV AL, [BX]+16 ; AL <- DS:BX +16 MOV AX, [BP][SI]+24 ; AX <- SS:BP +SI +24 i.e., two bytes starting from the address (SS×10h+BP+SI+24) moves into AX in little-endian convention (Lower address carries LSB, higher keeps MSB). CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 8086 Segment Override Examples, MOV [0122H], AL MOV CS:[0122H], AL MOV AL, [BX] MOV AL, ES:[BX] MOV AL, [BX]+16 MOV AL, CS:[BX]+16 MOV AX, ES:[BP][SI]+24 MOV SS:[BX]+16, AH 49 CMPE328 Spring 2007-08 ; DS:0122H <- AL ; CS:0122H <- AL ; AL <- DS:BX ; AL <- ES:BX ; AL <- DS:BX+16 ; AL <- CS:BX+16 ; AX <- ES:BP +SI+24 ; SS:BX+16 <- AH Dr.Mehmet Bodur, EMU-CMPE Section 1.5 Section 1.5 8086 Segment Overlapping A segment points the starting address of a 64kBytes memory window. Three segments, CS for code, DS for data, and SS for stack, are usual components of physical addressing of programs. These segments can be fully or partially overlapping. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 51 50 8086 Segment Wrap-Around What happens to segment windows if DS=FF20? FF200 … FFFFF is the first section of segment window. 00000 … 0FF1F is the second section. This kind of segment splits are a result of segment wrap-around over 20-bit address space. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 52 Section 1.5 8086 Flag Register ALU Condition Flags (CF, PF, AF, ZF, SF, OF), and CPU Control Flags are collected in the Flag (or Status) Register. (See slides 29 and 30) Summary CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 53 We have seen the architecture of Intel processor family and the preliminary concepts for assembly programming. The addressing modes of Intel processors, the program segments, and operations on the stack are essential concepts in assembly programming. Next, we will see the tools for assembling a program, and write simple assembly programs. CMPE328 Spring 2007-08 Dr.Mehmet Bodur, EMU-CMPE 54