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US 20130343471A1
(19) United States
(12) Patent Application Publication (10) Pub. N0.: US 2013/0343471 A1
Suzuki et al.
(54)
(43) Pub. Date:
SIGNAL TRANSMISSION CIRCUIT, SIGNAL
(52)
Dec. 26, 2013
US. Cl.
TRANSMISSION SYSTEM, AND SIGNAL
CPC ...................................... .. H04B 3/02 (2013.01)
TRANSMISSION METHOD
USPC
........................................................ .. 375/257
(71) Applicant: FUJITSU LIMITED, KaWasaki-shi (JP)
(72) Inventors: Kosuke Suzuki, Ota (JP); Hirotaka
(57)
ABSTRACT
Tamura, Yokohama (JP)
(73) Assignee; FUJITSU LIMITED, Kawasaki_shi (JP)
A signal transmission circuit includes a driver circuit that
(21) Appl. No.: 13/888,031
includes complementary inverters, each of the complemen
tary inverters including a plurality of transistor sWitches, each
_
(22)
of the plurality of transistor sWitches including a pair of
Flled?
May 6a 2013
_
(30)
transistors, one of the pair of transistors operating in a satu
_
_
_
_
ration region and another of the pair of transistors operating in
Forelgn Apphcatlon Pnonty Data
Jun. 26, 2012
a triode region to cause a certain impedance, and that drives
(JP) ............................... .. 2012-143319
each Of‘he plurality “transistor Switches in accordance with
complementary signals so as to output complementary volt
publication Classi?cation
ages to a transmission line; and ?rst voltage sources that
supply operating voltages to the driver circuit so as to adjust
(51) Int. Cl.
amplitudes of the complementary voltages output from the
H04B 3/02
(2006.01)
driver circuit to the transmission line.
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Patent Application Publication
Dec. 26, 2013 Sheet 1 0f 19
US 2013/0343471 A1
10
FIG. 1
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Patent Application Publication
Dec. 26, 2013 Sheet 2 0f 19
16
TE?
u.<|l1I
vA
US 2013/0343471 A1
Patent Application Publication
Dec. 26, 2013 Sheet 3 0f 19
US 2013/0343471 A1
10
——Vdd
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Patent Application Publication
Dec. 26, 2013 Sheet 4 0f 19
|I|G_ 4A
-— Vdd, Vddtx
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US 2013/0343471 A1
G
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8
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FIG. 48
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Patent Application Publication
Dec. 26, 2013 Sheet 5 0f 19
FIG. 5
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VOLTAGE (Vd)
3Vdd
4
US 2013/0343471 A1
Patent Application Publication
Dec. 26, 2013 Sheet 6 0f 19
US 2013/0343471 A1
40
*Vdd
r’
TOR
32 r30
Vddtx
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26
VOLTAGE
—-- ADJUSTMENT
VOUi
Voutx
UNIT
\lsstx
TOR
\lrefS
34
14A
14B
14
Patent Application Publication
Dec. 26, 2013 Sheet 7 0f 19
US 2013/0343471 A1
FIG. 7
Vdd
56
as
IV
r’
74
72
Vrin (\IddtX-I-Vb)
w
V 10 U VS
LC awCHonwm D
m88m
14M
w
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mw7
UU6
80
6
Rref
xx
70
Vrefs
Patent Application Publication
Dec. 26, 2013 Sheet 9 0f 19
FIG. 9C
FIG. 95
FIG. 9A
US 2013/0343471 A1
FIG. 9D
FIG. 9E
(Q)
M1050
M1050‘
M1050
02
O
2
a‘ 100.0
B‘ 100.0
LU
EL
2
05 0
(V)
46.0
Vin Vin (V)
TT
(V)
FF
Vi'n Vvn (V)
Vim Vin (V)
Vb
85
PFNS
Vb
PSNF
Patent Application Publication
Dec. 26, 2013 Sheet 10 0f 19
Vdd
CP DAC
Vrefd
68
X/
80
74
72
2
RH‘; Vddtx66A
LOGIC
CIRCUIT
vout
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voutx
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r/
6
Rref
in
m
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{mm6 1/mv_ mmLre
Gm
mm
W
w
w
m
106
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Vrefs
US 2013/0343471 A1
Patent Application Publication
Dec. 26, 2013 Sheet 11 0f 19
US 2013/0343471 A1
102
110
vout———--—-—--—— I;
voutx
108
H
>
Op
Q +-—-—
Patent Application Publication
Dec. 26, 2013 Sheet 12 0f 19
US 2013/0343471 A1
Patent Application Publication
TO AL
Dec. 26, 2013 Sheet 13 0f 19
US 2013/0343471 A1
IMPEDANC OCDV
51’
.8
.3
E5
LOW
vb
HIGH (v)
(V)
HIGH
v9ut><
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VOLTAGE
I
l
l \
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l \
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l l
I \
\
\
\ l
\iout
LOW
V
LOW
vb
HIGH (V)
Patent Application Publication
Dec. 26, 2013 Sheet 14 0f 19
US 2013/0343471 A1
Vdd
FIG. 14
REGULATOR r124
Ci
120
~—— Vdd
20
r’
58
TOR
32
Vddtx
56
\(26 Voutx
Vout rim/5}“,
r1143
VOLTAGE
ADJUSTMENT
UNTT
Vsstx
TOR
refs
58
REGULATOR I’ 126
Patent Application Publication
Dec. 26, 2013 Sheet 15 0f 19
FIG. 15
Vrefd
68
80
Vdd {J
1A74
72
haIf
_
132A :
vout
Vddtx, Vsstx
LOG“;
CIRCUIT
voutx
32B
\lhalf
I06
Vrefs
6
78
k
70
Vrefs
US 2013/0343471 A1
Patent Application Publication
Dec. 26, 2013 Sheet 16 0f 19
US 2013/0343471 A1
FIG. 16
vout
\lddtx
144A
R5
Vrd
144B
{334
136A
>
R6
138
Vsstx
M
j
140
1368
§
142
\/
Patent Application Publication
Dec. 26, 2013 Sheet 17 0f 19
US 2013/0343471 A1
FIG. 17
(Q)
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23:2:
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Vb
I
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HIGH (V)
VFS :—_-;—;-_—=—..-:-==-r--P-'- - - - - - - - - - - - --a- ' - - - - - - -
Patent Application Publication
Dec. 26, 2013 Sheet 18 0f 19
US 2013/0343471 A1
FIG. 18
--Vdd
[50
4
——vdd
REGULATOR 11208
205
200
RE
204A
TOR
202
212
vddt
W
216, 216A
'
Vout
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Voutx
216, 2168
Vsst
206
1 REGULATOR [1210
RE
TOR
2
14
Patent Application Publication
Vin
Dec. 26, 2013 Sheet 19 0f 19
US 2013/0343471 A1
Vout
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