Download Class 3.1 MIPS Assembly Instructions. Formats

MIPS Assembly instructions
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MIPS Assembly instructions association with C
MIPS Assembly instructions representation in computer
o R, I, J – formats of instructions
o R,I – instructions full details
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Usage of MIPS instruction map.and the appendix A to find the binary code of instruction by name and
vice versa.
Textbook: P&H,5th ed. Ch.2.5. Representing Instructions in the computer.
Appendix A - MIPS R2000 Assembly Language . (A-45)
MIPS Assembly instructions association with C
MIPS Addition and Subtraction
Addition in Assembly
Example:
add
$s0,$s1,$s2
(in MIPS)
Equivalent to:
a =b +c
(in C)
where MIPS registers $s0,$s1,$s2 are associated with C variables a, b, c
Syntax of Instructions:
1 2,3,4
where:
1) operation by name
2) operand getting result (“destination”)
3) 1st operand for operation (“source1”)
4) 2nd operand for operation (“source2”)
Subtraction in Assembly
Example:
sub
$s3,$s4,$s5
(in MIPS)
Equivalent to:
d= e- f
(in C)
where MIPS registers $s3,$s4,$s5 are associated with C variables d, e, f
MIPS more complex Addition and Subtraction
How do the following C statement?
a = b + c + d - e;
Break into multiple instructions
add $t0, $s1, $s2
# temp = b + c
add $t0, $t0, $s3
# temp = temp + d
sub $s0, $t0, $s4
# a = temp - e
Notice: A single line of C may break up into several lines of MIPS.
MIPS more complex Addition and Subtraction
How do we do this?
f = (g + h) - (i + j);
Use intermediate temporary register!
add $t0,$s1,$s2
# temp = g + h
add $t1,$s3,$s4
# temp = i + j
sub $s0,$t0,$t1
# f=(g+h)-(i+j)
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Immediates
•
Addition and subtraction instructions above perform operations with
the registers but do not allow to setup values.
• There is need in special instructions to setup the registers with
desirable values.
• Immediates are numerical constants.
• There are special instructions for them.
• Add Immediate:
addi $s0,$s1,10
(in MIPS)
f = g + 10
(in C)
where MIPS registers $s0,$s1 are associated with C variables f, g
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•
The syntax is similar to add instruction, except that last argument is a
number instead of a register.
Register Zero
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•
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One particular immediate, the number zero (0), appears very often in
code.
So we define register zero ($0 or $zero) to always have the value 0; eg
add $s0,$s1,$zero
(in MIPS)
f=g
(in C)
where MIPS registers $s0,$s1 are associated with C variables f, g
As the $0 – $zero register is hard wired by hardware to 0 values all 32
bits then the below instruction will not do anything
add $zero,$zero,$s0
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MIPS Assembly instructions representation in MIPS computer
Textbook: P&H. Ch3,p118, Appendix A
The assembly program representation is closer to the computer hardware than the C program
however it cannot run directly on the computer hardware. The assembly program should be
translated to the machine language representation (numbers or bits) to be understood by
computer hardware and to run.
Von Neumann’s architecture principle
The program is represented in digital form in the computer’s memory, along with the data.
 Instructions are represented as bit patterns
 Entire programs can be stored in memory to be read or written just like data
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This representation simplifies the computer systems software and hardware.
o Memory technology for data also used for programs.
Everything has addresses
Since all instructions and data are stored in memory, everything has a memory address:
instructions, data.
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There is a special register to keep address of instruction being executed: “Program
Counter” (PC)
o This is a pointer to the memory address where the instruction resides.
o Intel calls it Instruction Address Pointer (IP).
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MIPS uses words for instructions representation
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All the simple operations MIPS does with memory, ALU and registers are done with the
word length data (32 bits).
RISC computers need simplicity so the MIPS instructions also are made to be 32 bits a word length.
32 bits are divided to fields
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To be able to represent MIPS all instructions by 32 bits word the instructions should be
somehow encoded
o They should have different patterns to distinguish them by Control Unit and to
decode them properly
o To simplify the hardware the instructions with similar behavior or requirements
are grouped in different groups.
o 32 bit word is divided into several fields to represent different instructions and
groups by appropriate pattern in appropriate field
o The fields amount in 32 bits varies for different groups of instructions depended
on the:
 Instruction type
 Operands amount
 Operands type
 Addresses length and type
Binary Instruction fields and formats
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Binary instruction each field tells processor something about instruction
We could define different fields for each instruction, but MIPS is based on simplicity, so
there are defined 3 basic types of instruction formats:
o I -format used for instructions with immediate values
o J -format used for jump instructions (j,jal)
o R –format used for all other instructions (Register Format)
Below is the general view of all 3 instruction groups formats.
All fields have names to be comfortable to refer to them.
The first field’s value – “operation code” – “opcode” - defines the format of instructions
and the remaining fields’ existence, amount and meaning.
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Register R-Format instructions
The instructions word 32 bits are divided into 6 fields of the following number of bits each:
6 + 5 + 5 + 5 + 5 + 6 = 32
opcode: partially specifies what instruction it is
Note: This number is equal to 0 for all R-Format instructions (except of some
special instructions).
funct: combined with opcode, this number exactly specifies the instruction
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rs (Source Register): generally used to specify register containing first operand
rt (Target Register): generally used to specify register containing second operand (note
that name is misleading)
rd (Destination Register): generally used to specify register which will receive result of
computation
Each register field is exactly 5 bits, which means that it can specify any unsigned
integer in the range 0-31. Each of these fields specifies one of the 32 registers by
number.
The word “generally” was used because there are exceptions.
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shamt: This field contains the amount a shift instruction will shift by. Shifting a 32-bit
word by more than 31 is useless, so this field is only 5 bits (so it can represent the
numbers 0-31).
This field is set to 0 in all but the shift instructions.
R-Format Example
MIPS Instruction:
opcode
funct
rd
rs
rt
shamt
add $8,$9,$10
=0
= 32
= 8 (destination)
= 9 (first operand)
= 10 (second operand)
= 0 (not a shift)
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This is machine language instruction – 0x012A 4020. It’s the representation of assembly
language instruction add $8, $9, $10 in binary form.
Here is another example of the same assembly instruction translation with different operands.
add
ALUop
$10,$8,$9
$8
$9
$10
opcode oprnd oprnd
add
dest ----- 2ndary
-- meaning of the fields
000000 01000 01001 01010 00000 100000
-- fields of the instruction
0000 0001 0000 1001 0101 0000 0010 0000
-- machine instruction in bits
0
1
0
9
5
0
2
0
-- machine instruction in hex
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Immediate operand I-Format instructions
To keep the MIPS structure simple it’s desirable to have less differences between different
groups of instruction formats.
So I-Format is partially consistent with R-format:
 First notice that, if instruction has immediate, then it uses at most 2 registers.
 5-bit field only represents numbers up to the value 31: immediates may be much
larger than this so we need more bits for immediate operands
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opcode: same as before except that, since there’s no funct field, opcode uniquely
specifies an instruction in I-format
This also answers question of why R-format has two 6-bit fields to identify instruction
instead of a single 12-bit field: in order to be consistent as possible with other formats
while leaving as much space as possible for immediate field.
rs: specifies a register operand (if there is one)
rt: specifies register which will receive result of computation (this is why it’s called the
target register “rt”) or other operand for some instructions.
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Comparison of R and I type formats:
There is provided as much consistency as possible between two formats.
add
$10,$8,$9
ALUop
$8
$9
$10
add
opcode oprnd oprnd dest ----- 2ndary
000000 01000 01001 01010 00000 100000
0000 0001 0000 1001 0101 0000 0010 0000
0
1
0
9
5
0
2
0
addi $8,$0,10
addi
$0
$8
0
0
0
a
opcode oprnd dest immediate operand
001000 00000 01000 0000 0000 0000 1010
0010 0000 0000 1000 0000 0000 0000 1010
2
0
0
8
0
0
0
A
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This is a table of MIPS all instructions from Appendix A of the textbook.
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This is an example how to find the needed instruction format from Appendix A.
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