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Article Microwave Annealing for NiSiGe Schottky Junction on SiGe P-Channel Yu-Hsien Lin 1, *, Yi-He Tsai 1 , Chung-Chun Hsu 2 , Guang-Li Luo 3 , Yao-Jen Lee 3 and Chao-Hsin Chien 2,3 Received: 10 September 2015 ; Accepted: 5 November 2015 ; Published: 10 November 2015 Academic Editor: Jung Ho Je 1 2 3 * Department of Electronic Engineering, National United University, Miaoli 36003, Taiwan; [email protected] Department of Electronics Engineering and Institute of Electronics, National Chiao-Tung University, Hsinchu 30010, Taiwan; [email protected] (C.-C.H.); [email protected] (C.-H.C.) National Nano Device Laboratories, Hsinchu 30010, Taiwan; [email protected] (G.-L.L.); [email protected] (Y.-J.L.) Correspondence: [email protected]; Tel.: +886-3-738-2533; Fax: +886-3-736-2809 Abstract: In this paper, we demonstrated the shallow NiSiGe Schottky junction on the SiGe P-channel by using low-temperature microwave annealing. The NiSiGe/n-Si Schottky junction was formed for the Si-capped/SiGe multi-layer structure on an n-Si substrate (Si/Si0.57 Ge0.43 /Si) through microwave annealing (MWA) ranging from 200 to 470 ˝ C for 150 s in N2 ambient. MWA has the advantage of being diffusion-less during activation, having a low-temperature process, have a lower junction leakage current, and having low sheet resistance (Rs) and contact resistivity. In our study, a 20 nm NiSiGe Schottky junction was formed by TEM and XRD analysis at MWA 390 ˝ C. The NiSiGe/n-Si Schottky junction exhibits the highest forward/reverse current (ION /IOFF ) ratio of ~3 ˆ 105 . The low temperature MWA is a very promising thermal process technology for NiSiGe Schottky junction manufacturing. Keywords: germanium; microwave annealing; NiSiGe; Schottky junction 1. Introduction As the devices are being continuously scaled down for logic circuits, higher mobility channel materials such as Ge or SiGe have been considered to boost the driving current [1–5]. However, most high mobility materials have a significantly smaller bandgap as compared to Si, which will result in a higher band-to-band tunneling leakage. Therefore, S/D (Source/Drain) and channel engineering must play leading roles for boosting device performance. First, the parasitic series resistance should be reduced. The low dopant solid solubility in Ge results in the large S/D series resistance. A large S/D series resistance can be restrained by introducing metal germanide S/D. Second, the shallow junction is needed. The interface between the metal and the semiconductor is abrupt and can be easily governed by the reactant metal thickness and the process thermal budget, which indicates a high potential for scalability [6]. Third, simpler device fabrication could be achieved for the Schottky device without ion implantations and the high temperature annealing for dopant activation [7,8]. NiSiGe is the most promising candidate due to its low resistivity for the junction contact [9–12]. For reducing the thickness of the NiSiGe layer of the Schottky junction, the process temperature needs to be reduced. However, a lower process temperature results in a higher NiSiGe resistance due to the small crystallite size of the NiSiGe layer. These are the major challenges of scaling Ge CMOS (Complementary Metal-Oxide-Semiconductor) into nanoscale devices. Therefore, in order to avoid the dopant diffusion effect, which is dominant at high annealing temperatures, Materials 2015, 8, 7519–7523; doi:10.3390/ma8115403 www.mdpi.com/journal/materials Materials 2015, 8, page–page Materials 2015, 8, 7519–7523 avoid the dopant diffusion effect, which is dominant at high annealing temperatures, low‐temperature annealing with microwave excitation appears to offer a promising microwave annealing (MWA) low-temperature annealing with microwave excitation appears to offer a promising microwave process that may be an alternative to other rapid thermal processing methods in silicon annealing (MWA) process that may be an alternative to other rapid thermal processing methods in Materials 2015, 8, page–page processing [13–15]. Microwaves could repair the damage in the Schottky junction formation and silicon processing [13–15]. Microwaves could repair the damage in the Schottky junction formation avoid the dopant diffusion effect, which is dominant at high annealing temperatures, low‐temperature provide the lower leakage current for the Schottky junction device. and provide the lower leakage current for the Schottky junction device. annealing with we microwave appears to offer junction a promising microwave annealing annealing (MWA) in In this paper, we propose a NiSiGe/n‐Si Schottky junction formed by microwave annealing in In this paper, propose excitation a NiSiGe/n-Si Schottky formed by microwave process that may be an alternative to other rapid thermal processing methods in silicon the Si-capped Si‐capped SiGe Schottky junction devices (Si/Si xGe /Si, x shallow junction junction with aa the SiGe Schottky junction devices (Si/Si x = = 0~1). 0~1). The The shallow with x Ge 1´1‐x x /Si, processing [13–15]. Microwaves could repair the damage in the Schottky junction formation and eff 20 nm depth has been fabricated with a high effective barrier height (φeff ) and low leakage current in 20 nm depth has been fabricated with a high effective barrier height ( ) and low leakage current B B provide the lower leakage current for the Schottky junction device. the devices. in the devices. In this paper, we propose a NiSiGe/n‐Si Schottky junction formed by microwave annealing in the Si‐capped SiGe Schottky junction devices (Si/SixGe1‐x/Si, x = 0~1). The shallow junction with a 2.2. Experimental Section Experimental Section 20 nm depth has been fabricated with a high effective barrier height ( eff B ) and low leakage current Figure 1 shows the schematic diagram and process flow of fabricating the NiSiGe/n-Si Schottky in the devices. Figure 1 shows the schematic diagram and process flow of fabricating the NiSiGe/n‐Si Schottky junction structure. The Schottky junction devices were fabricated on a four-inch silicon wafer. junction structure. The Schottky junction devices were fabricated on a four‐inch silicon wafer. The 2. Experimental Section The multi-layer structure of Si/Si 0.57 Ge0.43 (1 nm/2 nm/n-Si) was grown by an ultra-high vacuum multi‐layer structure of Si/Si 0.57Ge0.43 (1 nm/2 nm/n‐Si) was grown by an ultra‐high vacuum chemical chemical vapor deposition system (UHVCVD, CANON ANELVA Corporation (Kanagawa, Japan)) Figure 1 shows the schematic diagram and process flow of fabricating the NiSiGe/n‐Si Schottky vapor deposition system (UHVCVD, CANON ANELVA Corporation (Kanagawa, Japan)) on an on anjunction structure. The Schottky junction devices were fabricated on a four‐inch silicon wafer. The n-type Si substrate. The channel was composed of a 1-nm-thick Si cap and a 2-nm-thick n‐type Si substrate. The channel was composed of a 1‐nm‐thick Si cap and a 2‐nm‐thick SiGe layer multi‐layer structure of Si/Si 0.57Ge0.43strain (1 nm/2 nm/n‐Si) was grown by an ultra‐high vacuum chemical SiGe layer with biaxial compressive and was grown at 420–500 ˝ C and 550 ˝ C, respectively. with biaxial compressive strain and was grown at 420–500 °C and 550 °C, respectively. The isolation vapor deposition system CANON ANELVA Corporation (Kanagawa, after Japan)) on surface an The filmSiO of 420 nm (UHVCVD, SiO2 was deposited on the multi-layer architecture series film isolation of 420 nm 2 was deposited on the multi‐layer architecture after series surface cleaning. n‐type Si substrate. The channel was composed of a 1‐nm‐thick Si cap and a 2‐nm‐thick SiGe layer cleaning. Then, the definition of the junction active area was accomplished with lithography and Then, the definition of the junction active area was accomplished with lithography and wet‐etching. with biaxial compressive strain and was grown at 420–500 °C and 550 °C, respectively. The isolation wet-etching. Because of the bulk annealing characteristics of the microwave, the technique was Because of the bulk annealing characteristics of the microwave, the technique was utilized to form film of 420 nm SiO2 was deposited on the multi‐layer architecture after series surface cleaning. ˝ for 150 s utilized to NiSiGe asSchottky a low-leakage Schottky junction ranging from for 200150 to 470 NiSiGe as form a low‐leakage junction ranging from 200 to 470 °C s in C N2 ambient. Then, the definition of the junction active area was accomplished with lithography and wet‐etching. inThe un‐reacted Ni film was removed, followed by Al deposition as the back contact. N2Because of the bulk annealing characteristics of the microwave, the technique was utilized to form ambient. The un-reacted Ni film was removed, followed by Al deposition as the back contact. NiSiGe as a low‐leakage Schottky junction ranging from 200 to 470 °C for 150 s in N2 ambient. The un‐reacted Ni film was removed, followed by Al deposition as the back contact. •UHVCVD Si/SiGe (~1 / ~2nm) on n-Si Al SiO2 SiO2 Al SiGe SiGe SiO2 SiGe SiO2 NiSiGe SiGe SiGe NiSiGe SiGe (100) n-Si (100) Al n-Si •DHF(HF:H2O = 1:20) surface treatment •PECVD @ SiO2 (~1 (420 nm) on n-Si •UHVCVD Si/SiGe / ~2nm) •Electrode2patterning by lithography O = 1:20) surface treatment and •DHF(HF:H wet etch •PECVD @ SiO2 (420 nm) •Sputter @ Ni (10 nm) and lift-offand •Electrode patterning by lithography wet etch •Microwave Annealing (Splits) •Sputter @ Ni (10 nm) and lift-off •Backside contact (Al) •Microwave Annealing (Splits) •Backside contact (Al) Al Figure 1. Schematic diagram and process flow of fabricating the NiSiGe/n‐Si Schottky junction structure. Figure 1. Schematic diagram and process flow of fabricating the NiSiGe/n-Si Schottky junction structure. Figure 1. Schematic diagram and process flow of fabricating the NiSiGe/n‐Si Schottky junction structure. 3.3. Results and Discussion Results and Discussion 3. Results and Discussion Figure 2 shows the high resolution TEM images of an approximately 1 nm/2 nm Si/SiGe film Figure 2 shows the high resolution TEM images of an approximately 1 nm/2 nm Si/SiGe film for Figure 2 shows the high resolution TEM images of an approximately 1 nm/2 nm Si/SiGe film for multi-layer the multi‐layer Si/Si 0.57 Ge 0.43/n‐Si structure before MWA. The SiGe/Si lattice interface image the Si/Si0.57 Ge /n-Si structure before MWA. The SiGe/Si lattice interface image shows 0.43 for the multi‐layer Si/Si 0.57Ge0.43/n‐Si structure before MWA. The SiGe/Si lattice interface image ˝ shows the good polycrystalline The inset figure shows NiSiGe film MWA the good polycrystalline structure.structure. The insetThe figure shows the NiSiGe film after at 390 shows the good polycrystalline structure. inset figure shows the the NiSiGe film MWA after after MWA at C. Aat 390 °C. A 20‐nm relative uniformity of the NiSiGe film and a distinct interface between the NiSiGe 20-nm relative uniformity of the NiSiGe film and a distinct interface between the NiSiGe and Si could 390 °C. A 20‐nm relative uniformity of the NiSiGe film and a distinct interface between the NiSiGe and Si could be observed. be observed. and Si could be observed. Si Si Cap Cap NiSiGe SiGe NiSiGe SiGe n-Si n-Si in the Si/SiGe/n‐Si Figure 2. The cross‐sectional TEM images show the polycrystalline structure Figure 2. The cross-sectional TEM images show the polycrystalline structure in the Si/SiGe/n-Si lattice interface image. The inset figure shows the NiSiGe Schottky junction through MWA at 390 °C. Figure 2. The cross‐sectional TEM images show the polycrystalline structure in the Si/SiGe/n‐Si lattice interface image. The inset figure shows the NiSiGe Schottky junction through MWA at 390 ˝ C. lattice interface image. The inset figure shows the NiSiGe Schottky junction through MWA at 390 °C. 2 2 7520 Materials 2015, 8, 7519–7523 Materials 2015, 8, page–page Materials 2015, 8, page–page The result the grazing incidence of X-ray diffraction (GIXRD) analysisanalysis was shown Figure in 3. The result ofof the grazing incidence of X‐ray diffraction (GIXRD) was inshown From this figure, the descriptions of power 0.5, power 2, power 4 are 300 W, 1200 W, 2400 W, The From result this of the grazing incidence of was in Figure 3. figure, the descriptions of X‐ray power diffraction 0.5, power (GIXRD) 2, power analysis 4 are 300 W, shown 1200 W, ˝ C, respectively. thethe temperature measurements the above splits 200 are Figure 3. respectively. From Moreover, this figure, descriptions of power 0.5, of power 2, 4 are 300 are W, 1200 W, 2400 W, Moreover, the temperature measurements of power the power above power splits ˝ C, and 470 ˝ C, respectively. Many peaks are shown, which correspond to the crystalline nickel 390 2400 W, respectively. Moreover, the temperature measurements of the above power splits are 200 °C, 390 °C, and 470 °C, respectively. Many peaks are shown, which correspond to the crystalline monogermanide; implementing 390 ˝ C for MWA sufficient to form polycrystalline NiGe and 200 °C, 390 °C, and 470 °C, respectively. Many peaks are shown, which correspond to the crystalline nickel monogermanide; implementing 390 150 °C sfor 150 is s MWA is sufficient to form polycrystalline NiSiGe. The peaks The corresponding to (011), (112), and NiSi and (111) NiSiGe were nickel and monogermanide; implementing 390 (200), °C to for 150 (200), s (211), MWA is (020) sufficient to form polycrystalline NiGe NiSiGe. peaks corresponding (011), (112), (211), and (020) NiSi and (111) ˝ C for 150 s was sufficient to form the NiSi and clearly identified [16]. Performing the MWA at 390 NiGe and NiSiGe. The peaks corresponding to (011), (200), (112), (211), and (020) NiSi and (111) NiSiGe were clearly identified [16]. Performing the MWA at 390 °C for 150 s was sufficient to form NiSiGe phase for forming the Schottky junction. NiSiGe were clearly identified [16]. Performing the MWA at 390 °C for 150 s was sufficient to form the NiSi and NiSiGe phase for forming the Schottky junction. the NiSi and NiSiGe phase for forming the Schottky junction. Figure 3. The GIXRD spectra for MWA with different power splits, confirming the NiSiGe formation. Figure 3. The GIXRD spectra for MWA with different power splits, confirming the NiSiGe formation. Figure 3. The GIXRD spectra for MWA with different power splits, confirming the NiSiGe formation. Figure 4 shows the I–V characteristics of the fabricated NiSiGe/n‐Si Schottky junction; the Figure 44 shows the of fabricated NiSiGe/n-Si Schottky junction; Figure shows the I–V I–V characteristics characteristics of the the fabricated NiSiGe/n‐Si Schottky junction; the NiSiGe formation during MWA conditions was at 200 °C, 330 °C, 390 °C, ˝420 °C, and 470 °C the for ˝ ˝ ˝ ˝ NiSiGe formation during MWA conditions was at 200 C, 330 C, 390 C, 420 C, and 470 C for 150 s, NiSiGe formation during MWA conditions was at 200 °C, 330 °C, 390 °C, 420 °C, and 470 °C for 150 s, respectively. After forming NiSiGe with MWA annealing, the forward currents and reverse respectively. After forming NiSiGe with MWA annealing, the forward currents and reverse leakage 150 s, respectively. After forming NiSiGe with MWA annealing, the forward currents and reverse leakage currents of all NiSiGe/n‐Si contacts gradually decreased from 200 °C to 390 °C. However, ˝ C to 390 ˝ C. However, increasing currents of the all NiSiGe/n-Si contacts gradually decreased from°C, 200the leakage currents of all NiSiGe/n‐Si contacts gradually decreased from 200 °C to 390 °C. However, increasing annealing temperature from 200 °C to 470 forward currents and reverse ˝ ˝ the annealing from 200 C to 470 200 C, the forward currents and reverse leakage increasing the temperature annealing temperature from °C to 470 °C, the forward currents and currents reverse leakage currents are degraded accordingly. The NiSiGe/n‐Si Schottky junction exhibits the highest are degraded accordingly. The NiSiGe/n-Si Schottky junction exhibits the highest forward/reverse 5 leakage currents are degraded accordingly. The NiSiGe/n‐Si Schottky junction exhibits the highest forward/reverse current ratio of ~2.5 × 10 at MWA 390 °C. This result also indicates that the series current ratio of ~2.5 ˆ 105 at MWA 390 ˝ C. This result also indicates that the series resistance can be 5 at MWA 390 °C. This result also indicates that the series forward/reverse current ratio of ~2.5 × 10 resistance can be significantly reduced after the SiNiGe formation at the condition of MWA 390 °C. ˝ C. Note that if using significantly reduced after the SiNiGe formation the condition of MWA 390°C, resistance can be significantly reduced after the SiNiGe formation at the condition of MWA 390 °C. Note that if using relatively high temperature atMWA annealing at >470 the crystallization ˝ C, the crystallization became more significant relatively high temperature MWA annealing at >470 Note that if using relatively high temperature MWA annealing at >470 °C, the crystallization became more significant and which was shown by the increased intensity of the GIXRD peak in and which was shown by the increased intensity of the GIXRD peak in Figure 3. This issue became 3. more which was shown by uniformity, the increased intensity the GIXRD peak in Figure This significant issue will and potentially degrade the cause more of defects induce at will the potentially degrade the uniformity, cause more defects induce at the interface, and affect the leakage Figure 3. This issue will potentially degrade the uniformity, cause more defects induce at the interface, and affect the leakage current of the junction increase. current of the junction increase. interface, and affect the leakage current of the junction increase. 2) 2) Current Density (A/cm Current Density (A/cm 3 10 3 102 10 2 101 10 1 100 10 0 10-1 10 -1 10-2 10 -2 10-3 10 -3 10-4 10 -4 10-5 10 -5 10-6 10 -6 -1.0 10 -1.0 MWA@330C MWA@390C MWA@330C MWA@420C MWA@390C MWA@470C MWA@420C MWA@200C MWA@470C MWA@200C -0.5 0.0 0.5 -0.5 0.0 Voltage(volt)0.5 Voltage(volt) 1.0 1.0 Figure 4. The I–V characteristics of the NiSiGe/n‐Si Schottky junction annealed at different MWA temperatures. Figure 4. The I–V characteristics of the NiSiGe/n‐Si Schottky junction annealed at different MWA temperatures. Figure 4. The I–V characteristics of the NiSiGe/n-Si Schottky junction annealed at different Figure 5 shows the effective electron SBH (Schottky barrier height) and ideality factor of MWA temperatures. Figure 5 shows the effective electron SBH (Schottky barrier height) and ideality factor of NiSiGe/n‐Si Schottky junctions with different MWA temperatures. For a typical or moderate doped NiSiGe/n‐Si Schottky junctions with different MWA temperatures. For a typical or moderate doped semiconductor, the I–V characteristics of the Schottky diode could be described by: 7521 semiconductor, the I–V characteristics of the Schottky diode could be described by: 3 3 Materials 2015, 8, page–page Materials 2015, 8, 7519–7523 qVa I I S exp 1 (1) Figure 5 shows the effective electron SBH (Schottky nK BT barrier height) and ideality factor of NiSiGe/n-Si Schottky junctions with different MWA temperatures. For a typical or moderate doped with semiconductor, the I–V characteristics of the Schottky diode could be described by: q Beff˙ qV a IIS “ IAA T exp ´ 1 S exp nK B T K BT * ˆ 2 (2) (1) with Is is the saturation current, A is the diode area, the applied voltage, A* is the effective where ˜ Vae is ¸ ff eff qφ Richardson constant [17,18], B is the SBH, n is the Bideality factor. The ideality factor n and IS “ AA˚and T 2 exp (2) KB T eff SBH B can be derived as: where Is is the saturation current, A is the diode area, Va is the applied voltage, A* is the effective q V factor. The ideality factor n and SBH Richardson constant [17,18], φeff B is the SBH, n and n isthe ideality (3) eff φB can be derived as: K BT˙ˆ[ln I ]˙ ˆ q BV n“ (3) and KB T BrlnIs and eff ef f φ B “ B K T ˆ AT 2 ˙ K BBT ln A˚ T 2 ln qq JJSS (4) (4) 1.6 0.75 1.5 0.70 1.3 0.60 1.2 0.55 1.1 0.50 Ideal Factor 1.4 0.65 1.0 270 300 330 360 390 420 450 480 ° Effective Barrier Hieght(ev) eff from each MWA sample of a By using Equation (3), we extract the ideal factor n and SBH φeff By using Equation (3), we extract the ideal factor n and SBH BB from each MWA sample of a different temperature in the I–V characteristics of Figure 4. From Figure 5, we can observe that the different temperature in the I–V characteristics of Figure 4. From Figure 5, we can observe that the SBH and the ideality factor of the MWA 390 ˝ C condition are 0.63 eV and 1.01, and it shows good SBH and the ideality factor of the MWA 390 °C condition are 0.63 eV and 1.01, and it shows good electrical characteristics of Schottky junctions. electrical characteristics of Schottky junctions. Temperature( C) Figure 5. SBH and ideality factor of NiSiGe/n‐Si Schottky contact with different MWA temperatures. Figure 5. SBH and ideality factor of NiSiGe/n-Si Schottky contact with different MWA temperatures. 4. Conclusions 4. Conclusions This paper realized the shallow NiSiGe Schottky junction on the SiGe P‐channel by using low‐ This paper realized the shallow NiSiGe Schottky junction on the SiGe P-channel by using temperature microwave annealing. The formation of junction defects could be suppressed and low-temperature microwave annealing. The formation of junction defects could be suppressed and prevent the agglomeration due to the lower forming temperature. The microwave‐annealed NiSiGe prevent the agglomeration due to the lower forming temperature. The microwave-annealed NiSiGe Schottky junction exhibited a superior ION/IOFF ratio of about 3 × 105 formed at 390 °C as well as more Schottky junction exhibited a superior ION /IOFF ratio of about 3 ˆ 105 formed at 390 ˝ C as well as stable off‐current characteristics with an SBH of 0.63 eV and an ideality factor of 1.01. We believe more stable off-current characteristics with an SBH of 0.63 eV and an ideality factor of 1.01. We believe our microwave annealing NiSiGe Schottky junction is promising for high performance logic circuits our microwave annealing NiSiGe Schottky junction is promising for high performance logic circuits and will enable SiGe channel devices to be integrated on the Si substrate for the future applications. and will enable SiGe channel devices to be integrated on the Si substrate for the future applications. Acknowledgments: Acknowledgments: The The authors authors thank thank the the National National Science Science Council Council of of the the Republic Republic of of China, China, Taiwan, Taiwan, for for supporting this research (104‐2221‐E‐239‐017). National Nano Device Laboratories (NDL), Taiwan, supporting this research (104-2221-E-239-017). National Nano Device Laboratories (NDL), Taiwan, is is highly highly appreciated for its technical support. appreciated for its technical support. Author Contributions: Contributions: Yu‐Hsien Yu-Hsien Lin Lin organized organized the the research research and and wrote wrote the the manuscript; manuscript; Yi‐He Yi-He Tsai Tsai and and Author Chung-Chun Hsu performed the experiments and performed data analysis; Yu-Hsien Lin, Guang-Li Luo, Chung‐Chun Hsu performed the experiments and performed data analysis; Yu‐Hsien Lin, Guang‐Li Luo, Yao-Jen Lee, and Chao-Hsin Chien discussed the experiments and the manuscript. Yao‐Jen Lee, and Chao‐Hsin Chien discussed the experiments and the manuscript. 4 7522 Materials 2015, 8, 7519–7523 Conflicts of Interest: The authors declare no conflict of interest. References 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. Datta, M.S.; Dewey, G.; Doczy, M.; Doyle, B.; Jin, B.; Kavalieros, J.; Kotlyar, R.; Metz, M.; Zelick, N.; Chau, R. High Mobility Si/SiGe Strained Channel MOS Transistors with HfO2 /TiN Gate Stack. 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