Download Lateral Quantum Dots in Strained Silicon/Silicon-Germanium

JOHANNES KEPLER
U N I V E R S I T Ä T L I N Z
N e t z w e r k f ü r F o r s c h u n g , L e h r e u n d P r a x i s
Lateral Quantum Dots in Strained
Silicon/Silicon-Germanium Heterostructures realized by
a Schottky Split-Gate Technique
Dissertation
zur Erlangung des akademischen Grades
Doktor der Technischen Wissenschaften
Angefertigt am Institut für Halbleiterphysik
Betreuung:
Univ. Prof. Dr. Friedrich Schäffler
Eingereicht von:
DI Thomas Berer
Gutachter:
1. Univ. Prof. Dr. Friedrich Schäffler
2. Ao. Univ. Prof. Dr. Gottfried Strasser
Linz, März 2007
Johannes Kepler Universität
A-4040 Linz · Altenbergerstraße 69 · Internet: http://www.jku.at · DVR 0093696
2
Eidesstattliche Erklärung
Ich erkläre an Eides statt, dass ich die vorliegende Dissertation selbstständig und ohne
fremde Hilfe verfasst, andere als die angegebenen Quellen und Hilfsmittel nicht benutzt
bzw. die wörtlich oder sinngemäß entnommenen Stellen als solche kenntlich gemacht
habe.
Abstract
In this thesis lateral quantum dots were realized with a Schottky split-gate technique
on high mobility silicon/silicon-germanium modulation-doped samples. As the size of
the lateral quantum dots is comparable with the electron wavefunction, the wave nature of the electrons plays a significant role, and the energy levels in the dots are
quantized.
Starting point for the fabrication were strained Si/SiGe heterostructures, which were
modulation-doped to achieve high mobilities. Hall and Shubnikov-de Haas measurements were performed to determine the carrier densities and electron mobilities of the
heterostructures. The two-dimensional electron gas (2DEG) of the heterostructure used
for the fabrication of the devices showed an electron mobility of about 1.5×105 cm2 /Vs
at carrier densities between 3.2×1011 cm−2 and 3.6×1011 cm−2 . The split-gate arrangements were prepared on Hall bar structures. Different kinds of Ohmic contacts were
tested and the parameters for ion etching of the mesa were optimized. The splitgate structures were prepared by e-beam lithography into polymethyl methacrylate
(PMMA) resist with a Raith Elphy control unit in combination with two different
scanning electron microscopes. Most of the devices were fabricated with a newly commissioned scanning electron microscope (LEO Supra 35 FE-SEM). It was installed and
the appropriate e-beam lithography system was brought to working conditions. Also, a
new optical mask suited for various types of split-gate based quantum devices was developed. Fabrication of the split-gates was done by lifting-off a palladium metalization
layer in the unexposed areas of the resist. Finally, connections from the split-gates to
the bond pads were made by optical lithography, using palladium or chromium/gold
lift-off.
Electrical measurements were performed at low temperatures in a 3 He cryostat and in a
dilution refrigerator. Measurements at low temperatures showed well-controlled leakage
currents of the split-gates. Coulomb-blockade and stability diamonds were recorded,
showing that the dots contain only a few electrons. The experiments demonstrated
that, in contrast to reports in literature, Schottky gates are a feasible approach for the
integration of lateral quantum dots in the strained Si/SiGe heterosystem.
Kurzfassung
In dieser Arbeit wurden laterale Quantenpunkte durch eine Schottky-Split-Gate-Technik
in hochbeweglichen modulationsdotierten Silizium/Silizium-Germanium-Heterostrukturen realisiert. Da die Strukturgröße der lateralen Quantenpunkte vergleichbar mit
der Elektronenwellenlänge ist spielt die Wellennatur der Elektronen eine große Rolle,
und die Energieniveaus in the Quantenpunkten sind quantisiert.
Als Ausgangspunkt für die Herstellung dienten verspannte Si/SiGe Heterostrukturen,
welche hohe Beweglichkeiten aufgrund ihrer Modulationsdotierung aufweisen. Hallund Shubnikov-de Hass-Messungen wurden an den Proben durchgeführt, um deren
Ladungsträgerkonzentrationen und Beweglichkeiten zu bestimmen. Die Heterostruktur, welche zur Herstellung der Bauelemente verwendet wurde, zeigte eine Beweglichkeit
von etwa 1.5×105 cm2 /Vs bei Ladungsträgerdichten zwischen 3.2×1011 cm−2 und
3.6×1011 cm−2 . Die Split-Gate-Strukturen wurden auf einem Hall-bar gefertigt. Verschiedene Arten von Ohmschen Kontakten wurden getestet, und die Parameter für
das Ionenätzen des Mesas wurden optimiert. Die Split-Gate-Strukturen (mehrgliedrige
Steuerelektroden) wurden mittels Elektronenstrahllithographie in Polymethylmethacrylat-Lack (PMMA) mittels einer Raith-Elphy Kontrolleinheit auf zwei verschiedenen
Rasterelektronenmikroskopen geschrieben. Die meisten der gefertigten Strukturen wurden auf einem neu beschafften Rasterelektronenmikroskop (LEO Supra 35 FE-SEM)
hergestellt. Dieses wurde installiert und die zugehörige Elektronenstrahllithographie
wurde in betriebsbereiten Zustand gebracht. Des weiteren wurde eine neue optische
Maske, welche besser geeignet ist, um verschiedene auf Split-Gates basierenden Quantenbauelemente zu realisieren, entwickelt. Hergestellt wurden die Split-Gates schließlich
durch eine Lift-off-Technik einer Palladium-Metallisierungsschicht. Abschließend wurden die Verbindungen zwischen den Split-Gates und den Bondflächen durch optische
Lithographie und Palladium- oder Chrom/Gold-Metallisierung hergestellt.
Elektrische Messungen bei tiefen Temperaturen wurden in einem 3 He-Kryostaten und
einem 3 He/4 He-Mischkryostaten durchgeführt. Die Messungen zeigten niedrige Leckströme der Steuerelektroden. Des weiteren wurden Coulomb-Blockaden und StabilitätsDiamanten gemessen. Auswertungen an den Diamanten ergaben, daß die Quantenpunkte nur wenige Elektronen beinhalten. Die Experimente zeigten, daß in Gegensatz zu Behauptungen in the Literatur, laterale Quantenpunkte mittels SchottkySteuerelektroden in einem verspannten Si/SiGe-Heterosystem realisiert werden können.
4
Contents
1 Introduction
1
2 Properties of SiGe Heterostructures
2.1 Pure Elements . . . . . . . . . . . . . . . . . . . .
2.2 Silicon Germanium . . . . . . . . . . . . . . . . .
2.2.1 Unstrained Silicon Germanium . . . . . .
2.2.2 Strained Silicon Germanium . . . . . . . .
2.2.3 Modulation Doped SiGe Heterostructures .
3 SEM - Scanning Electron Microscope
3.1 Introduction . . . . . . . . . . . . . . .
3.2 The LEO Supra35 FE-SEM . . . . . .
3.2.1 Introduction . . . . . . . . . . .
3.2.2 Considerations for SEM Design
3.2.3 The Gemini Column . . . . . .
3.2.4 LEO Supra35 Detectors . . . .
4 Sample Processing and Technology
4.1 Masks for Optical Lithography . . .
4.1.1 The Different Masks . . . .
4.1.2 Quantum Mask . . . . . . .
4.2 Optical Lithography . . . . . . . .
R
4.2.1 Shipley S1818
. . . . . . .
4.2.2 Hoechst AZ5218 . . . . . . .
4.2.3 Edge Bead Removal (EBR)
4.2.4 Ashing . . . . . . . . . . . .
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ii
CONTENTS
4.3
4.4
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6 Measurements
6.1 Measurement Setups . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
89
4.5
4.6
4.7
4.8
4.9
Preparation: Cutting and Cleaning . . . . . . . .
Ohmic Contacts . . . . . . . . . . . . . . . . . . .
4.4.1 Introduction . . . . . . . . . . . . . . . . .
4.4.2 Different Kinds of Ohmic Contacts . . . .
4.4.3 Ohmic Contacts with a Au/Sb Alloy . . .
4.4.4 Ohmic Contacts with Ion Implanted As . .
4.4.5 Ohmic Contacts with Silicides . . . . . . .
Mesa Etching . . . . . . . . . . . . . . . . . . . .
4.5.1 Overview: Dry Etching . . . . . . . . . . .
4.5.2 Etching Gases and Etching Facility . . . .
4.5.3 Optimization of Etching Parameters . . .
Connections I . . . . . . . . . . . . . . . . . . . .
e-Beam Lithography . . . . . . . . . . . . . . . .
4.7.1 Choice of the Resist and Spin Parameters
4.7.2 Choice of the Acceleration Voltage . . . .
4.7.3 Calculating the Exposure Parameters . . .
4.7.4 e-Beam Lithography . . . . . . . . . . . .
4.7.5 Post e-Beam Lithography . . . . . . . . .
Connections II . . . . . . . . . . . . . . . . . . . .
Finishing the Sample: Mounting and Bonding . .
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5 Theory
5.1 Hall Effect . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1.1 Classical Hall Effect . . . . . . . . . . . . . . . .
5.1.2 Hall Effect in Multi-Carrier Systems . . . . . . .
5.1.3 Shubnikov-deHaas Oscillations and Quantum Hall
5.2 Coulomb Blockade and Single Electron Transistor . . . .
5.2.1 The Quantum Dot . . . . . . . . . . . . . . . . .
5.2.2 Single-Electron Charging and Coulomb Blockade
5.2.3 Extracting Dot Parameters from Measurements .
5.2.4 Estimation of Errors . . . . . . . . . . . . . . . .
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iii
CONTENTS
6.2
6.3
6.1.1
Cryostats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
6.1.2
DC Measurement Setup . . . . . . . . . . . . . . . . . . . . . .
91
6.1.3
AC Measurement Setup . . . . . . . . . . . . . . . . . . . . . .
93
Hall Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
97
6.2.1
Hall Measurements at 1.5 K . . . . . . . . . . . . . . . . . . . .
97
6.2.2
Hall measurements at 300 mK . . . . . . . . . . . . . . . . . . . 102
6.2.3
Hall measurements at 30 mK . . . . . . . . . . . . . . . . . . . . 104
Coulomb Blockade Measurements . . . . . . . . . . . . . . . . . . . . . 107
6.3.1
Sample BT741 . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
6.3.2
Sample BT740 . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
6.3.3
Sample BT771 . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
7 Discussion and Unsolved Problems
137
7.1
Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
7.2
Unsolved Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
7.2.1
Ohmic Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
7.2.2
Short Between Gates and Lifted Gates . . . . . . . . . . . . . . 139
7.2.3
Gate Insulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
7.2.4
Layer between Silicon Surface and Gates . . . . . . . . . . . . . 142
7.2.5
Stained Samples . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
8 Conclusion and Outlook
147
8.1
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
8.2
Outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Appendix
149
A Layer Sequence and Band Structure of PSG n1417
149
A.1 Growth Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
A.2 Layer Sequence and Band Structure . . . . . . . . . . . . . . . . . . . . 150
B List of Samples
151
Acknowledgements
159
iv
CONTENTS
Curriculum Vitae
161
List of Publications and List of Presentations . . . . . . . . . . . . . . . . . 162
List of Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
List of Conference Presentations . . . . . . . . . . . . . . . . . . . . . . 162
Bibliography
164
List of Figures
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Diamond lattice structure . . . . . . . . . . . . . . . . . . . . . . . . .
Band structures of silicon and germanium . . . . . . . . . . . . . . . .
Lattice parameter of SiGe as a function of germanium content . . . . .
Compositional dependence of the indirect energy gap at 296 K . . . . .
Contribution of strain on the Si conduction and valence band . . . . . .
Contour plots for the bands offsets for strained Si1−x Gex on Si1−xs Gexs
Variation of the conduction and valence band . . . . . . . . . . . . . .
Potential of a typical n-type Si/SiGe modulation doped heterstructure .
4
5
6
7
9
11
12
13
3.1
3.2
3.3
3.4
3.5
3.6
3.7
JEOL 6400 and LEO Supra35 . . . . . . . . . . . . . . . . .
LEO Supra35 aberrations and resolution . . . . . . . . . . .
LEO Supra35 column and beam path . . . . . . . . . . . . .
Principle of an in-lens detector . . . . . . . . . . . . . . . . .
Everhard-Thornley detector . . . . . . . . . . . . . . . . . .
Detection principle of an Evenhart-Thornley detector . . . .
Relative output vs. atomic number for a Centaurus detector
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19
20
23
24
25
26
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
Quantum mask . . . . . . . . . . . . . . . . . . .
Mask for Ohmic contacts . . . . . . . . . . . . . .
Masks for mesa etch and connections . . . . . . .
Ohmic contacts, mesa and connetions combined .
Optical micrograph of a finished sample . . . . . .
Metal-semiconductor junction . . . . . . . . . . .
Contact resistance of annealed Au/Sb contacts . .
IV-characteristics of silicides . . . . . . . . . . . .
Configuration of a typical plasma etching machine
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vi
LIST OF FIGURES
4.10
4.11
4.12
4.13
4.14
4.15
4.16
4.17
4.18
4.19
4.20
4.21
4.22
4.23
4.24
4.25
Anisotropic etching driven by kinetically assisted chemical reactions . .
Range of directionality that can be obtained using dry etching techniques
Typical setup of an RIE machine . . . . . . . . . . . . . . . . . . . . .
Configuration of an RIE machine with different electrode sizes . . . . .
Illustration of a self aligned etching process . . . . . . . . . . . . . . . .
Mesa etched at 22 mtorr . . . . . . . . . . . . . . . . . . . . . . . . . .
Mesas etched at different pressures . . . . . . . . . . . . . . . . . . . .
Connections I with SET structure . . . . . . . . . . . . . . . . . . . . .
Monte Carlo simulation of the SE distribution at different beam energies
Flanks in PMMA exposed at different voltages . . . . . . . . . . . . . .
Scan quality with two different scan generators . . . . . . . . . . . . . .
Carbon tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-optimal gate structures caused by contaminations . . . . . . . . .
Resists after deposition, but before lift-off . . . . . . . . . . . . . . . .
The finished sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Destroyed sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
43
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60
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65
5.1
5.2
5.3
5.4
5.5
Density of states of a 2DEG in a magnetic field . . . . . . . . . . . . .
Schematic of a quantum dot . . . . . . . . . . . . . . . . . . . . . . . .
Typical geometry and operation of a planar quantum dot . . . . . . . .
Illustration of the origin of Coulomb oscillations . . . . . . . . . . . . .
Conductance, number of electrons, and electrochemical potential as function of the plunger gate voltage . . . . . . . . . . . . . . . . . . . . . .
Typical Coulomb oscillations . . . . . . . . . . . . . . . . . . . . . . . .
Illustration of the nonlinear transport . . . . . . . . . . . . . . . . . . .
Differential conductance as a function of VDS . . . . . . . . . . . . . . .
Differential conductance plotted in the VG -VSD plane . . . . . . . . . .
Estimating the drain capacitance . . . . . . . . . . . . . . . . . . . . .
Estimating the total capacitance . . . . . . . . . . . . . . . . . . . . . .
70
75
76
78
5.6
5.7
5.8
5.9
5.10
5.11
79
80
81
82
83
84
85
6.1 Schematic diagram of a dilution refrigerator . . . . . . . . . . . . . . . 92
6.2 ac measurement setup used for the measurement of the SET structures 95
6.3 Hall measurements of samples PSG n1377 and PSG n1378 . . . . . . . 99
6.4 Hall measurements of sample PSG n1417 . . . . . . . . . . . . . . . . . 100
6.5 n(VG ) and µ(n) of sample PSG n1418 . . . . . . . . . . . . . . . . . . . 101
vii
LIST OF FIGURES
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
6.18
6.19
6.20
6.21
6.22
6.23
6.24
6.25
6.26
SdH and QH measurements at 300 mK and Dingle analysis . . . . . .
SdH and QH measurements at 30 mK and Dingle analysis . . . . . . .
Electron micrographs of sample BT741 . . . . . . . . . . . . . . . . .
Cool-down of sample BT741 . . . . . . . . . . . . . . . . . . . . . . .
Gate I-V characteristic . . . . . . . . . . . . . . . . . . . . . . . . . .
Stability plot of sample BT740 at 300 mK . . . . . . . . . . . . . . .
Hall bar BT740 and top gate configuration . . . . . . . . . . . . . . .
Contact resistance and sample resistance of BT740 during cool-down
Conductance oscillations of sample BT740 . . . . . . . . . . . . . . .
Stability plot of sample BT740 at 30 mK . . . . . . . . . . . . . . . .
Stability plot with marked points . . . . . . . . . . . . . . . . . . . .
Term diagrams for estimation of ∆E from ∆VDS . . . . . . . . . . . .
Term diagram 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Term diagram 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate sweep of gate G1-G4 . . . . . . . . . . . . . . . . . . . . . . . .
Theoretical depletion zones in BT740 . . . . . . . . . . . . . . . . . .
Coulomb diamonds of sample BT740 at 30 mK, 300 mK and 2 K . . .
Electron micrographs of sample BT771 . . . . . . . . . . . . . . . . .
Contact resistance and sample resistance of BT771 during cool-down
Stability plot of sample BT771 at 300 mK . . . . . . . . . . . . . . .
Conductance quantization in sample BT771 . . . . . . . . . . . . . .
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
103
105
107
109
110
112
113
114
116
117
119
120
123
124
125
128
129
130
131
132
135
7.1
7.2
7.3
Palladium needles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Layer between Si-surface and palladium gates . . . . . . . . . . . . . . 143
Stained silicon surface . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
A.1 Layer sequence and band structure of sample PSG n1417 . . . . . . . . 150
viii
LIST OF FIGURES
List of Tables
2.1
Table of important properties of unstrained Si and Ge . . . . . . . . . .
5
3.1
Comparison of different electron sources . . . . . . . . . . . . . . . . .
18
4.1
Typical e-beam exposure parameters . . . . . . . . . . . . . . . . . . .
57
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Devices for the 4 He Cryostat . . . . . . . . . . . . . . . . . . . . . . . .
Devices for the 3 He Cryostat and the 3 He/4 He Refrigerator . . . . . . .
Devices for the 3 He Cryostat . . . . . . . . . . . . . . . . . . . . . . . .
Devices for the 3 He/4 He System . . . . . . . . . . . . . . . . . . . . . .
Estimated capacitances and dot parameters for sample BT740 . . . . .
Dot diameters and occupation numbers estimated from the exited state
Depletion lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Estimated capacitances and dot parameters for sample BT771 . . . . .
93
94
94
95
118
122
127
133
ix
x
LIST OF TABLES
Chapter 1
Introduction
The recent introduction of the Si/SiGe heterobipolar transistor into large scale production has added a heterosystem for high-performance devices to main-stream Si
technology and its unrivaled capabilities for ultra-large-scale device integration [1].
Si-based heterostructures are also of great interest for long-term research topics. For
example, the long intrinsic spin coherence times in this material system [2, 3] make it
a natural choice for future quantum computation [4, 5] based on spin qubits.
For the purpose of spin manipulation and programmable entanglement, single electron
transistors (SETs) with carrier confinement in all three directions of space are key
components [6]. SET development for laboratory applications has reached a mature
state in III-V compound heterostructures, but only few reports on Si/SiGe SETs exist.
First indications of Coulomb blockade in this material system were based on a splitgate technique [7], which is considered a precondition for efficient electrostatic control
of the quantum dots (QDs) and for the integration of interacting devices.
None of the subsequently published Si/SiGe SETs employed the advantageous arrangement of split Schottky gates [8, 9, 10]. Instead, more or less sophisticated schemes of
side gates were implemented to demonstrate SET operation on single dots. The proposed side gate approaches have, however, severe drawbacks regarding efficient QD
control and/or geometrical restrictions for the implementation of coupled QDs arrays.
It was argued that side gates became a necessity because of the excessive gate leakage
currents found on Schottky gates. Those were attributed to threading dislocation and
morphological defects originating from the strainrelaxed SiGe pseudosubstrates [8, 11].
In the publications based on this thesis [12, 13, 14] we demonstrated that gate leakage
1
2
CHAPTER 1. INTRODUCTION
currents are not an intrinsic limitation of modulation-doped Si/SiGe heterostructures:
Our split-gate SETs on heterostructures grown by molecular beam epitaxy (MBE)
show well-behaved Coulomb blockade and very low leakage currents of the Pd Schottky gates. While up to now Si/SiGe quantum dot devices have lacked the quality of
GaAs/AlGaAs devices, the SiGe system has essential advantages over other materials.
First of all, the Rashba field in Si is orders of magnitude smaller than in the III-V
compounds [3, 15]. Secondly, in silicon the abundance of 29 Si, the only isotope with
spin, is less than 5% [16] and moreover, 28 Si isotope enrichment is possible. Therefore,
spin coherence times are much longer than in III-V systems, which is important for
potential spintronic applications. [2, 3, 17, 18]
Chapter 2
Properties of Silicon Germanium
Heterostructures
2.1
Pure Elements
Silicon as well as germanium crystallize in the diamond lattice. A diamond lattice
consists of two face-centered cubic (fcc) lattices, displaced by a quarter of the space
diagonal (figure 2.1). Each atom is bonded to the four nearest neighbors arranged at
the corners of a regular tetrahedron and their valence electrons occupy sp3 orbitals.
This structure is the result of the purely covalent bonding between the atoms. However, silicon and germanium have different lattice constants and band structures and
therefore different intrinsic properties. [19, 20]
The conduction band of silicon has six equivalent minima along the [100] axes of the
Brillouin zone. These minima are located at about k0 = 0.85 · 2π/a near the X-point,
where a is the lattice constant. Higher minima lie about 1 eV above at the Γ-point
along the [111] axes. The light and heavy hole bands are degenerated and have their
maxima at the Γ-point. The spin-orbit split-off band has its maximum at the same
point, but at slightly lower energy. [22] For an illustration of the silicon bandstructure
see figure 2.2a
For germanium eight equivalent minima in the conduction band are found at the Lpoints, i.e. the end points of the [111]-axes of the Brillouin zone. Higher minima are
found at the Γ-point and on the [100]-axes. Like in silicon also the valence band of
germanium has its maximum at the Γ-point, the light and heavy hole bands are de3
4
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
Figure 2.1: The diamond lattice structure. [21]
generated and the spin-orbit split-off band lies below in energy (2.2b). [22]
The shape of the conduction and valence band and their energetic levels determine
the charge carrier effective masses m∗ and the bandgap energies. Silicon has an indirect bandgap of 1.12 eV at room temperature, while the indirect bandgap energy of
germanium is 0.66 eV [22].
As a consequence of the periodic potential of the nuclei, and thus of the band structure,
the effective masses differ from the mass of a free electron m0 . In general the effective
mass is given by
1
1 d2 Ek
=
(2.1)
m∗ µν
~2 dkµ dkν
where Ek is the band energy and k is the crystal momentum [23]. Since the areas of
constant energy in the conduction band minima have the form of ellipsoids of rotation
for Si and Ge, the electron mass can be described by the longitudinal mass ml and the
transversal mass mt . ml is the mass along the symmetry axis of the ellipsoid, i.e. the
{100} direction in Si and the {111} direction in Ge. Therefore, the transversal mass
mt is the mass in the plane normal to the axis of symmetry. [1]
The most important structural and electronic properties of unstrained Si and Ge are
compiled in table 2.1.
5
2.1. PURE ELEMENTS
(a) Silicon bandstructure
(b) Germanium bandstructure
Figure 2.2: Band structures for silicon (a) and for germanium (b). Both figures
takes from [22].
Lattice constant a0
Density ρ
Direct bandgap Egdirect
Indirect bandgap Egindirect
Dielectric constant ε
Electron mobility µ0
Hole mobility µ0
Longitudinal electron mass ml
Transversal electron mass mt
Heavy hole mass mhh
Light hole mass mlh
at T [K] (Si/Ge) Si
Ge
297.5 / 298.15
298 / 298
4.2 / 293
300 / 291
300 / 300
300 / 300
300 / 300
1.26 / 30
1.26 / 30
4.2 / 4
4.2 / 4
5.658 Å
5.323 g/cm3
0.805 eV
0.664 eV
16.2
3900 cm2 /Vs
1800 cm2 /Vs
1.57 m0
0.0807 m0
0.284 m0
0.0438 m0
5.431 Å
2.329 g/cm3
4.185 eV
1.1242 eV
11.9
1450 cm2 /Vs
505 cm2 /Vs
0.9163 m0
0.1905 m0
0.537 m0
0.153 m0
Table 2.1: Table of important structural and electronic properties of unstrained
Si and Ge taken from [22]. In the second column the measurement temperature
T for the given values is denoted.
6
2.2
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
Silicon Germanium
The binary alloys of Si and Ge are completely miscible and form a continuously variable
system with gradually changing properties over the entire composition range. The
lattice mismatch of 4.2% between Si and Ge can lead to a drastically altered band
structure for epitaxially grown pseudomorphic Si1−x Gex films.
2.2.1
Unstrained Silicon Germanium
The random Si1−x Gex alloys crystallize in the cubic diamond lattice. The lattice parameter a increases nearly linearly with increasing germanium content, revealing only
a small derivation from Vegard’s rule (figure 2.3). The lattice parameter as a function
of composition is approximately given by [19, 24]:
a (x) = 0.002733x2 + 0.01992x + 0.5431 (nm)
(2.2)
Figure 2.3: Lattice parameter of unstrained SiGe as a function of the germanium
content [24].
The lowest lying conduction band shows a crossover from the silicon like ∆(6) to the
germanium like L(4) states at a germanium content of x ≈ 85% [25]. The energy gap
increases monotonically with increasing Ge content and a kink occurs at the crossover
point (see figure 2.4). The experimentally observed bandgaps can be approximated by
2.2. SILICON GERMANIUM
7
the quadratic expressions [26]:
Eg(∆) = 1.155 − 0.43x + 0.206x2 (eV) for 0 < x < 0.85
Eg(L)
= 2.010 − 1.27x (eV) for 0.85 < x < 1
(2.3)
(2.4)
Figure 2.4: Compositional dependence of the indirect energy gap at 296 K [22, 27].
2.2.2
Strained Silicon Germanium
For small enough strain, which should be satisfied in pseudomorphically strained layers,
the strain state can be expressed by the strain tensor ε [28]. As the in-plane lattice
constant of the substrate a|| is conserved, the unit cell of the heterolayer is tetragonally
distorted and the strain in the layer i can be described by its components parallel and
perpendicular to the interface [29]:
ak
−1
(2.5)
εik =
ai
a⊥
εi⊥ =
−1
(2.6)
ai
where ai is the unstrained lattice constant of layer i and
ak
i
−1
ai⊥ = ai 1 − D
ai
(2.7)
8
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
is the lattice constant perpendicular to the interface. For the (001) interface, which is
the only one used in this thesis, Di depends only on the elastic constants ci11 and ci12
[1]:
c12
i
.
(2.8)
D(001) = 2
c11
The strain can then be described as a superposition of a hydrostatic and an uniaxial
or biaxial strain component, where the hydrostatic strain shifts the overall energetic
position of the band and the latter introduce a splitting of the degenerated bands. The
average position of the conduction band Ec,av and the valence band Ev,av are shifted
by [28]:
∆Ec,av = ac 2εk + ε⊥
∆Ev,av = av 2εk + ε⊥
(2.9)
(2.10)
where ac and av are the hydrostatic deformation potentials for the conduction band and
valence band, respectively. ac can be also expressed by the conduction band potentials
Ξd and Ξu :
1
ac = Ξd + Ξu .
(2.11)
3
The uniaxial strain component leads to a splitting of the sixfold degenerated ∆ band
in the twofold degenerated ∆2 and the fourfold degenerated ∆4 bands for the (001)
interface [1, 28]

+ 2 Ξ∆ ε − ε for the ∆ band
⊥
2
k
3 u
(2.12)
∆Ec∆ =
1
− Ξ∆ ε⊥ − εk for the ∆4 band
u
3
while the eightfold L band remains unaffected. Note that the weighted average position
of the ∆ bands remains unaffected. The valence band splittings in heavy hole (HH),
light hole (LH), and spin-orbit-split hole (SO) bands for uniaxial strain are given by
[30]:
1
1
∆0 − δE001
3
2
1
1
1
= − ∆0 + δE001 +
∆0 + ∆0 δE001 +
6
4
2
1
1
1
∆0 + ∆0 δE001 +
= − ∆0 + δE001 −
6
4
2
(2.13a)
HH: Ev2 =
LH: Ev1
SO: Ev3
9
(δE001 )2
4
9
(δE001 )2
4
21
12
(2.13b)
(2.13c)
9
2.2. SILICON GERMANIUM
where ∆0 is the value of the spin-orbit splitting and δE001 is determinded by the
′
uniaxial-deformation potential of the Γ25 valence band b [30]:
δE001 = 2b ε⊥ − εk
(2.14)
The contribution to the band alignment for a tensile in-plane strained Si layer on a
L
E (eV)
2.0
Ec
L
∆E g
L
∆
Ec
∆4
∆
Eg
∆
∆Eg
∆2
av
Ev
0
av
∆Ev
-0.2
-0.4
L
Eg
1.1
0.2
Si on
Si1-xGex
LH
HH
SO
cubic
Silicon
hydrostatic
strain
uniaxial
strain
Figure 2.5: Contribution of the hydrostatic and uniaxial strain to the silicon conduction and valence bands for a tensely strained Si layer on a Si0.7 Ge0.3 substrate.
The hydrostatic component leads to a downshift of all bands, while the uniaxial
strain splits the valence and ∆ bands. [1].
Si0.7 Ge0.3 layer is shown in figure 2.5. This example illustrates the band configuration
of the samples used in this thesis, with exception of the slightly lower germanium
content of 25% in these structures. Under this condition the ∆2 level is shifted to lower
energies.
In figure 2.6 the offsets between the lowest conduction bands (Ecmin (x) − Ecmin (xs ))
and the topmost valence bands (Evmax (x) − Evmax (xs )) for a pseudomorphic Si1−x Gex
layer on a unstrained Si1−xs Gexs substrate are plotted.
The band alignment of a Si/Si1−xs Gexs heterojunction is always of type II, independent
of the germanium content of the substrate layer. The highest lying valence band is
always the light hole band LH and the lowest lying conduction band is always the ∆2
10
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
band for the strained Si layer. The energetically highest valence bands in the substrate
are the degenerated heavy hole and light hole bands, while the lowest conduction band
changes from the ∆ band to the L band at a germanium content of xs > 0.85 (see
figure 2.7).
2.2.3
Modulation Doped SiGe Heterostructures
In a modulation doped heterostructure carriers are confined in a narrow channel layer,
which lies between two barrier layers. The doping layer is located beyond the heterointerface, to reduce ionized impurity scattering. A two-dimensional carrier gas is
then formed in the channel, allowing only motion in the plane of the layer. For n- and
p-doped structures different layer sequences are necessary as a consequence of the typeII band alignment. The formation of a two-dimensional electron gas (2DEG) is only
possible in tensile strained Si1−x Gex channels between two germanium rich Si1−xb Gexb
barriers, where x < xb , whereas a two-dimensional hole gas (2DHG) is formed when
x > xb . In the following only a strained Si channel between two Si1−xb Gexb layers is
considered.
The electron mobility µe at low temperatures is an important property which indicates
the quality of a grown sample, while in device applications the product of the carrier
density times the mobility ne · µe is more important. Electron mobilities have steadily
improved since the introduction of n-type modulation doped Si/SiGe heterostructures
with tensile strained Si channels in 1985 [31]. In 1991 the introduction of the compositionally graded buffer instead of the formerly used constant composition buffer lead
to a step-like improvement of the electron mobilities [32]. Meanwhile mobilities of up
to 800000 cm2 /Vs where reported [33].
A typical growth sequence starts with a thick buffer layer with increasing Ge content
from 0% to about 25% - 30%, followed by a thick layer with constant Ge content [34].
This leads to a band offset of less than 200 meV relative to the following tensile strained
Si channel layer. Higher Ge concentrations are rarely used because of the critical thickness limitation for pseudomorphic growth, which strongly decreases with increasing
Ge content [35]. Subsequently a Si1−x Gex undoped spacer layer is grown, which separates the donors, which are introduced in the following doped supply layer, from the
2DEG which forms at the Si/SiGe heterointerface. Typical spacer thicknesses are in the
range of 100 - 150 Å. Finally an undoped Si1−x Gex layer and a Si cap layer are grown.
11
2.2. SILICON GERMANIUM
100
-100
xlayer [%]
∆Εc
80
20
10
60
0
-20
40
0
0
50
0
-100
-200
-300
20
-400
0
0
20
40
60 80
xsubstrate [%]
100
100
∆Εv
80
500
xlayer [%]
400
60
300
200
40
100
20
0
0
0
-50
20
-100
40
60 80
xsubstrate [%]
100
Figure 2.6: Contour plots for the minimum conduction and valence bands offsets
for a pseudomorphic Si1−x Gex layer on an unstrained Si1−xs Gexs substrate. [1].
12
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
1.5
Si/Si1-xsGexs
Lsub
∆4
E [eV]
1
∆sub
∆2
0.5
LH,HHsub
0
LH
SOsub
HH
-0.5
SO
0
0.2
0.4
xsub
0.6
0.8
1
Figure 2.7: Variation of the conduction and valence bands of a pseudomorphic Si
layer on a Si1−x Gex substrate [1].
These last two layers play an important role for the quality of Schottky barriers. To
determine the exact layer thicknesses and doping concentration for a nominal carrier
density in the 2DEG a self consistent solution of the Poisson and Schrödinger equation
is required. The band structure of a sample with an 180 Å wide Si channel between a
Si0.25 Ge0.75 buffer and a Si0.25 Ge0.75 barrier is shown in figure 2.8. At low temperatures
the electrons are confined in the ground state Ψ0 at the interface between the silicon
channel layer and the spacer layer, where the potential has as a quasi-triangular (i.e.
Airy function) shape [36, 37], while the second subband Ψ1 , which spreads across the
entire channel layer, is not populated. The lowest subband in the doping layer is located
above the Fermi level and therefore at low temperatures free electrons only exist in the
2DEG. In the channel only the ∆2 band is populated, as the ∆4 band lies energetically
above the sixfold degenerated conduction band minimum in the Si0.25 Ge0.75 barrier.
Besides this standard layer sequence several other approaches exist, like doping at the
substrate side or symmetrical doping. However, this can lead to increased background
doping in the channel layer caused by dopant segregation, and thus lower mobilities.
As only the two ∆2 valleys with the transversal mass mt = 0.19 m0 in-plane with
the channel and the longitudinal mass ml = 0.92 m0 perpendicular to the channel are
13
2.2. SILICON GERMANIUM
populated, the mobility is strongly enhanced. The transport mass is then equal to the
relatively low transversal mass. Also, intervalley scattering is reduced, which further
increases the mobility somewhat. The heavy longitudinal mass perpendicular to the
surface reduces the penetration of the wavefunction into the heterobarrier and thus
reduces interface roughness scattering [38].
1000
∆4
Energy (meV)
800
T=0K
600
∆2
400
∆6
∆4
200
ξ0
ψ0
ψ1
0
EF
∆2
Si
-200
∆6
0
Si0.75Ge0.25
200
Si
n doped
400
600
Si0.75Ge0.25
800
1000
Depth (Å)
Figure 2.8: Potential of a typical n-type Si/SiGe modulation doped heterostructure. The tensile strained Si channel lies between two unstrained Si0.25 Ge0.75
barriers. In the channel the sixfold conduction band degeneracy is lifted and the
band splits into a ∆2 and ∆4 band. At low temperatures only the lowest subband
Ψ0 is occupied and electrons are confined at the heterointerface between the Si
channel layer and the Si0.25 Ge0.75 buffer layer. [1]
14
CHAPTER 2. PROPERTIES OF SIGE HETEROSTRUCTURES
Chapter 3
SEM - Scanning Electron
Microscope
3.1
Introduction
In the beginning of this thesis scanning electron microscopy and electron beam lithography were performed with a JEOL 6400 scanning electron microscope equipped with a
LaB6 cathode. A LEO Supra35 FE-SEM (field emitting scanning electron microscope)
was acquired during this thesis. Initially, the microscope was installed in the clean-room
on a separate basement which is mechanical decoupled from the rest of the building.
Because of the too small mass of the separate basement it tended to swing because
of the high air flow, high noise level and infrasonic vibrations in the cleanroom. Also
the floor is not decoupled from the basement and mechanical vibrations caused by the
operators were transmitted to the basement and consequently to the SEM column. A
better suited place in the same clean room was found after testing various places with
a three axis floor vibration measurement unit. All vibration measurements (dependent
on the axis and frequency) were within the specifications for a place located near a
massive main wall of the building. Therefore, the SEM was relocated to the new place.
Furthermore, e-beam lithography was brought to working conditions.
Images of both microscopes are given in figure 3.1. While the JEOL features a classical
design and beam path, the LEO GEMINI column is designed in a somewhat alternative way. Details about the JEOL microscope can be found in references [39, 40, 41],
the LEO FE-SEM is described below.
15
16
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
(a)
(b)
(c)
(d)
Figure 3.1: The scanning electron microscopes used in this thesis: a) The JEOL
6400 column. b) The JEOL 6400 column and the control board of the JEOL 6400
with two cathode ray tubes. In the background the Raith lithography system can
be seen. c) The LEO Supra35 column. d) The LEO column and the control unit
consisting of a PC and two monitors. The third monitor at the right side belongs
to the Raith Elphy32 e-beam lithography system connected to the SEM.
3.2. THE LEO SUPRA35 FE-SEM
3.2
3.2.1
17
The LEO Supra35 FE-SEM
Introduction
The LEO Supra35 is a product of the Carl Zeiss Company (founded by Carl Zeiss
in 1856). Back in the early 1930s the first TEMs (transmission electron microscopes)
were developed by AEG. In 1942 AEG and Carl Zeiss started a cooperation for electron
microscopes and started their first commercial TEM in 1949. The ownership of this
cooperation changed to 100% to Carl Zeiss in 1954. Development of SEMs was started
in 1962 at Cambridge Instruments and the first SEM was launched in 1965. The GEMINI column, on which the LEO Supra35 is based, was launched in 1993. In 1995 the
LEO Electron Microscopy Cooperation was founded as a joint venture between Carl
Zeiss and Leica, were Leica and Carl Zeiss each held a 50% share in LEO. In 2001 the
ownership of LEO changed to 100% to Carl Zeiss SMT AG and in 2004 LEO was fully
integrated into Carl Zeiss SMT. Therefore, the LEO microscopes are nowadays sold
under the brand name of Zeiss. [42]
3.2.2
Considerations for SEM Design
Probe Diameter and Cathode Type
An SEM demagnifies the smallest spot of the cathode to a smaller spot on the sample.
To get high resolution also the source size should be as small as possible. Therefore,
a field emitting (FE) source is a natural choice for high resolution scanning electron
microscopes. Table 3.1 shows a comparison of different cathode types. The sources of
both field emitting cathodes (the cold FE and the Schottky FE) are much smaller
than the sources of the thermionic emitters. Also, the brightness of these two emitter types is about 2−3 orders of magnitude better than the brightness of a tungsten
or LaB6 cathode. Furthermore, the energy spread, which leads to chromatic aberrations, is smaller in FE guns. Even though cold field emitters are superior so Schottky
field emitters regarding source size and brightness, they have two major disadvantages.
First, the required gun vacuum is 1−2 orders of magnitude smaller, which requires a
more complex vacuum system. Secondly, and more importantly, as cold field emitters
are not heated they become contaminated, which leads to fluctuations in the emission
current. Therefore, the gun has periodically to be flashed (heated up to about 2000◦ C)
18
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
Emitter type
Thermionic Thermionic Cold FE Schottky FE
Cathode material
W
LaB6
W(310) ZrO/W (100)
Operating temperature [K]
2800
1900
300
1800
Cathode radius [nm]
60000
10000
≤100
≤1000
Effective source radius [nm]
15000
5000
2.5
15
2
Emission current density [A/cm ]
3
30
17000
5300
Total emission current [µA]
200
80
5
200
2
4
5
7
Norm. brightness [A/cm sr·kV]
1 × 10
1 × 10
2 × 10
1 × 107
Maximum probe current [nA]
1000
1000
0.2
20
Energy spread at cathode [eV]
0.59
0.40
0.26
0.31
Energy spread at gun exit [eV]
1.5−2.5
1.3−2.5
0.3−0.7
0.35−0.71
Beam noise [%]
1
1
5−10
1
Emission drift [%/h]
0.1
0.2
5
<0.5
−5
−6
−10
Operating vacuum [kPa]
≤10
≤10
≤10
≤10−8
Cathode life [hours]
200
>500
>2000
>2000
Cathode regeneration
not req.
not req.
required
not req.
Sensitivity to external influence
minimal
minimal
high
low
Table 3.1: Comparison of different electron sources. Values taken from ref. [44]
for a few seconds. For electron beam lithography (EBL) applications the beam current
has to be stable over time, which excludes cold field emitters and make Schottky field
emitters the preferabe choice. [43, 44, 45, 46]
Electron Beam Energy
The amount of interaction between beam electrons and substrate is a function of the
energy E of the incident electrons. The scattering cross section for elastic scattering is
inversely proportional to the square of the electron energy [43]:
2
φ0
2
−20 Z
(3.1)
· cot
σ ( φ0 ) = 1.62 × 10
2
E
2
where σ( φ0 ) is the probability of a scattering event exceeding the angle φ0 and Z is
the atomic number of the scattering atom. The Bethe relation gives the rate of energy
19
3.2. THE LEO SUPRA35 FE-SEM
loss with the distance traveled [43]:
dE
Z ·ρ
= −7.85 × 104
ln
ds
A · Em
1.166 · Em
J
keV
cm
(3.2)
where A is the atomic weight, ρ is the density, Em is the mean electron energy, and
J is the mean ionization potential. With higher energy the electrons penetrate deeper
into the sample and retain a larger fraction of their initial energy after a given length
of travel.
To increase the resolution the interaction volume has to be decreased, therefore low
acceleration voltages should be used. The Gemini column is specially designed for
low electron energies. Figure 3.2a shows the spherical and chromatic abberations of
the Gemini column vs. beam energy. Both abberations decrease with beam energy
and assure good resolution even at low acceleration voltages. In figure 3.2b the spot
diameter vs. beam energy is plotted. Even at beam energies of about 1 kV the spot
diameter is comparable with spot diameters at higher voltages. [44, 45, 46]
(a)
(b)
Figure 3.2: a) Spherical and chromatic abberations of the Gemini column. b)
Spot diameter (labeled “resolution” in the figure) of the Gemini column vs. beam
energy. Both images taken from [45]
3.2.3
The Gemini Column
The Gemini column is equipped with with a Schottky FE source, the gun vacuum
of which is sustained by a single ion getter pump (IGP). A main difference to other
FE columns is the integrated beam booster, which keeps a relatively high acceleration
voltage through the column and a column design without any cross-over between source
20
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
and sample surface [44].
If a column is optimized for low acceleration voltages the resolution for higher voltages
degrades. The approach of the Gemini column is to keep the beam inside the column
at a higher voltage and then decelerate the beam to the desired energy at the end of
the column.
A schematic of the Gemini column is plotted in figure 3.3a. After leaving the cathode
(a)
(b)
(c)
Figure 3.3: a) The main electron-optical components of the Gemini column; b)
beam path of the Gemini column. The light blue area represents the standard
operation mode. The dark blue line shows the beam path for the high current
mode which is not implemented in our system. This mode is achieved by different
lens settings. c) Zoom-in of the lower part of the Gemini column. Figures (a) and
(b) are taken from [45], figure (c) from [47]
the electrons enter the column, which is kept at a higher potential (typical 8 kV)
relative to ground. This is the so-called beam booster. Nearly the whole part of the
column is kept at this potential. After entering the beam booster the electrons pass
the condenser lens. In a classical SEM column design, the condenser lens demagnifies
the cross-over in the electron gun assembly, and adjusts the probe current by varying
the focal length of the lens. The electron image at the cross-over of the gun passes
through the condenser lens and is focused to another cross-over point. At each crossover space charge interactions between electrons increase the energy spread of the beam
as it moves down the column. This is known as the Boersch effect [48, 49, 50]. The
Gemini column is designed without this cross-over, as can be seen in the schematic
3.2. THE LEO SUPRA35 FE-SEM
21
beam path in figure 3.3b. In this sense, the condenser lens is more like the condenser
lens in optical microscopes, which forms a parallel beam. As a consequence the probe
current of the microscope (i.e. the current which reaches the sample) cannot be changed
with the focal length of the condenser lens. The beam current can only be changed
by switching between different apertures. All apertures are located on a disk-shaped
aperture foil, which is located inside the condenser lens. In the center of this plate an
aperture with a diameter of 30 µm is located. Circularly arranged around this aperture
the other apertures with diameters of 7.5 µm, 10 µm, 20 µm, 60 µm and 120 µm, as well
as an aperture-free region are located. The beam current is roughly proportional to the
square of the diameter, e.g. changing from the 10 µm aperture to the 20 µm aperture
increases the current by a factor of 4. The apertures are chosen by an electromagnetic
aperture changer which shifts the beam through the desired aperture. By shifting the
beam to the aperture-free region on the aperture foil the beam can be blanked. As
the blanking with the electromagnetic aperture changer is too slow for electron beam
lithography a separate beam blanker for e-beam lithography from Raith was installed.
This beam blanker is in principle a capacitor which sits in the upper region of the beam
booster. One plate of the capacitor has the potential of the beam booster. The other
plate is switched between the beam booster potential (when the beam state is “on”)
and the beam booster potential plus additional 250 V (when the beam is blanked). The
latter potential is generated in a separate “beam blanker unit” from Raith.
After leaving the condenser lens the electrons pass through the holes of the annular
SE detector (the so called in-lens detector), and, optionally, through an annular BSE
detector, which is not mounted in our microscope.
In figure 3.3c the last part of the Gemini column is plotted. After passing through
the in-lens secondary electron detector the electrons enter the objective lens which is
a combination of a magnetic lens and an electrostatic lens. This combination is often
referred to as an electron-optical analogon of the optical achromatic triplet, because its
electron optical function is similar: It reduces the chromatic aberration factor, which is
one of the main resolution limiting factors at low beam energies [47]. In the small gap
in the electrostatic lens, which is formed by the beam booster and the grounded pole
piece cap, the beam is retarded to the primary energy [47, 51]. Inside the objective
lens the scan coils are located, as usual.
For acceleration voltages (or extra high tention EHT) above 20 kV the voltage at the
beam booster is set to ground rather than on 8 kV, and the microscope works more or
22
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
less like a classical SEM.
3.2.4
LEO Supra35 Detectors
In-Lens SE Detector
The secondary electron in-lens detector is the most important detector in the LEO
microscope. Secondary electrons (SE) are produced as a result of interaction between
the beam electrons and weakly bound conduction electrons. As the kinetic energy of
secondary electrons is low (below 50 eV by definition) they have a shallow sampling
depth as they can only escape from within ≈10 nm of the specimen surface. [43, 52]
As the incident beam enters the specimen surface, secondary electrons of type I (SEI )
are created. When the incident beam is backscattered in the sample and leaves the
sample surface again secondary electrons of type II (SEII ) are generated. SEIII are generated by the incident beam at the apertures and by the backscattered electrons on the
chamber walls and the pole piece of the objective lens. While SEI provide good resolution, as they sample only the interaction volume of the primary beam in the first few
nanometer of the sample, SEII and SEIII have only the resolution of back scattered electrons (BSE). Therefore, if a detector detects only SEI the resolution is greatly improved
compared to other secondary electrons detectors (such as the Everhart-Thornley detector in section 3.2.4) which detect all secondary electrons. This is the most important
feature of the in-lens detector.
Figure 3.4a shows a schematic energy spectrum of electrons leaving the specimen surface. SE (green) possess low energies and carry topographic information as they origin
from near the surface, while BSE (blue) come from greater depth and carry compositional information. Besides the difference in energy both types of electrons differ
also in their take-off angles. Secondary electrons escape perpendicular to topographic
structures, while back scattered electrons emerge from the material in a wide range of
angles. [51] The secondary electrons generated at the sample surface by the primary
beam are intercepted by the retarding field of the electrostatic objective lens and accelerated upwards towards the in-lens detector [47]. Because of the chromatic aberration
of the magnetic lens the electrons are forced on different trajectories depending on
their energy. Together with the different take-off angle distribution this results in a
different distribution at the SE in-lens detector (figure 3.4b). Secondary electrons have
large divergence and wide spatial spread, whereas the spread of back scattered elec-
23
3.2. THE LEO SUPRA35 FE-SEM
(a)
(b)
(c)
Figure 3.4: Detection principle of an in-lens SE detector: a) Schematic energy
spectum of electrons emitted from a specimen surface. The secondary electrons
(SE) are indicated in green, the back scatted electrons (BSE) in blue. b) Radial
distribution of SE (green) and BSE (blue) at the in-lens detector. c) Beam path
for SE and BSE. While the BSE pass through the aperture of the in-lens detector
most of the SE collide with the detector area. All pictures taken from [51]
24
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
trons is much smaller. Hence, BSE have a closer radial distance and transit through
the aperture of the in-lens detector, while the SE are mainly collected at the in-lens
detector as depicted in figures 3.4b and 3.4c. [51]
As the beam booster is set to ground potential for acceleration voltages above 20 kV,
the retarding field at the electrostatic objective lens vanishes. As a consequence, the
electrons cannot be intercepted any more and in-lens detection is not possible for acceleration voltages above 20 kV.
SE2 Everhard-Thornley Detector
As an alternative to the in-lens detector secondary electrons can also be detected with
an Everhard-Thornley detector. This detector is mainly used at large working distances, when using tilted samples and for acceleration voltages above 20 kV.
Figure 3.5: Everhard-Thornley detector.
In figure 3.5 a typical Evenhart-Thornley detector arrangement is shown. Figure
3.6 shows the detection principle of the detector. The Evenhart-Thornley detector is
a commonly used detector for scanning electron microscopy. The front of the detector
consists of a collector with a mesh opening, the so called Faraday cage. A potential
of about ±250 V is applied to the Faraday cage to attract or reject low-energy secondary electrons. Backscattered electrons have too high energies to be influenced by
this voltage, thus only the backscattered electrons which leave the sample in the direction of the detector reach the Faraday cage. If a positive voltage is applied to the
3.2. THE LEO SUPRA35 FE-SEM
25
cage the Evenhart-Thornley detector detects a combination of secondary and backscattered electrons, while with an applied negative voltage only back scattered electrons
are detected. Inside the Faraday cage the electrons are accelerated by a 10 kV positive
biased scintillator, which is a metal-coated synthetic disk. When a secondary electron
strikes the scintillator, a photon is generated. This photon is then transmitted to a
photomultiplier through a light pipe. When the photon strikes the photo cathode of
the photomultiplier tube, an electron is emitted. The generated electron is then accelerated to the next charged plate (dynode) and produces more electrons. This process is
repeated at the following dynodes. With each bounce the number of electrons is multiplied in a cascading manner, ultimately producing typically 106 electrons per incident
electron in the Faraday cage. [53]
Figure 3.6: Detection principle of an Evenhart-Thornley detector for secondary
electrons. Low energy secondary electrons (SEI and SEII ) emitted from the sample
surface and SEIII originate from the chamber walls are attracted by the positive
voltage at the Faraday cage. Also, direct BSE, which leave in direction of the
detector, are detected. Figure taken from [53]
Centaurus BSE Detector
The Centaurus detector (K. E. Developments Inc., Cambridge, UK) is designed for the
detection of backscattered electrons at relatively low beam energies. It is constructed
as an annual device with the primary electron beam passing through a 1 mm2 aperture
of the detector. Whenever the detector is used it has first to be inserted by turning a
control knob to bring it in position just above the specimen. The ideal lens to specimen
26
CHAPTER 3. SEM - SCANNING ELECTRON MICROSCOPE
working distance is about 10 mm to 12 mm. [54, 55]
The Centaurus detector consists of a phosphorus scintillator tip [56] fitted at the end
of a light guide assembly. Operation of the detector is possible between 0.5 kV and
40 kV. The detector has an area of 120 mm2 and the thickness of the scintillator tip
under the lens is about 4 mm. [54, 57]
Even though the detector can be used at very low voltages the response rapidly falls
off and higher beam currents have to be used. Also, the atomic number contrast will
be reduced. The relative output vs. atomic numbers for different acceleration voltages
is plotted in figure 3.7. At 5 kV elements above an atomic number of 30 tend to give
similar results. If the voltage is lowered the atomic number discrimination for higher
atomic numbers may actually reverse. When lowering the voltage further the point at
which the reversal takes place shifts to lower energies. [54]
Figure 3.7: Relative output vs. atomic number of a Centaurus detector for different acceleration voltages: For high acceleration voltages higher atomic numbers
give a higher signal output. At 5 kV elements above an atomic number of 30 tend
to give similar results. If the voltage is lowered the atomic number discrimination for higher atomic numbers may actually reverse. When lowering the voltage
further the point at which the reversal takes place shifts to lower energies. [54]
Chapter 4
Sample Processing and Technology
4.1
4.1.1
Masks for Optical Lithography
The Different Masks
In this thesis three different sets of optical masks were used for the fabrication of Hall
bars and other elements for electrical characterization.
The mask set Uni-Linz-2 and Uni-Linz-3 were used for fabrication of standard Hall
bars and gated Hall bars, as well as for transmission lines and Corbino disks. The
original Uni-Linz-1 mask was designed by G. Steinbacher and was slightly modified by
N. Sandersfeld. Details about these masks are described in their theses [58, 59].
As the mask set Uni-Linz was not well suited for subsequent e-beam lithography and for
fabrication of electrical defined quantum elements a new mask was designed during my
diploma thesis [39]. This mask was used for fabrication of the single electron transistor
samples. As this mask only features a maximum of 6 split-gates, a new mask (in the
following labeled as ”Quantum Mask”) was designed during this thesis. This mask
allows very flexible gate configurations. Furthermore, the design was further improved
compared to the other masks, e.g. mark alignment of the e-beam lithographic layers
is easier and more accurate. This mask was used for the fabrication of the double-dot
sample.
27
28
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
(a)
(b)
Figure 4.1: (a) Overview of the whole ”Quantum Mask”. Different colors mark
different processing steps. Red polygons indicate the layers for Ohmic contacts,
green polygons the layers for the mesa etch, marker etch and edge bead removal,
and the blue polygons the layers for connections between bond pads and e-beam
written structures. The interior of the grey fields is color-inverted. (b) Zoom-in
of the left field of the ”Quantum Mask”.
4.1.2
Quantum Mask
In figure 4.1a the layout of the reticle is plotted. Different colors indicate different
processing steps. Red structures are the layers for the Ohmic contacts, green structures
are for etching steps and edge-bead removal steps and the blue structures are for
connecting the bond pads to e-beam written gates. Figure 4.1b shows a zoom-in of the
left upper area of the mask. The following elements can be identified on this plot:
1. Structure for edge-bead removal (EBR). The mask contains several of these structures for different sample sizes.
2. (a) Structure for Ohmic Contacts
(b) Same as (a) but with a scale which allows accurate alignment of the structure
in the middle of the sample.
3. Structures for mesa etching. Six different mask-elements are integrated on the
reticle which allow five different gate configurations plus one configuration with-
29
4.1. MASKS FOR OPTICAL LITHOGRAPHY
out gates.
4. Structures for connecting the e-beam written gates to the bond pads. The five
mask-elements are located directly below the corresponding mesa etch masks.
5. Structures for marker etch, which is essential when working with implanted contacts. Also, a scale allows accurate positioning of the mask in the middle of the
sample.
Figure 4.2a shows the mask for the Ohmic contacts. In the corner of this mask
alignment marks are integrated. This detail is plotted in figure 4.2b. The mask contains,
besides the usual cross marker for rough alignment with other layers, also a Moiré
pattern which allows very accurate alignment. Figure 4.2c shows a zoom-in of the inner
part of this mask. The double square shaped alignment marks for e-beam lithography
are located close to the Hall bar. Due to their rather simple shape the marks are well
resolved even when using slightly non-optimal process parameters and alignment with
the e-beam layer is extremely accurate. Next to the marks arrows help to find these
marks if the scan area of the SEM is slightly off target.
(a)
(b)
(c)
Figure 4.2: Mask for Ohmic contacts. (a) The whole mask. (b) Marker for alignment with other layers. An Moiré pattern beside the cross allows accurate alignment. (c) The inner part of the mask. The double square shaped marks for e-beam
alignment are located near the Hall bar.
In figure 4.3 an example for a mesa with the appropriate gate connection layer is
plotted. The configuration used in this figure was used for the fabrication of the double
30
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
dot structure. (a) and (b) show the etch mask. Only every second Ohmic contact is
connected by the mesa to the Hall bar in the middle. The other contacts are electrical
isolated from the Hall bar and are later connected to the split-gates. (c) and (d) show
the corresponding gate configuration for this specific mesa layout.
Figure 4.4 shows all layers superimposed in one single picture. The layer for Ohmic
contacts is plotten in red, the layer for the mesa etching in green and the layer for
the gate connections are plotted in blue. The mesa dimensions are slightly smaller
than the dimensions of the Ohmic contacts. This prevents a 2DEG around the Ohmic
contacts when the layers are slightly misaligned during optical lithography. The 2DEG
around the Ohmic contacts would form a current path, which could lead to a Corbino
effect when measuring in magnetic fields. The connection layer connects the e-beam
written structures with the bond pads. The layer extends from the top of the mesa to
the Ohmic contacts, but leaving the bonding field unexposed. Therefore, the bonding
field will not get metallized by the gate material, which would complicate bonding or
possibly make it impossible.
An optical micrograph of a final processed structure can be seen in figure 4.5. The
Ohmic contacts appear golden, the gate connection in a silvery color and the bond
pads have a more yellowish tint. The mesa appears in a gray color.
31
4.1. MASKS FOR OPTICAL LITHOGRAPHY
(a)
(b)
(c)
(d)
Figure 4.3: (a) and (b) (green) Layer for mesa etching, which was used for the
fabrication of the double quantum dot structure. (c) and (d) (blue) The layer for
the connections which corresponds to the mesa etch mask above.
32
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
(a)
(b)
Figure 4.4: (a) The layers for Ohmic contacts (red), mesa (green) and connections
(blue) superimposed in one single picture. The mesa structures are slightly smaller
than the Ohmic contacts in order to avoid Corbino effects when measuring in
magnetic fields. (b) Zoom-in. Only each second contact is connected to the mesa,
the others are used for connecting the bond pads to the e-beam written structures.
(a)
(b)
(c)
Figure 4.5: Optical micrograph of a finished sample. The different mask layers
can be identified by their individual color, as described in the text
4.2. OPTICAL LITHOGRAPHY
4.2
33
Optical Lithography
Since this technique is used multiple times during processing it is treated separately.
All optical exposures were done with a Karl Süss MJB-3 mask aligner which can handle
small samples. The MJB-3 has three different contact-exposure modes:
1. Vacuum contact: The sample is pressed against the mask by evacuating the space
between mask and chuck. This mode provides the best contact and has hence the
highest resolution.
2. Hard contact: The substrate is pressed onto the mask by high-pressure nitrogen.
3. Soft contact: Only a slight pressure pushes the sample against the mask. This
mode is used for samples which break easily, like GaAs.
As silicon is hard enough to bear the vacuum contact which yields the highest resolution only this mode was used here.
R
Most of the lithography was done with a Shipley S1818
resist. Only the mesa lithographic step for Hall bars with the Uni-Linz mask makes use of a negative or image
reversal resist. This step was performed with a Hoechst AZ5218 image reversal resist.
4.2.1
R
Shipley S1818
The Shipley S1800 photo resist series comprises positive resists. After spinning resist
R
S1818
for more than 40 sec at 4000 rpm and drying, the resist thickness is 1.8 µm
(therefore the resists name S1818). Drying is done for 60 sec on a hot plate heated to
115◦ C. [60]
Afterwards, the sample is exposed to ultraviolet light on the MJB-3. Best results have
been obtained with an exposure time of about 7.5 sec.1 Subsequently the resist is deR
veloped for 60 sec in Shipley MF
-319 developer.
1
As the brightness of the aligner lamp decreases over time the exposure time has to be adjusted once
in a while. The optimum exposure time is found by exposing several samples with various exposure
times and analyzing the developed samples in an optical microscope.
34
4.2.2
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Hoechst AZ5218
This resist has to be pre-baked for 60 sec at 100◦ C in a convection oven. Then, the
inverse pattern is exposed for 20 sec with the MJB-3. The image reversal step is done
by baking the exposed resist for 2 min at 120 ◦ C and then flood-exposing the whole
resist-covered area for 60 sec. AZ5218 is developed in a diluted AZ400K developer
with H2 O : AZ400K = 4:1 for 10 to 15 sec. The time between spinning and development should be kept as short as possible, otherwise longer development times may be
necessary.
4.2.3
Edge Bead Removal (EBR)
To enhance the lithographic quality an edge-bead removal (EBR) step should be performed before lithography. When spinning the resist onto the sample, the resist accumulates at the sample edges forming so called edge-beads. These beads prohibit
proper contact between the mask and the sample and lead to poor lithographic resolution. They also complicate alignment between sample and mask. The edge beads
can cause a slight displacement of the sample when pressing it onto the mask after
alignment. This leads to poor alignment and the alignment step has to be performed
several times until adjustment is good enough. Because of these two reasons, these
beads should always be removed. First the inner part of the sample has to be shielded,
leaving only the beads spare. This can for example be done by laying a small silicon
piece above the sample, or better by an appropriate designed mask for this step. In
the “Quantum Mask” several EBR fields for various sample sizes have been integrated
(figure 4.1). Afterwards, the sample is exposed with the MJB-3 for 60 sec and subsequently developed.
Mostly the whole bead cannot be cleared in a single ESR step as the intensity of light
in the bottom region of the bead is too low because of the exponential damping of
light in isotropic media. Therefore, two or three of these steps have to be performed
to remove the whole edge beads.
4.2.4
Ashing
To remove all possible remaining organic contaminations and resist residuals the sample
is always ashed for 20 sec at 200 W and 1 mtorr O2 in a commercial 2.45 GHz asher after
4.3. PREPARATION: CUTTING AND CLEANING
35
development and before the following processing steps. SEM analysis of a developed
silicon surface before and after ashing showed that an ashing time of 20 sec is sufficient.
Details about ashing and other dry etching techniques are described later in section
4.5.1.
4.3
Preparation: Cutting and Cleaning
Before processing can start the MBE-grown 4” wafers have to be cut into pieces of
suitable size. First, a piece of appropriate size is broken out of the wafer by defining a
predetermined breaking line by scratching the wafer with the diamond tip of a scribing
table and subsequently breaking it along this line. This piece is then coated with a
R
standard photo resist (usually Shipley S1818
) to protect the sample from mechanical
damage during the cutting process and to keep the sample surface clean from cutting
emulsion.
The coated sample is then glued with hot wax to a glass substrate, which itself is glued
to a aluminum chuck. This chuck is then mounted on a diamond wire saw, with which
the samples are cut to a sample size of 4×4 mm2 . A clipping of 0.3 mm resulting from
the wire dimension has to be taken into account to achieve the right sample size. A
sample size of 4x4 mm2 was chosen as samples with this size are big enough to allow
well controlled sample handling and processing. The inevitable edge beads reduce the
usable effective sample size, which inhibits the usage of much smaller sample sizes,
while using a larger size would be a waste of material.
After cutting the samples have to be detached from the chuck and the cutting emulsion
and the photo resist have to be removed. This is done by first pre-cleaning in acetone.
Afterwards the samples are cleaned in an ultrasonic cleaner for 5 min in a bath of
trichloroethylene. Subsequently the samples are cleaned in two baths of acetone for
again 5 min in an ultrasonic bath and for 5 min in methanol.
To remove remaining organic contaminations, the samples are cleaned with an oxidizing
H2 SO4 (95%) : H2 O2 (30%)=1:5 etch (Piranha etch) for 20 min. Beside the removement
of organic contaminations this step also forms a layer of SiO2 . Afterwards the samples
are rinsed in deionized water for 20 min.
Directly before processing the oxide layer is removed by dipping the samples in diluted
HF (HF(40%) : H2 O=1:5) for 30 sec. In this step remaining contaminations on the
sample surface are removed with the oxide.
36
4.4
4.4.1
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Ohmic Contacts
Introduction
The purpose of Ohmic contacts is to provide external access to the buried 2DEG.
Ohmic contacts should have a linear I-V characteristic, be stable over time and the
resistance should be as small as possible. Simply putting metal on the sample surface
doesn’t satisfy these points, as this usually results in the formation of a Schottky
diode.
When a metal is brought in contact with a semiconductor the Fermi levels of the
semiconductor become equal at thermal equilibrium. Therefore the valance and the
conduction band of the semiconductor bends up as is shown in figure 4.6. In the ideal
Figure 4.6: Idealized band diagram of a metal-semiconductor junction. The barrier height Φb is the difference between the work function of the metal Φm and
the electron affinity χ. [61]
case the resulting barrier depends on the work function of the metal Φm , the work
function of the semiconduction Φs and the electron affinity χ. Obviously the potential
barrier for electron flow from semiconductor to metal is
Φsm = Φm − Φs
(4.1)
and the potential barrier for electron flow from metal to semiconductor is
Φ b = Φm − χ
(4.2)
As the disruption of the crystal lattice at the semiconductor surface produces a large
number of surface energy states located in the bandgap the dependences in equations
37
4.4. OHMIC CONTACTS
4.1 and 4.2 are not entirely correct. The surface states can act as donors or acceptors
and influence the final determination of the barrier height. For silicon the n-barrier
heights are generally underestimated in the equations above. [21] Exact values for barrier heights have to be looked up in literature.
A metal-semiconductor junction as described above is called a Schottky diode. Electrons may pass the barrier when they have enough thermal energy (thermal emission)
or by tunneling. When a forward voltage V is applied to the Schottky diode the current
density J for thermionic emission is given by [61]:
qV
−qΦ
∗∗ 2 kT b
kT
e −1
J = A T e
qV
= Js e kT − 1
qV
for
≈ Js e kT
V ≫ kT /q
(4.3)
Where A∗∗ is the effective Richardson constant, T is the absolute temperature, q the
electron charge, Φb the barrier height and k the Boltzmann constant. For deviations
from the ideal Schottky junction the ideality factor n has been introduced:
qV
J = Js e nkT
(4.4)
As the doping concentration of the semiconductor increases, the width of the barrier
decreases and tunneling can occur. The current for tunneling is given by [21]:
−
I≈e
2(Φb −V )
~
q
m∗ ε
ND
(4.5)
where ε is the dielectric constant, ND the doping concentration and m∗ the effective
electron mass.
To form a good ohmic contact the surface of the semiconductor has to be doped highly
to ensure tunneling. Mostly, a Au/Sb alloy is used for this purpose throughout this
work.
4.4.2
Different Kinds of Ohmic Contacts
Most of the samples feature Ohmic contacts with alloyed gold/antimony contacts.
While this is a relative simple technique it has the disadvantage that it cannot be
used for samples which provide an embedded back gate layer. The gold/antimony
alloy diffuses deep into the structure and would cause a short-cut between the 2DEG
38
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
and the back gate. An alternative are ion implanted contacts. With this technique
low resistivity and good reproducibility are achieved. Because of problems with the
local implanter during the course of this work and long waiting times at an external
implanter this processing step often lasted several weeks. The problems with the local
implanter should be solved now and processing should be possible without delays. After
implantation a high temperature annealing step is necessary to cure the samples. The
high annealing temperature of 650◦ C leads to reduced carrier mobility due to dopant
diffusion. Therefore, other possibilities using silicides were also tested in this thesis.
4.4.3
Ohmic Contacts with a Au/Sb Alloy
To ensure good Ohmic contacts the natural oxide on the contact pads has to be removed with an HF-dip after the optical lithography processing steps. Immediately after
removement of the oxide the sample has to be put into the metal deposition chamber to
avoid re-oxidation. Subsequently a layer sequence of 200 Å Au, 50 Å Sb and 200 Å Au is
deposited on the sample. While the first layer is deposited in the evaporation chamber
located in the cleanroom, the next two layers are deposited in a special chamber located on the 1st floor of the institute that is used for Sb/Au contacts only. After liftoff
in acetone and a cleaning step in methanol the sample is annealed between 350 ◦ C and
380 ◦ C in N2 or Ar/H2 atmosphere.
It turned out that the formerly used process parameters for the deposition of the
last two layers where completely out of range, which led to very non-reproduceable
and much to thick layers. After some improvements (mainly decreasing the deposition
rate) the layer sequence can now be produced very accurately. However, as the former
layer thicknesses were more or less random, the ideal layer sequence has yet to be
found. Even though the used layer sequence is based on former work [59] and usually
forms Ohmic contacts, other concentrations might lead to better results. With the
densities of gold and antimony of 19.3 g/cm3 and 6.697 g/cm3 , respectively, the weight
percentage of antimony in this stack is 4.3. The eutectic concentration for antimony
in gold lies far above at 25.4±2.1 weight percent [62, 63], while the concentrations at
which Sb is well dissolvable in Au lie below 1 weight percent [64]. This fits also to the
fact that often after annealing a not bondable layer remains at the surface, which may
well be surplus antimony which was not dissolved in gold. As this layer is not bandable
it has to be removed, otherwise bonding is not possible.
39
4.4. OHMIC CONTACTS
After annealing, cleaning and optical lithography 150 Å chromium and ∼1500 Å gold
are deposited to form a bonding layer.
The contact resistance of a processed Hall bar sample over temperature is shown in
figure 4.7a. This resistance was calculated be subtracting the resistance of the Hall
bar from the total resistance of the sample and dividing by 2. The resistance at low
temperatures is about 1.35 kΩ. Figure 4.7b shows a two-point measurement of a similar
sample at room temperature and liquid helium temperature (4.2 K). In this sample the
resistace at 4.2 K is even lower, as the total resistance of about 700 Ω divides into two
times the contact resistance plus the resistance along the Hall bar. The nonlinearity
at 0 mV in the I-V characteristics is due to switching of the measurement range and is
therefore a feature of the measurement instrument and not of the Ohmic contacts.
(a)
(b)
Figure 4.7: (a) Contact resistance of sample BT771 during cooldown. The contact
resistance is evaluated by subtracting the corrected resistance for the Hall bar
from the total resistance. (b) Two-point measurements of a similar sample at
room temperature and at liquid helium temperature (4.2 K).
4.4.4
Ohmic Contacts with Ion Implanted As
Only a small number of samples was processed with this technique. In short, a shallow
and a deep ion implantation is done with arsenic ions. The shallow implant is performed
at 30 keV with a dose of 2 × 1015 cm−2 , and the deep with 65 keV and 1 × 1015 cm−2 .
Subsequently, the samples are annealed at 650◦ C for 5 min in H2 /N2 atmosphere in a
40
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
rapid thermal annealing facility. More details about this process can be found in [59].
While the Ohmic contacts have good quality, the electron mobilities are decreased
drastically (about a factor of 2).
4.4.5
Ohmic Contacts with Silicides
As the annealing temperatures of implanted contacts is rather high, the formation
of Ohmic contacts with silicides at lower annealing temperatures was tested. Three
different kinds of silicide contacts where produced:
• Nickel silicide NiSi2
• Palladium silicide PdSi
• Titanium silicide TiSi2
NiSi2 was formed by depositing 500 Å nickel and heating in N2 atmosphere for 5 min at
510◦ C. PdSi and TiSi2 were formed by deposition of 1000 Å palladium and titanium,
and annealing at 510◦ C for 5 min and 600◦ C for 30 min, respectively.
While PdSi and TiSi2 showed more or less ohmic behavior at room temperature, the
NiSi2 sample already had a non-ohmic IV-characteristic at this temperature (figure
4.8a). When cooled to liquid nitrogen temperature (77 K) PdSi showed a very nonohmic behavior. Also the behavior of TiSi2 got more non-ohmic. Cooling to lower
temperatures should even worsen these IV-characteristics.
The quality of the silicides should get much better when annealing at higher temperatures. However, when using high temperatures the advantage over implanted contacts
is gone, and one can also use this well proven technique instead of developing another
one.
41
4.5. MESA ETCHING
(a) NiSi2
(b) PdSi
(c) TiSi2
Figure 4.8: IV-characteristics of NiSi2 , PdSi and TiSi2 at room temperature and
77 K (only PdSi and TiSi2 ).
4.5
4.5.1
Mesa Etching
Overview: Dry Etching
Dry etching produces electrons, ions and reactive components in a plasma. Etching
is done by physical processes or chemical reactions. Various dry etching techniques
exist, whereas the distinction between them is often not clearly defined, as there is no
standardized nomenclature. In following the techniques
• plasma etching
42
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
• ashing
• reactive ion etching (RIE)
• inductively coupled plasma reactive ion etching (ICP RIE)
• ion milling or ion etching
will be described.
Plasma Etching
Figure 4.9 shows a typical reactor used for plasma etching.
Figure 4.9: Configuration of a typical plasma etching machine. [61]
An RF signal is applied across the two electrodes to excite the plasma. Any RF can
be used to produce the plasma, but normally a frequency of 13.56 MHz is used. The
regions near the electrodes where the plasma is suppressed is called plasma sheath. It
is about 0.1 − 10 mm thick. The plasma is generally neutral, but electrons, which have
a much higher mobility than the ions, move rapidly to the surface of the electrodes
which become negative with respect to the plasma, while the sheaths get positively
charged. This results in an electric field across the sheath. Ions at the edge of the
plasma are accelerated across the plasma sheath, perpendicular to the electrodes. This
can be used for anisotropic etching. As illustrated in figure 4.10 a masking substance
(e.g. photo resist) will prevent arriving ions from initially hitting the the sidewalls of
etching patterns. Ions strike the bottom of the etched pattern, while at the sidewalls
mainly neutral species arrive. Thus the chemical etching rate of the neutral species
determines the undercutting (figure 4.11). If etching can occur by a purely chemical
4.5. MESA ETCHING
43
Figure 4.10: Anisotropic etching driven by kinetically assisted chemical reactions.
[61]
process, it will be isotropic. When additional energy from the ions is needed to drive the
reaction, the process will be anisotropic. An illustration of the range of directionality
that can be obtained with dry etching techniques is shown in figure 4.11. [61]
Figure 4.11: The range of directionality that can be reached ranges from completely isotropic etching (completely chemical), through directional etching, to
completely anisotropic etching (no undercutting). [61]
Ashing
Photo resists are often removed by the usage of an oxygen plasma. This process is
commonly referred as ashing. Ashing can in principle be done in any dry etching
reactor using oxygen, but usually barrel-configured plasma reactors are used. In such
systems inductive coils or capacitive electrodes excite the plasma. Usually a microwave
signal of 2.45 GHz in a strong magnetic field is used to ionize gas molecules by cyclotron
resonance of the outer shell electrons. A magnetic field of 875 G (for 2.45 GHz) is applied
by coils placed around the microwave source cavity. The substrates, placed on a wafer
holder, are immersed in the plasma, and no electrical bias is applied between substrate
44
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
and plasma. As the ions are low in energy ashing in such a facility is purely chemical
and thus highly anisotropic. Furthermore, because of the low energies the substrates
do not get mechanically damaged by the ions. [61]
Reactive Ion Etching (RIE)
RIE is much alike plasma etching2 but the directional ion bombardment is used as
a fundamental part of the process. The distinction between RIE and plasma etching
is somewhat indistinct, but RIE differs a bit from plasma etching as only kinetically
assisted chemical etching is utilized. Thus, RIE is highly anisotropic. A configuration
of a RIE equipment can be seen in figure 4.12. The setup is a little different from the
plasma etching setup. An electrode is used as the sample holder like in plasma etching,
but the second electrode is normally much larger, often the whole chamber is used as
second electrode (figure 4.13).
Figure 4.12: Setup of a RIE machine: 1 recipient, 2 gas inlet, 3 pumping system, 4
RF generator, 5 blocking capacitor, 6 cathode, 7 substrate, 8 shielding, 9 plasma,
10 Anode. [65]
2
Sometimes all dry etching techniques are referred as plasma etching or plasma-assisted etching.
In this work the term plasma etching is used for a dry etching technique which is purely chemical or
utilizes kinetically assisted etching together with chemical etching.
4.5. MESA ETCHING
45
Figure 4.13: Configuration of a RIE machine with different electrode sizes. [61]
The voltage drop across the sheath for small pressures is given by:
4
V1
A2
=
V2
A1
(4.6)
where Ai is the area of the ith electrode and Vi is the voltage drop across its sheath.
Because of the large asymmetry in the electrode areas, most of the voltage drops across
the plasma sheath of the small electrode. Therefore ion energy is enhanced which leads
to enhanced directionality. Directionality can be decreased by increasing the chamber
pressure. A higher pressure in the chamber increases scattering within the gas and
therefore reduces the ion energy. [61]
Inductively Coupled Plasma Reactive Ion Etching (ICP RIE)
In an ICP-RIE the plasma density and ion energy is separately controlled by using
two different RF-sources. The plasma is driven inductively by supplying RF-power
to an inductor coil, whereas a separate RF-bias is applied to the substrate to create
directional electric fields near the substrate to achieve more anisotropic etch profiles.
An inductor coil is wrapped around or above the roof of a dielectric vessel or window of
a process chamber and a plasma is generated by supplying RF-power to the inductor
coil. The ICP source creates a high-density (1011 − 1012 ions cm−3 ), low-pressure, lowenergy plasma. As very high plasma densities are produced compared to standard
RIE systems, lower pressures can be utilized, while still achieving high ion fluxes and
etch rates. With a lower gas pressure direct etching is enhanced because of fewer gasphase collisions in the sheath. Often ICP-RIE systems are equipped with a cryogenic
46
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
chuck which cools the wafer down to liquid nitrogen temperatures. The cooling of the
chuck results in condensation of reactant gases and protects the sidewalls from etching.
Which such a setup highly anisotropic etch profiles can be achieved. For example the
Bosch advanced silicon etch process achieves aspect ratios of 20 to 30:1 at etch rates
of ∼3 µm/min. [66, 67, 68]
Ion Milling
Ion milling is a purely physical process. High energy ions (0.5 − 5 keV) impinge at the
substrate and sputter material from the surface. Ion milling is much like RIE, but no
chemical species are used. This method is very anisotropic, which means that the photo
masks will not be under-etched. Disadvantages are the low selectivity of this technique
and the slow etching rate.
4.5.2
Etching Gases and Etching Facility
As primary etching gas SF6 was used. The ionized halogen fluorine is highly reactive
with Si, and forms the volatile SiF4 [69, 70]:
Si + 4F → SiF4
(4.7)
By adding additive gases the etching rate or the selectivity can be improved [21].
Additional O2 suppresses partial recombination of the ionized gas in the the plasma.
This leads to a decreased SFx /F (x ≤ 5) recombination rate and thus to a higher F
concentration.
Plasma etching of the samples was performed with an Oxford Plasmalab 80 Plus RIE
machine at an operation frequency of 13.56 MHz. The flow rate at which the gases
are introduced into the chamber are controlled with mass flow controllers. A maximal
opened (100%) mass flow controller for O2 gas lead to a throughput of 20 sccm. The
maximal opened mass flow controller for SF6 causes a flow of 50 sccm.3
Furthermore the rf-power of the system can be controlled. The maximum possible
rf-power of this etching facility is 600 W.
3
This value is not entirely correct, as this mass flow controller is calibrated for N2 (molecular mass
∼28) gas and not for SF6 (molecular mass of about 146).
4.5. MESA ETCHING
4.5.3
47
Optimization of Etching Parameters
The etching parameters were optimized while developing a technology for gated Hall
bar structures. Here a Pd/Au gate together with the photo resist acts as an etching
mask. It soon turned out that the formally used etching parameters of 100% SF6 and
20% O2 at a pressure of 22 mtorr leads to a large undercut beneath the gate. This large
undercut can lead to problems with the gate – bond pad connection. An illustration
of a self-aligned process is plotted in figure 4.14. With a steep mesa flank the gate
connection should have contact to the mesa and hence good mechanical stability. An
undercut structure can lead to breaking of the connection as illustrated in figure 4.14.
An electron micrograph of a Hall bar structure etched at 22 mtorr is shown in figure
4.15.
Figure 4.14: Illustration of a self aligned etching process. First the gate is deposited. Afterwards the gate is used as an etch mask for the mesa. Wrong etch
parameters can lead to isotropic etching leading to an undercut beneath the gate.
This undercut can lead to problems with the gate connection.
Figure 4.16 shows electron micrographs of Hall bar structures etched with different
etching parameters. As expected, lower pressure leads to more kinetic etching and is
therefore more anisotropic, while the etching rate decreases. Also, higher rf-power leads
to steeper flanks. However, a power of more than 90 W (15%) corrodes and carbonizes
R
the employed photoresist S1818
and can therefore not be used.
As can be seen in figure 4.16 at a pressure of 5 mtorr the flanks are already sufficiently
steep. A lower process pressure just decreases the etching rate, while the anisotropy
does not increase furthermore.
Also, the flow through the mass flow controllers had to be decreased. The pressure
controller needs a few seconds to decrease the initial pressure to the process pressure
after igniting the plasma. As the time to reach the process pressure varies with each run
48
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Figure 4.15: Electron micrograph of a Hall bar structure etched at a pressure
of 22 mtorr. One can see that the etching in highly isotropic, leading to a large
undercut beneath the gate area.
this leads to non-reproducible etching depths. To minimize the time until the pressure
is tuned, but still allow a high enough pressure to ignite the plasma, the mass flow was
reduced to 20% for SF6 (10 sccm) and 5% for O2 (1 sccm).
The final etching process leads to an etching depth of 1215±75 Å in 1.3 min at 5 mtorr
with an rf-power of 15% (90W).
49
4.5. MESA ETCHING
(a) 100 mtorr
(b) 46 mtorr
(c) 34 mtorr
(d) 10 mtorr
(e) 5 mtorr
(f) 2 mtorr
Figure 4.16: Electron micrographs of Hall bar structures etched at different pressures. At lower pressures the etching becomes more anisotropic and the undercut
of the gate area vanishes.
50
4.6
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Connections I
The connections connect the bond pads to the e-beam written gate structures on the
Hall bar. When using the old SET mask set the fabrication of the connections is divided
in two parts - the first part is performed before e-beam lithography (EBL) and the
second part is performed after EBL. The first part, which is described in this section,
is only necessary when using the old SET mask set and can be omitted when using the
“Quantum Mask”.
As the relatively small alignment marks for e-beam lithography are integrated into the
connections (see figure 4.17a) an EBR step should be performed before lithography.
Otherwise the small alignment marks may not be well enough resolved to allow accurate
alignment in the SEM.
As can be seen in figure 4.17 the connections do not reach the mesa. Therefore, it
is not necessary to use a metal with a large Schottky barrier. Also, removement of
the natural oxide with HF is not recommend, as most metals stick better on oxide
than on silicon. Because of the good sticking properties, chromium was chosen as a
base material. A layer of gold on top of the chromium layer avoids oxidizing of the
chromium and enhances the contrast of the SEM images, which simplyfies subsequent
e-beam lithography. The final nominal layer thicknesses are 200 Å for chromium and
75 Å for gold. In both evaporation steps the sample should be directly placed above
the crucible or boat. In this case the real thicknesses for chromium and gold are about
300 Å and 110 Å, respectively.
After deposition lift-off is done as usual with acetone and methanol with ultrasonic
agitation.
51
4.7. E-BEAM LITHOGRAPHY
(a)
(b)
Figure 4.17: Scanning electron micrographs of a Hall bar with Cr/Au connections.
This figures show the Hall bar in a later processing step where the e-beam written
SET structure is already finished. Note that the connections do not reach the
mesa.
4.7
e-Beam Lithography
The complexity of e-beam lithography allows the user many choices for the process
parameters, making it a very flexible, but sophisticated technique. As this is of course
the most critical processing step it should be performed with special care and extreme
cleanliness.
4.7.1
Choice of the Resist and Spin Parameters
While nowadays some modern e-beam resists exist, which outperform the classical
PMMA (Polymethyl Methacrylate) resist in contrast and etch stability, PMMA remains one of the highest resolution resists available and is most commonly used.
PMMA is a long chain polymer which is solved in chlorobenzene or anisole. After the
resist is spun onto the substrate the solvent has to be baked out. Electrons from the
beam crack the polymer fragments, thereby reducing the average molecular weight.
This is accompanied by an increase in solubility and increases the etch rate [71], thus
PMMA is positive resist. When the exposure dose is 10 times larger than the optimum
positive dose, PMMA crosslinks, forming a negative resist. When using PMMA as a
positive resist the resolution is better than 10 nm, in negative mode the resolution is
52
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
below 50 nm.
PMMA can be purchased with different molecular weights. Usual weights are 50k, 200k,
496k, 600k and 950k, where 50k has the lowest weight. Each of these resist types is
available with different solid contents: 1%, 4%, 6%, 7%, 8% and 9%. The solid content
determines the viscosity and thus the resist thickness. Resists with a higher solid content lead to thicker films when spun at equal spinning speed. Also, a higher molecular
weight results in thicker resist layers. [72]
As an alternative to PMMA the copolymer resist PMMA/MA (Polymethyl Methacrylate / Methacrylic Acid) can be used. PMMA/MA consists of a mixture of 67% PMMA
and 33% methacrylic acid. PMMA/MA has a slightly higher contrast but lower resolution. Furthermore, the sensitivity of PMMA/MA is about 3-4 times higher than of
PMMA, which results in higher writing speeds. [72, 73]. However, as the writing speed
of the SEM is limited, too high writing speeds must be compensated by reducing the
beam current, which complicates adjustment of the SEM and adjustment of the focus.
Therefore, only PMMA resists were used in this thesis.
While higher resolution is possible with thin resists, thick resists are more favorable
when using a lift-off technique. The resist thickness was chosen to be about 250 nm,
which can be realized by spinning the e-beam resist AR-P 671.04 (molecular weight
950k and 4% solid content) at 5000 rpm for more then 40 sec. Afterwards the sample
is baked for 20 min at 160◦ C on a hotplate.
4.7.2
Choice of the Acceleration Voltage
The influence of the acceleration voltage is mostly attributed to the elastic scattering
cross section (Rutherford scattering cross section) σ, which is given by [74, 75]:
2
1
φ0
2
−20 Z
∼ 2
· cot
(4.8)
σ = 1.62 × 10
2
E
2
E
where σ is the probability of a scattering event to exceed an angle φ0 , Z is the atomic
number of the scattering atom and E is the energy of the electron beam.
For scattering events resulting in scattering angels >2◦ the mean free path λ can be
calculated [75]:
A
∼ E2
(4.9)
λ=
◦
NA · ρ · σ (φ0 > 2 )
4.7. E-BEAM LITHOGRAPHY
53
Here A is the atomic mass, NA the Loschmidt number and ρ the density of the material.
This results in two main implications:
1. With decreasing electron energy (acceleration voltage), the mean free path decreases. As a consequence the clearing dose, i.e. the threshold dose for zero remaining resist thickness after development, is proportional to the beam energy,
due to the increased transparency of resist layers at high voltage. [71, 76, 77, 78]
2. The maximum achievable aspect ratio is limited by forward scattering of the
primary electrons in the resist. At lower beam energies scattering is enhanced,
which leads to stronger forwardscattering. [79] This results in undercut structures instead of steep flanks. Figure 4.18 shows a Monte Carlo simulation of the
secondary electron distribution in a 3 µm thick PMMA resist. The maximum
achievable aspect ratio for this resist is 10:1 at 100 keV, and drops for 50 keV to
5:1, and in the range of 2:1−3:1 at 25 keV. [79]
Figure 4.18: Monte Carlo simulation of the secondary electron distribution at
25, 50, and 100 keV. The distribution shows that the maximum achievable aspect
ratio in 3 µm thick resist at 100 keV is about 10:1, and drops for 50 keV exposure
to about 5:1, and in the range of 2:1−3:1 at 25 keV. [79]
In figure 4.19 exposed and developed PMMA layers on a silicon substrate can be
seen. Figure (a) shows a single pixel line exposed at 30 kV and figure (b) another
single pixel line exposed at 5 kV. Both exposures where done with the same resist
with a thickness of 250 nm. As can be seen, exposure at 30 kV leads to steep flanks,
although the line is slightly broader on the bottom of the layer as on the top. This small
undercut is beneficial for lift-off processes. Exposure at 5 kV leads to a huge undercut,
the linewidth is about 2.5 times larger at the bottom than on top. While this is good
54
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
for lift-off, it is not possible to resolve dense lying structures, like the triple lines in
figure 4.19c.
(a) 30 kV
(b) 5 kV
(c) 30 kV
(d) 5 kV
Figure 4.19: PMMA exposed with lines and triple lines. (a) and (b) show a side
view from the PMMA resist on a silicon surface. (c) and (d ) show the same system
at a tilted view angle. The flanks of the developed PMMA are much steeper when
exposed with higher voltages. A triple line configuration as exposed at 30 kV in
figure (c) is not achievable at 5 kV.
Therefore, an exposure voltage of 30 kV was chosen for the production of SET
structures.
4.7.3
Calculating the Exposure Parameters
As the beam during exposure is controlled by an external deflection unit the minimum
pixel step size ps,min (the smallest difference between two individual spots that can be
resolved by the deflection unit) is given by the set magnification M of the SEM and
the resolution of the DA-converter of the deflection unit, in our case 16 bit. The write
55
4.7. E-BEAM LITHOGRAPHY
field AW , which is roughly the maximum deflection possible at a given magnification,
is of course inverse proportional to the magnification M . ps,min is given by the write
field divided by the total resolution of the DA-converter. As step size ps any integer
multiple of ps,min can be chosen:
AW ∼ M −1
AW
ps,min = 16
2
ps = n · ps,min
(4.10)
(4.11)
(4.12)
The relation between magnification and write field size is stored in a look-up table
which can be edited by any user with administration rights for the Elphy software. To
calibrate the writing fields a calibrated sample (e.g. Raith Chessy sample) should be
used. After choosing the magnification (e.g. a magnification of 1000) to calibrate the
approximate size of the write field is entered (e.g. for M =1000 a field size of 230 µm).
Afterwards a calibration routine is started. At the end of this routine the microscope
alignment parameters are calculated. To increase the accuracy of the parameters this
routine should be performed several times, until the parameters do not change anymore.
The most important parameters are the zoom factors in x and y direction. These
parameters represent the procentage of the standard maximum external voltage to
reach a deflection of the wanted field size (e.g. the 230 µm). Besides the zoom values,
also shift and rotation correction values are calculated. [80]
After choosing an adequate magnification for exposure, the beam current I and the
step sizes for areas ps,A and single pixel lines ps,l have to be set. The current and the
step size together with the needed clearing dose D influence the speed of the beam
during lithography. As the deflection of the beam is done with scan coils the energies of
which cannot be changed instantly the writing speed is limited. When choosing a too
large nominal writing speed the beam cannot follow the wanted deflection, leading to
distorted structures. As a rough rule the writing speeds for areas vA and lines vl should
be lower than 2 mm/s and 0.5 mm/s, respectively. Of course, these values cannot be
exact, as the maximal possible speeds are a function of the working distance and the
acceleration voltage. However, this values have be proofed to work well for a working
distance of 19 mm and a beam energy of 30 keV.
The area dose DA is the minimum amount of charge Q per unit area A which leads
to complete development of the resist. Q itself is given by the beam current I times
the area dwell time td,A , i.e. by the time the beam stays at each point before being
56
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
deflected to the next one:
DA · p2s,A
Q
I · td,A
= 2
⇒ td,A =
A
ps,A
I
ps,A
ps,A · I
I
vA =
=
=
2
td,A
DA · ps,A
DA · ps,A
DA =
(4.13)
(4.14)
As can be seen from equation 4.14 the beam speed for areas vA increases with increasing
beam current I and decreasing area dose DA . The beam speed can also be controlled
by setting the area step size ps,A . When, for example, doubling the step size, the area
to clear gets four times as large, which means that also the beam has to stay four times
longer at this area. As the steps between two successive spots increases by a factor of
two, the resulting scan speed is given by the original writing speed divided by four and
multiplied by two, which results in half the writing speed.
The line dose Dl is given by the charge Q needed to clear a line segment L:
I · td,l
Dl · ps,l
Q
=
⇒ td,l =
L
ps,l
I
ps,l · I
I
ps,l
=
=
vl =
td,l
Dl · ps,l
Dl · ps,l
Dl =
(4.15)
(4.16)
For single pixel lines the writing speed cannot be changed by changing the line step
size ps,l as can be seen from equation 4.16. When doubling the step size, also the time
to clear the doubled line segment doubles. However, as the step size is also doubled,
these two contributions cancel. Therefore, the used beam current I is limited by the
maximum usable line speed vl .
To find the right exposure parameters, first the beam current I has to be chosen in a
way that the line speed is below 0.5 mm/s. Then the area step size is set large enough
to keep the area speed below 2 mm/s. When the needed area step size becomes to large,
i.e. larger than about 20 nm, the beam current must be further reduced. This may lead
to very slow writing speeds for single pixel lines. Lower writing speeds of course lead
to longer writing times. However, the total writing time is usually dominated by the
time needed to write the areas, and not by the lines.
In case of the JEOL6400 microscope, the beam current can be adjusted by choosing
the aperture size and by setting the focal length of the condenser lens. For the LEO
Supra 35 only the aperture size can be adjusted. Only the apertures 7.5 µm, 10 µm and
sometimes 20 µm are usually used for lithography. For the other apertures the resulting
57
4.7. E-BEAM LITHOGRAPHY
write field size AW
minimum step size ps,min
aperture size
beam current I
area step size ps,A
area dose DA
area dwell time td,A
area write speed vA
line step size ps,l
line dose Dl
line dwell time td,l
line write speed vl
230 µm
3.5 pm
7.5 µm
0.0224 pA
7 pm
300 µC/cm2
6.563 µs
1.067 mm/s
3.5 pm
3500 pC/cm
54.7 µs
0.052 mm/s
10 µm
0.0332 pA
3.5 pm
300 µC/cm2
4.4µs
1.581 mm/s
3.5 pm
3500 pC/cm
37 µs
0.095 mm/s
Table 4.1: Typical e-beam writing parameters for an EHT (extra high tension,
i.e. acceleration voltage) of 30 kV and a write field size of 230 µm for aperture
sizes of 7.5 µm and 10 µm.
currents are too large. Typical exposure parameters for 30 kV and a write field size of
230 µm are given in table 4.1.
As next a parameter the area settling time ts,A and line settling time ts,l can be
defined. These parameter define the time, the beam has to wait before writing the
next area or line element [80]. The beam is blanked during this time. Settling times of
ts,A = ts,l = 5 ms have been proofed to be long enough to get well resolved and undistorted structures. Lower settling times lead to distorted structures, while much longer
settling times increase the total writing times considerably. To be on the safe side, the
final structures were written with an area settling time and a line settling time of 10 ms
and 15 ms, respectively. To keep the settling times low, it should be avoided for the
beam to make large steps between the elements. This can be avoided by ordering the
writing sequence of the different elements in the mask with the lithography software.
However, this can be quite a lengthy task, if the mask has several hundred elements.
The last parameter to be chosen is the working distance WD of the microscope. Of
course, a smaller working distance leads to better resolution when imaging. However,
the resolution of the e-beam lithography should not be limited by the resolution of the
58
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
beam, because the influence of scattering in the resist and the maximum resolution
possible with a given resist play a much more important role. On the other hand, a
large working distance enhances the depths of focus. A large depth of focus may be
important if the sample is tilted a bit.4 However, with a large working distance the
beam becomes more vulnerable to external perturbations. But the most important
influence on the writing quality is given by the choice of the right scan generator
(figure 4.20). The SEM offers a large range of magnification. The whole range cannot
be covered with a single scan generator. On the deflection signal of the generator
for the smaller magnifications some noise can be seen (see figure 4.20b). Therefore, a
large-magnification (i.e. small-field) scan generator should be used. Changing the scan
generator is achieved by simply changing the working distance.5 If the working distance
is increased the beam is deflected less by the scan-coils at constant magnification.
Because of the weaker excitation of the scan coils the SEM switches from the largefield scan generator to the small-field scan generator if the working distance is large
enough. For a magnification of 1000 a working distance of 19 mm works well.
4.7.4
e-Beam Lithography
Before lithography can start, one has to adjust the beam. As the sample is coated with
photoresist, adjustment is mostly done at the Faraday cup. The working distance at
which the beam is calibrated should be about the same as the one used for lithography. The most important parameters to tune are the astigmatism corrections. Badly
adjusted stigmators lead to elliptic spots and poor lithographic quality. Also, the beam
should be centered by adjusting the aperture alignment.
After calibrating of the beam, the beam current should be measured to calculate the
exact exposure parameters (i.e dwell times). Then the mask to be exposed should be
entered in the positionlist. The positionlist is a list which contains the position where
masks should be written on the sample, as well as multiplication factors for the doses,
the layers which should be exposed and so on.
Once this is done one should rotate and drive the stage to a corner of the sample.
Afterwards, the sample should be rotated in a way that the sample edges lie parallel
4
The sample is glued to the sample holder with an adhesive carbon pad. If the pad is used multiple
times remaining parts of the sample may stick to the pad and prohibit a flat contact between sample
and pad.
5
Every time the scan generator changes a clicking sound can be heard
59
4.7. E-BEAM LITHOGRAPHY
(a) WD =18.79 mm
(b) WD =18.79 mm
(c) WD =18.93 mm
(d) WD =18.93 mm
Figure 4.20: Scanning electron micrographs of particle of unknown origin near the
Faraday cup scanned with the Elphy hardware and software at a magnification
of 1000 (AW =230 µm) at 30 kV. (a) shows the whole area scanned at a working
distance of 18.79 mm with the large-field scan generator. In the zoom-in (b) a
ripple can bee seen and the structures are not well resolved. This leads to bad
lithographic resolution. In (c) and (d) the working distance is increased a bit to
18.92 mm, and the next smaller scan generator is used for the magnification of
1000. While for the large scan field no difference can be seen, the zoom-in (d)
shows a well resolved image without a ripple.
to the scan axes of the microscope. This can be either done manually, or by using the
“stage horizontal alignment” function of the microscope. Subsequently, one has to go
to a corner of the sample and define this point as the origin in the Elphy software. The
position in the positionlist are approached relative to this point. Special care should be
taken that the axis of the Elphy software and of the microscope are rotated by 180◦ .
The best way to avoid problems with this fact is to rotate the Elphy coordinate system
by 180◦ with the two-point alignment option.
After aligning the coordinate system, the beam should be blanked, a magnification of
about 100000 should be set and the stage should be moved to an area which will be
not exposed but lies nearby the exposure fields. By using the dot mode of the SEM
carbon tips (contamination dots) are grown on the sample. With these dots the correct
focus and astigmatism can be found. Special care should be taken not to expose the
resist before growing a tip. Therefore the tips should only be examined in the “reduced
raster” mode6 of the microscope. Different carbon tips are shown in figure 4.21. A
6
In the “reduced raster” mode of the SEM not the whole scan area is scanned, but only a small
user-defined area.
60
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
good carbon tip has a round shape (otherwise the stigmators are badly aligned) and a
diameter smaller than 50 nm. Growing contamination dots needs some experience and
is perhaps the most critical step of the e-beam lithography. Examining carbon tips is
easier at lower voltages, because the in-lens detector can be used and the penetration
depths of the beam is smaller.
(a)
(b)
(c)
Figure 4.21: Carbon tips: (a) shows two carbon tips grown and examined at 30 kV.
The left one is perfectly round in shape and has a diameter of about 50 nm. To
the right of this dot another small dot can barley be seen. Its diameter is smaller
than 15 nm. (b) Carbon dots grown and examined at 2 kV. The smallest dot in
this picture is about 200 nm, but smaller ones can be produced easily. (c) Side
view of grown carbon dots. The smallest one is round in shape and has an outer
diameter of about 100 nm. The tip shape of the dot can be seen.
After adjusting the focus by growing the contamination dots, the right magnification should be set with the Elphy software and the exposure can be started.
4.7.5
Post e-Beam Lithography
After exposure the resist has to be developed. This is done in a bath of AR 600-55 or
AR 600-56 for 1-3 min. Subsequently, the development process has to be stopped in a
stopper bath AR 600-60. [72]
Best results have been achieved by development for 2 min in AR 600-56 and subsequent
stopping for 30 sec. Rinsing the sample in deionized water after stopping has shown to
worsen the quality of the structures.
After development still some contaminations may reside on the sample surface. This
may either be some remaining resist, or some contaminations of the resist or the devel-
4.7. E-BEAM LITHOGRAPHY
61
oper. The contaminations stick on the developed areas, as well as on the not developed
areas where sometimes ”bridges” are formed. While contaminations on the surface can
lead to a not well defined potential of the 2DEG when applying a gate voltage, bridges
can even lead to breaks in the structures. Analysis of the resist before lift-off showed
that most of these contamination are disk-shaped. These contaminations can be removed by a subsequent ashing process. Figure 4.22 shows e-beam written structures
after deposition and lift-off. All of this structures have poor quality caused by contaminations and too short ashing times. In 4.22a notches in the gate structures can
be seen. These are not caused by bad e-beam lithography but arise from disk-shaped
contaminations. 4.22b shows a more pronounced form of a notch at the lower center
gate, which nearly leads to a break in the gate. In 4.22c two of the gate are disrupted.
And finally 4.22d shows the worst case condition with masses of breaks and notches.
In figure 4.23 the resist layer after deposition of a layer Pd, but before lift-off was
examined. 4.23a was ashed for 10 sec before metalization. A large amount of bridges
and other defects can be seen. The structure in 4.22b was ashed for 60 sec. While the
structure is broadened a bit, caused by the isotropic ashing process, nearly all of the
defects have vanished. Figure (c) shows disk-shaped contaminations on a developed
field. In (d) a side view of a double dot structure can be seen. One can see contaminations on the developed areas, as well as bridges which reach over the grooves. These
bridges will act as shadow masks for metalization and lead to breaking of the gates.
(e) and (f) show closeups of two different bridges.
After ashing the oxide has to be removed with an HF-dip for about 30 sec. Immediately after the HF-dip the sample should be put in the evaporation chamber to avoid
re-oxidization. Afterwards, a layer of 150 Å Pd is deposited on the sample. Because of
the large aspect ratio of the structures (a width of 50-100 nm at a height of 250 nm) the
sample should be mounted above the crucible, otherwise shadowing effects will occur.
Lift-off is performed in two baths of remover 1165 at 75-85◦ C for 20 min and 15 min.7
Alternatively lift-off can be done in a 65◦ C hot bath of acetone without ultrasic agitation, but remover 1165 usually leads to better results. After lift-off the sample should
be cleaned in subsequent baths of acetone and methanol. A few seconds (about 5 sec)
of ultrasonic agitation can be applied during these two steps.
7
according to the manual for remover 1165
62
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
(a)
(b)
(c)
(d)
Figure 4.22: e-beam written structures after lift-off. Contaminations lead to poor
quality of these structures. While in (a) and (b) the gates have more or less small
notches, these contaminations lead to breaks in the gates in figures (c) and (d).
63
4.7. E-BEAM LITHOGRAPHY
(a)
(b)
(c)
(d)
(e)
(f)
Figure 4.23: Resist layers of double dot structures after metalization, but before
lift-off. Sample (a) was ashed for 10 sec. Many defects can be seen on the structure.
In (b) ashing for 60 sec leads to somewhat broadened structures but vanishing
defects. (c) disk shaped contamination on a developed area. (d) side view of a
double dot structure with different kinds of defects. (e) and (f) closeups of two
different contaminations.
64
4.8
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Connections II
In this final step the SET structures are electrical connected to the bond pads. Before
optical lithography an EBR step must be performed. Otherwise lift-off without ultrasonic agitation may not be possible.
After lithography the samples are ashed for 60 sec with 200 W at a pressure of 1 mtorr to
remove possible residuals of the photo resist. Afterwards 725 Å palladium is deposited
from each side separately to avoid discontinuities in the layer caused by shadowing by
the mesa. The total of 1450 Å palladium is thicker than the mesa height to ensure a
stable connection to the gates.
As the palladium layer does not stick very well to the silicon surface no ultrasonic
agitation should be used during lift-off. Lift-off can be done in acetone, or preferential
with the remover 1165 at 75◦ C. Afterwards the sample should be cleaned with acetone
and methanol, again without ultrasonic agitation.
(a)
(b)
Figure 4.24: Scanning electron micrographs of a finished sample. The connections
reach over the mesa and electrical connect the SET structure with the bonding
pads.
4.9
Finishing the Sample: Mounting and Bonding
After successfully finishing all processing steps the sample has to be glued to a chip
carrier. For measuring the sample in a He-dewar or in the 4 He-cryostat they are glued
4.9. FINISHING THE SAMPLE: MOUNTING AND BONDING
65
to a non magnetic self-made Stycast sample holder. When measuring in the 3 He immersion cryostat or the 3 He/4 He dilution refrigerator the samples are glued to a Kyocera
24-pin CLCC (ceramic leadless chip carrier). Also this type of carrier is non-magnetic,
as it contains no nickel.
Special care must be taken for split-gate samples. Because of the small dimensions of
the gates they tend to get destroyed easily (figure 4.25). Thefore, before glueing the
sample to the mount, the sample box, the mount and the sample should have the same
potential. Balancing the potential should be done slowly with an large resistor (e.g.
100 MΩ).
Very special care must be taken when bonding. First of all the bonding machine, especially the sample chuck and the bonding tip, as well as the operator and his tools
(e.g. tweezers) should be grounded. Then the sample has again to be balanced slowly
with a large resistor to ground.
(a)
(b)
Figure 4.25: Electron micrograph of a double dot sample before bonding (a) and
after measurement and too careless removement of the bond wires (b)
66
CHAPTER 4. SAMPLE PROCESSING AND TECHNOLOGY
Chapter 5
Theory
5.1
Hall Effect
5.1.1
Classical Hall Effect
The current density j which is due to an electric field E is given by
↼
⇀
j = σE
(5.1)
↼
⇀
where σ is the conductivity tensor. For an 2-dimensional carrier gas in the x,y-plane
and a magnetic field applied in z-direction the elements of the conductivity tensor are
given in the classical limit by [81]
σxx
= σyy
σxy = −σyx
τt
e2 n
= ∗ ·
m
1 + ωc2 · τt2
e2 n
τt2
= ωc ∗ ·
m
1 + ωc2 · τt2
(5.2a)
(5.2b)
where ωc = eB/m∗ is the cyclotron frequency and τt the transport lifetime or momentum relaxation time, which is the mean time between scattering events which
completely randomize the direction of motion of the particle. In contrast the quantum lifetime or single particle lifetime τq is the time between two scattering events
and plays an important role for the non-classical Hall effect, which is treated later in
section 5.1.3.
67
68
CHAPTER 5. THEORY
↼
⇀
↼
⇀
The resistivity tensor ρ can be calculated by inversion of the σ tensor:
ρxx
= ρyy
σxx
2
+ σxy
σxy
= 2
2
σxx + σxy
=
ρxy = −ρyx
2
σxx
(5.3a)
(5.3b)
For ωc τt ≪ 1 the equations 5.2a,b and 5.3a,b can be reduced to
1
neµ
1
= RH · B ≈ rH B
ne
ρxx ≈
ρxy
−1
σxx
=
(5.4a)
(5.4b)
where
µ=
e
hτt i
m∗
(5.5)
hτt2 i
hτt i2
(5.6)
is the carrier mobility and
rH =
is the so called Hall factor [82]. In this limit the longitudinal resistance ρxx stays
constant wile the resistance perpendicular to electric field increases linearly with B.
For low temperatures the Hall factor rH for electrons should be close to unity, and
thus the carrier concentration n can be directly obtained form the slope of ρxy . A more
precise and sophisticated technique to analyze the carrier density for the non-classical
limit is described in section 5.1.3.
5.1.2
Hall Effect in Multi-Carrier Systems
For systems containing multiple (but non-interacting) carrier types or (overdoped)
structures with a doped channel parallel to the electron gas, conduction is given by
the sum of the conductivity components of each individual carrier i [83, 84, 85]:
σxx
= σyy
=
σxy = −σxy =
n
X
i=1
n
X
i=1
i
σxx
(5.7a)
i
σxy
(5.7b)
69
5.1. HALL EFFECT
For rH = hτt2 i/hτt i2 ≈ 1, which is most likely for electrons at low temperatures,
equations 5.2a and b become:
ni eµi
1 + (µi B)2
ni eµ2i B
=
1 + (µi B)2
i
σxx
=
(5.8a)
i
σxy
(5.8b)
↼
⇀
The resistivity can again be obtained by inversion of the σ tensor as described in
equations 5.3a,b. In this case neither ρxx stays constant, nor does ρxy increase linearly
with B. For a system with two different carriers ρxx is given at small magnetic fields by
1/(n1 eµ1 + n2 eµ2 ) and for large magnetic fields by (n1 µ2 + n2 µ1 )/(n1 + n2 )2 eµ1 µ2 . For
µ1 ≫ µ2 , which is the case if the second carrier type is due to a parallel channel in the
doping region of an 2DEG, ρxx for small fields is given by 1/n1 eµ1 and for large fields
by n2 /(n1 + n2 )2 eµ2 . Therefore, transport in direction of the electric field is dominated
by the high mobility carriers for small magnetic fields, and by the low mobility carriers
for high magnetic fields. The Hall resistance RH is given for low magnetic fields by
(n1 eµ21 + n2 eµ22 )/(n1 eµ1 + n2 eµ2 )2 . If µ1 ≫ µ2 RH simplyfies to RH = 1/n1 e. For large
magnetic field the Hall resistivity is given independently of the carrier mobilities by
1/(n1 + n2 )e. Thus, the Hall resistance decreases with increasing B and hence also the
slope of ρxy decreases. Typical examples for 2DEGs with low mobility parallel channels
are given in figure 6.3 in chapter 6.2.1.
5.1.3
Shubnikov-deHaas Oscillations and Quantum Hall Effect
Shubnikov-deHaas (SdH) Oscillations
If a strong magnetic field B is applied to a 2DEG the electrons are forced to cyclotron
paths. These cyclotron orbits have discrete energy values, which are given by [82]:
1
~ωc ± sgs µB B + Ei
(5.9)
En,i,s = n +
2
where ωc = eB⊥ /m∗ is the cyclotron frequency, which is determined by the effective
mass m∗ and the component of the magnetic field perpendicular to the 2DEG B⊥ , g
is the Landé factor, µB the Bohr magneton, and s the spin quantum number which
can be +1/2 or −1/2. Ei is the bottom of the ith subband caused by the quantum well
70
CHAPTER 5. THEORY
quantization in growth direction. If the temperature is sufficiently low, only the first
subband should be populated.
In consequence, the continuous density of states of the 2DEG is replaced by δ-functions
with a distance of ~ωc . In realistic systems the δ-peaks are broadened due to scattering.
The full width of half maximum Γ of the Landau levels is then ~/τq . An illustration of
the density of states is plotted in figure 5.1.
(a)
(b)
(c)
Figure 5.1: Density of states of a 2DEG in a magnetic field. (a) The ideal case,
where the Landau levels become discrete δ-functions. (b) The Landau levels are
broadend due to disorder or finite temperature. For large enough magnetic fields
the levels separate and the density of states drops to zero between the levels
(Quantum Hall regime). (c) Further broadened Landau levels. For too small magnetic fields the Landau levels overlap (Shubnikov-deHaas regime).
If the conditions
~ωc > kT
and
~ωc >
~
=Γ
τq
(5.10)
(5.11)
are fulfilled the conductivity oscillates with the magnetic field, as the spacing of the
Landau level changes. These oscillations are called Shubnikov-deHaas (SdH) oscillations. From condition 5.10 and the ratio of the effective masses in silicon and galliumarsenide m∗t,Si /m∗GaAs ≈ 3 it is immediately obvious that either the temperature T has to
be three times lower or the magnetic field three times larger in magnitude for Si-based
structures to get the same quality of SdH oscillations as for GaAs-based samples.
The number of filled Landau levels is measured by the filling factor ν. If the occupied
71
5.1. HALL EFFECT
Landau states are completely filled the carrier density is given by:
ns = gv gs
eB
·ν
h
(5.12)
where gs and gv are the spin and valley degeneracy, respectively. If ν1 levels are filled
at a magnetic field of B1 and the field is increased further to B2 where ν2 = (ν − 1)
levels are filled we get from equation 5.12:
ns h
1
1
ns h 1
=
(5.13)
−
·∆
ν1 − (ν1 − 1) = 1 =
gv gs e B1 B2
gv gs e
B
Therefore we can find the carrier density ns from the periodicity of the SdH oscillations:
ns = gv gs
e
1
· 1
h ∆B
(5.14)
If the Landau levels are assumed to be broadened into Lorentzians a more accurate
form for the SdH oscillations can be found [86, 87]:
!
∞
X
1
2πsεF
ρxx =
(5.15)
− πs zs
bs cos
1+4
σ0
~ω
c
s=1
where
bs
zs
2π 2 skT /~ωc
πs
·
= exp −
ωc τq
sinh (2π 2 skT /~ωc )
g ∗ µB B
= cos πs
~ωc
(5.16a)
(5.16b)
The cosine term in equation 5.15 represents the oscillations. For the first approximation
p
(s = 1) we find with EF = (~kF )2 /2m∗ and kF = (4πns /gs gv ) again the connection
between ns and ∆(1/B) as in equation 5.14.
Extracting the Lifetimes and Dingle Analysis
The transport lifetime τt is easily accessible from the mobility µ of the sample from
equation 5.5
µ · m∗
τt =
(5.17)
e
where the mobility is extracted from the longitudinal resistance at zero magnetic field
ρxx |B=0 = ρ0 from equation 5.4a. The quantum lifetime τq is a bit harder to find.
72
CHAPTER 5. THEORY
Sometimes the onset of the SdH oscillations together with condition 5.11 is used for a
simple estimation of τq :
ωc |SdH · τq = 1
(5.18)
A more accurate estimation for τq can be obtained from a Dingle analysis. For the
lowest order term s = 1 from equation 5.15 we find the amplitude of the longitudinal
resistance to be
∆ρxx
π
χ1
= 4 exp −
·
· z1
(5.19)
ρ0
ωc τq
sinh χ1
with
2π 2 kT
χ1 =
~ωc
and
z1 = cos
πgm∗
2m0
(5.20)
In a Dingle plot the logarithm of (∆ρxx /4ρ0 ) · (sinh χ1 /χ1 ) · (1/z1 ) is plotted versus
1/B. This should result in a linear dependence and one finds τq from the slope k of the
plot:
πm∗ 1
·
(5.21)
τq = −
e
k
To compare the effect of Landau broadening by scattering Γ = ~/2τq and temperature
kT the Dingle temperature
~
TD =
(5.22)
2πkτq
is often introduced. If the electron temperature falls below the Dingle temperature, the
quality of the oscillations should become almost insensitive to temperature.
Because of the different statistics involved for τt and τq the Dingle ratio τt /τq allows a
classification of the scattering mechanisms. All scattering events contribute equally to
τq , while τt depends on the momentum loss factor (1 − cos ϑ), where ϑ is the scattering
angle. When short range scattering occurs (e.g. due to interface charges, interface
roughness scattering or ionized dopants in the 2DEG) the Dingle ratio is close to unity.
For long-range small-angle scattering (e.g. remote impurity scattering) τt is enhanced
with respect to τq and the Dingle ratio becomes larger than unity. [1]
Quantum Hall Effect (QHE)
If the magnetic field is increased the Landau levels separate more, but also spin splitting
may occur. The regime where the density of states between the levels drops to zero is
called the quantum Hall regime. In this regime the Hall resistivity is quantized [88] and
the current is carried exclusively by edge states [89]. Whenever the Fermi level is located
5.1. HALL EFFECT
73
between two Landau levels no quasi-elastic scattering can occur at low temperatures
as all states below the Fermi level are fully occupied and an energy of ~ωc is needed to
scatter an electron to the next empty Landau state. For this condiction σxx = 0 and
σxy is given by the classical value σxy = ns e/B. From the carrier density in equation
5.12 we find that
1 1h
e2
and ρxy =
(5.23)
σxy = gv gs · ν ·
h
gv gs ν e2
In an imperfect system localized states (due to disorder by randomly distributed defects, impurities or random interface topology) at the edges of the Landau levels have
to be invoked to understand the finite width of the quantum Hall plateaus and the zero
longitudinal resistance dips [36]. When varying the magnetic field the Fermi level lies
either in delocalized (current carrying) states, where quasi-elastic scattering is possible
and ρxx 6= 0, or in localized (non-current carrying) states, in which case the lower-lying
conduction charges require a finite energy to be scattered into an empty conducting
state. At low temperatures ρxx is zero in the latter case and the Hall resistance is
constant.
74
5.2
CHAPTER 5. THEORY
Coulomb Blockade and Single Electron Transistor
In this chapter the basics of electron transport through quantum dots is shortly explained. The fundamentals of Coulomb blockade and single electron tunneling will be
introduced, as well as non-linear transport. The theoretical description presented in
this chapter is necessary to understand the basic principles of quantum dots and is essential for understanding the Coulomb blockade measurements and the analysis of the
data in chapter 6.3. More details can be found in the overview articles of Kouwenhoven
et al. [90] and of Meirav and Foxman [91]. A more theoretical view is presented in the
articles of Beenakker [92] and Averin et al. [93]. Self-consistent numerical calculations
of quantum dot structures can for example be found in [94] and [95].
5.2.1
The Quantum Dot
Introduction
A collection of electrons confined to a small volume of semiconductor material is often
called a quantum dot (QD) [91]. An illustration of a QD is plotted in figure 5.2. The QD
is coupled via tunnel barriers to macroscopic electrical leads. Electrons can enter and
leave the confined volume by tunneling through these barriers. Furthermore, the QD
can be affected by nearby electrodes via capacitive coupling. Various types of quantum
dots exist and even more techniques to produce them. I will focus only on the lateral
quantum dot defined by top split-gate structures, which is the only type of samples
produced in this thesis. However, the basic physical principles apply for all kinds of
QDs.
Lateral Quantum Dot with Split Gates
In figure 5.3a a typical geometry for a lateral (or planar) quantum dot defined by splitgates can be seen. In a heterostructure electrons are confined to a 2DEG. On the surface
of the heterostructure metallic gates are placed. When a negative voltage is applied
to these gates, the underlying 2DEG becomes depleted (figure 5.3b). Under suitable
biasing conditions a small region of the 2DEG gets isolated from the Fermi sea around.
Two narrow constrictions are formed between the gates, one between G1 and G4 and
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
75
Figure 5.2: Schematic illustration of a quantum dot. The quantum dot is separated
from the source and drain contacts by tunnel barriers. Transport through the dot
is only possible by tunneling through the barriers. A capacitively coupled gate
can influence the charge on the dot.
one between G3 and G4 (figure 5.3c). If their potential is sufficiently above the Fermi
level tunnel barriers are formed, the transparency (i.e. the conductance determined by
the tunneling probability) of which can be tuned by the applied voltages.
Usually, planar quantum dots feature at least one so called plunger gate which is
capacitively coupled to the confined region. This can either be realized by a separate
surface electrode (such as gate G2 in figure 5.3a) or by a back-gate. Its function is
to modify the electrostatic potential φ inside the dot, and thus to change the average
number of carriers hN i in it.
5.2.2
Single-Electron Charging and Coulomb Blockade
The Coulomb Gap
The isolated island of electrons in figures 5.2 and 5.3c contain a total charge of Q. At
a fixed time the number of electrons N is an integer and thus the charge on the dot is
also quantized to values of Q = N e. The charge on the dot changes by e whenever a
single-electron tunneling process occurs. The change of the Coulomb energy of the dot
76
CHAPTER 5. THEORY
(a)
(b)
(c)
Figure 5.3: a) Typical geometry of a lateral quantum dot. The sample consists of
a heterostructure with a 2DEG. A set of metallic gates on the surface is utilized
to form the quantum dot. b) By applying negative voltages to the gates the
underlying 2DEG can be depleted. c) If the voltages are well chosen a puddle
of electrons between the gates gets separated from the Fermi sea around. The
transparency of the tunnel barriers G1-G4 and G3-G4 can be tuned by the applied
voltages.
can be expressed by its total capacitance C [96]. The charging energy is given by:
EC =
e2
C
(5.24)
This charging energy becomes important once EC ≫ kB T is fullfilled. Another condition can be formulated for the opaqueness (i.e. the resistivity) of the tunnel barriers.
The minimum resistance to keep quantum fluctuations low enough is in the order of the
quantum resistance h/e2 . This value can be obtained by two different considerations.
First, the time-averaged fluctuations hδN 2 i have to be small enough to keep a quantized charge confined to the dot and therefore hδN 2 i ≪ 1. This also means that the
time τ for which the electron resides on the dot is much greater than the quantum
uncertainty δτ in this time. As the current is carried by only one electron the current
is given by e/τ . Using the Heisenberg uncertainty relation δτ δE ≥ h and the condition that the energy uncertainty δE is smaller than the the applied voltage times the
electron charge eVDS , we finally find: R = VDS /I ≥ h/e2 . [91, 97]
Secondly, this value can be obtained by assuming the typical time for fluctuation of the
charge to be δτ ≈ RC, where C and R are the dots capacitance and resistance, respectively. To get a well defined Coulomb gap of e2 /C the energy uncertainty δE has to be
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
77
below this value. Therefore, we get δτ δE ≥ RC ·e2 /C ≥ h and finally R ≥ h/e2 . [96, 91]
The Coulomb Oscillations
In figure 5.4a the potential of a quantum dot is illustrated. The reservoir to the right
of the quantum dot (source) is connected to ground and has a chemical potential of
µS . A small negative voltage VDS is applied between the left side of the dot (the drain)
and the source. Therefore, the chemical potential of the drain µD lies slightly above
µS . The discrete levels of the dot are filled with N electrons up to µdot (N ) (the green
lines). Adding one more electron would rise the electrochemical potential to µdot (N +1)
(the lowest red line). Transport is blocked as all energy levels below µS are filled and
the next free energy level lies too high in energy µdot (N ) < µD , µS < µdot (N + 1).
The potential of the dot can be influenced by the voltage VG applied to the plunger
gate. The electrochemical potential of the dot for N electrons is then given by [96, 90]:
µdot (N ) = EN +
(N − N0 − 1/2) e2
CG
− e VG
C
C
(5.25)
where C is the total capacity of the dot, which is given by the sum of all contributing
capacitances Ci
M
X
Ci
(5.26)
C=
i=1
CG is the capacity of the plunger gate, N0 the number of electrons at zero gate voltage,
and EN is the chemical potential. The single-particle state EN for the N th electron is
measured from the bottom of the conduction band and depends on the shape of the
potential [96]. The influence of the plunger gate voltage is illustrated in figures 5.4a-c.
The voltage VG is increased and the electrochemical potential is shifted downwards until
µdot lies between the chemical potentials of drain and source and µD < µdot (N +1) < µS
is satisfied. In this state (figure 5.4d) an electron is able to tunnel from the drain to
the dot (figure 5.4e - this figure is only for an illustrative purpose as this state does
not exist in reality) and the dots electrochemical potential is increased (5.4f) by:
e2
µdot (N + 1) − µdot (N ) = ∆E +
C
(5.27)
78
CHAPTER 5. THEORY
(a)
(b)
(c)
(d)
(e)
(f)
Figure 5.4: Illustration of the origin of Coulomb oscillations. The figures show the
potential landscape through a quantum dot. The inset shows the conduction of
the dot versus the plunger gate voltage VG and the applied source-drain voltage
VDS . Dark region mark conductive regions, white region mark regions with zero
conductivity. The red dot marks the operation point [VG ,VDS ]. a) The discrete
states of the dot are filled with N electrons (illustrated by red lines). The highest
occupied state lies below the chemical potentials to the left and the right, the
next free state (the lowest green line) lies above: µdot (N ) < µD , µS < µdot (N +1).
In this state transport is blocked. b) By increasing the plunger gate voltage VG
the electrochemical potential of the dot is shifted downwards. c) VG is chosen
in a way that the next free state lies between the chemical potentials of drain
and source: µD < µdot (N + 1) < µS . In this state (d) an electron can tunnel on
the dot (figure e - this figure is only for an illustrative purpose as it does not
exist in reality). When the electron enters the dot its potential is increased by
∆E + e2 /C (f). As µdot (N + 1) now lies above µS the electron can tunnel off
the dot to the source and the dot gets back to the state as in figure (d). For this
voltage sequential on and off tunneling is possible and a current flows through
the dot.
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
79
In this state the energy of the now filled level is above µS and the electron can tunnel
to the right reservoir, changing the potential back to µdot (N ). For this gate voltage the
electron can tunnel on and off the dot and follow the occupation states N → N + 1 →
N → . . .. Sweeping the voltage further again blocks transport. This is known as the
Coulomb blockade. By changing the plunger gate voltage the conduction oscillates
between zero and non-zero. This behavior is illustrated in figure 5.5. Whenever the
conductance G is zero, the number of electrons on the dot N is fixed. For regions
of non-vanishing conductance the electrochemical potential of the dot µdot shifts by
∆E + e2 /C and the number of electrons on the dot changes by one. From equation
Figure 5.5: Conductance G, number of electrons on the dot N , and electrochemical potential µdot of the dot as function of the plunger gate voltage VG . Whenever
the conductance G is zero, the number of electrons on the dot is fixed. For regions
of non-vanishing conductance the number of electrons on the dot changes by one
and the electrochemical potential of the dot µdot shifts by ∆E + e2 /C.
5.25 and the condition µdot (N, VG ) = µdot (N + 1, VG + ∆VG ) we immediately get the
80
CHAPTER 5. THEORY
periodicity of the Coulomb oscillations [96, 90, 98]:
C
e2
∆VG =
∆E +
eCG
C
(5.28)
Typical Coulomb oscillations taken from [99] are plotted in figure 5.6.
Figure 5.6: Conductance oscillations produced by sweeping the back-gate voltage.
The inset shows the scheme of the split-gates used to define the dot. Taken from
[99]
Nonlinear Transport and Excitation Spectrum
Besides the addition spectrum described above also the excitation spectrum of the
quantum dot can be probed. Here the number of electrons is held fixed, but higher
excited states can get occupied. These two spectra can be thought as analogons to the
ionization spectra and the internal excitation spectra of atoms [91, 100].
The excitation spectrum is probed by holding the plunger gate voltage VG fixed and
measuring conductance in dependence of VDS . In figure 5.7a the potential landscape
of a quantum dot is plotted. In this state no state lies between the chemical potentials
to the left and the right (µdot (N ) < µD , µS < µdot (N + 1)) and transport is blocked.
In the drawing the source barrier is assumed to be more opaque than the drain barrier
and most of the voltage will drop on the source barrier. In figure 5.7b VDS is decreased
and chemical potential µD is therefore raised. As the source is kept on ground potential
the electrochemical potential of the dot is increased by the fraction of VDS that drops
across the source tunnel barrier:
CD
VDS
(5.29)
∆µdot =
C
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
(a)
(b)
81
(c)
Figure 5.7: Illustration of probing the excitation spectrum. a) No states lie between µD and µS and transport is blocked. b) VDS is decreased and the chemical
potential of the dot is raised. c) If VDS is large enough the highest occupied state
lies between µD and µS . Now an electron can tunnel off the dot and a current
flow is initiated.
where CD is the capacitance between the dot and the drain lead. In figure 5.7c the
voltage is further decreased until the highest occupied state (the highest red line) lies
between the chemical potentials of the leads. Now an electron can tunnel off the dot
and a current flow is initiated. By tuning the transparency of the source and drain
barriers or by applying a different gate voltage transport may as likely occur via the
lowest non-occupied state (the lowest green line) instead of the highest occupied state.
If µD is increased further a second level may become accessible. Now an electron can
tunnel off (into) the dot from (to) two different energy levels. These two levels do not
only differ in energy but most likely also in their tunnel rates. Because of the Coulomb
energy no other electron can tunnel off (into) the dot until an electron enters (leaves)
the dot. This leads to complex structures in the conductance. While most likely the
conductance is increased when more possible conductance channels become accessible,
the conductance may also decrease when the tunneling time of the second level is
longer than that of the first one. This results in a negative differential conductance
G = ∂I/∂VDS . A typical plot of the differential conductance G taken from [101] is
plotted in figure 5.8. Peaks in G correspond to discrete energy levels.
By measuring the differential conductance ∂I/∂VDS in dependence of the plunger
gate voltage VG and the source-drain voltage VDS the whole spectrum of the quantum
dot can be probed. Such a measurement is plotted in figure 5.9 [102]. The regions where
the number of electrons N is fixed and transport is blocked appear in diamond-shaped
82
CHAPTER 5. THEORY
Figure 5.8: Differential conductance as a function of VDS . The peaks can be
associated with excited electronic states of the dot. The inset shows the current
|I| versus VDS of the same data. [101]
areas, the so called Coulomb diamonds. Outside the diamonds lines run parallel to
their sides, which can be identified as excited states.
5.2.3
Extracting Dot Parameters from Measurements
To estimate important dot parameters, like the capacitances and the dots size, from
the measurements some assumptions have to be made. First we assume that the dot’s
total capacitance C consists of the sum of the capacitances of the source, drain and
gate, and that all other contributing influences can be neglected:
C = CD + CS + CG
(5.30)
Further, we assume the capacitances to be independent of the number of electrons on
the dot.
Gate Capacitance
From equation 5.28 we see that the periodicity of the Coulomb peaks is a function of
the total dot capacity C, the gate capacity CG and the excitation energy ∆E. When we
assume ∆E ≪ e2 /C, which should be a good approximation for lateral semiconductor
quantum dots, equation 5.28 simplifies and we get the gate capacity from the periodicity
of the Coulomb peaks:
e
CG =
(5.31)
∆VG
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
Figure 5.9: a) Differential conductance, g, as a function of drain-source voltage,
VDS , and gate voltage, VG , with gray scale values of g given at the top of the
figure. White diamonds are blockaded regions where the electron number is fixed.
Dark diagonal stripes (peaks) parallel to the diamond edges correspond to QD
levels in resonance with the source or drain Fermi levels. b) One trace from (a)
at VDS = 0.57 mV (dotted line in (a)). Decreasing average g is attributed to
capacitive coupling between VG and adjacent gates. (Inset) Scanning electron
micrograph of the QD studied. c) Coulomb diamond schematic, with colored
stripes corresponding to different quantum levels in the dot. Stripes parallel to
the positive slope edge of the Coulomb diamonds are not shown because they
were not resolved in the experiment.[102]
83
84
CHAPTER 5. THEORY
Drain Capacitance
(a)
(b)
(c)
Figure 5.10: Estimation of CD from the stability plot of the dot. a) The dot is
in a conducting state: µD > µdot & µS . b) VDS is decreased and µD is increased.
Also µdot is increased by −e∆VDS CCD . c) To again align µdot with µS a positive
D
gate voltage difference must be applied: ∆VG = −∆VDS C
CG
The drain capacitance can be estimated from the negative slopes of the Coulomb
diamonds. First we assume the dot to be in a conducting state, as illustrated in figure
5.10a. A small negative voltage is applied between drain and source and the highest
occupied state is aligned with the chemical potential of the source: µD > µdot & µS .
In this state a small positive change in the gate voltage would block transport. In
figure 5.10b VDS is decreased and the chemical potential on the drain-side is therefore
increased by −e∆VDS . Also the electrochemical potential of the dot is raised by the
amount of ∆VDS that drops along the dot: ∆µdot = −e∆VDS CCD . To again align µdot
with the chemical potential of the source, µS , one has to positively change the gate
voltage so that −∆µdot = −e∆VDS CCD (figure 5.10c), and we find:
0 = ∆VDS
⇒ CD =
CG
CD
− ∆VG
C
C
∆VG
CG
∆VDS
(5.32)
(5.33)
By changing VDS in small amounts and compensating the electrochemical potential of
the dot with VG one can scan the dot along the edge of the diamond with the negative
slope.
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
(a)
(b)
85
(c)
Figure 5.11: Estimation of the total capacitance with the positive slope of the
Coulomb diamonds. a) The electrochemical potential of the dot is aligned with
µD which is slightly below µS . Therefore the dot is in a conducting state. b)
VDS is increased and therefore µD and µdot decrease. c) The gate voltage VG
is increased until
again aligned with the chemical potential of the drain:
µdot is D
∆VG = ∆VDS CCG − C
CG
Total Capacitance
From the positive slope of the Coulomb diamond one cannot estimate CS as might have
been assumed. Instead one gets the total dot capacity C. A direct measurement of CS
can only be performed by switching drain and source. Estimating the total capacitance
of the dot is similar to the estimation of CD , only that we now keep the electrochemical
potential of the dot aligned with µD . In figure 5.11a a small positive VDS -voltage is
applied and VG is chosen in way that µdot is aligned with µD : µD . µdot < µS . In this
state transport is possible and a small positive change in the gate voltage would block
transport. If now VDS is increased the potentials µD and µdot are decreased by −e∆VDS
and −e∆VDS CCD , respectively (figure 5.11b). Instead of compensating the change of µdot
with VG , as we have done above for the estimation of CD , we now increase VG to align
µdot with the chemical potential of the drain. This is depicted in figure 5.11c. We finally
find:
∆VDS = ∆VDS
⇒ C =
CG
CD
+ ∆VG
C
C
∆VG
CG + CD
∆VDS
(5.34)
(5.35)
86
CHAPTER 5. THEORY
Dot Diameter and Number of Electrons
From the total capacitance C the dot diameter can be estimated. Basically, the dot is
assumed to be an isolated metallic disk. From classical electrodynamics it is well know
that the capacitance of an isolated metallic disk is given by C = 8εr ε0 R and we find
the dot diameter d:
d≤
C
4εr ε0
(5.36)
where εr is dielectric constant of the material surrounding the disk. As in reality the
disk is not completely isolated from the environment equation 5.36 only gives an upper
limit for the diameter (see section 5.2.4). An upper limit for the number of electrons
N in the dot can now be calculated with the carrier density n of the 2DEG:
2
d
π
N ≤n
2
(5.37)
Dot Size with Exited States
Another possibility for the estimation of the dot size is given by the energy level spacing
of exited states. The level spacing for a two-dimensional rectangular quantum well with
infinite barriers is given by:
∆E =
2 2 2
1
~π · ∗
π
m · Lx L y
(5.38)
where Lx and Ly are the dot dimensions in x and y direction, respectively. Therefore,
the dot area A is given by:
2~2 π
1
A = L x Ly =
·
∗
m
∆E
(5.39)
The number of electrons N can again be obtained from the product of the carrier
density n times the area A, n · A as in equation 5.37.
5.2. COULOMB BLOCKADE AND SINGLE ELECTRON TRANSISTOR
5.2.4
87
Estimation of Errors
Capacities
The slopes for the estimation of the drain capacitance, kCD , and the total capacitance,
kC , are given by:
∆VG
|negative slope
∆VDS
∆VG
|positive slope
kC =
∆VDS
k CD =
(5.40)
(5.41)
With the rules of error estimation [103] one can estimate the maximum relative error1
of the total capacitance:
∆C
. ζk + ζVG
(5.42)
C
G)
where ζVG is the relative error of the periodicity, ∆(∆V
, and ζk is the maximum rela∆VG
∆kCD ∆kC
tive error of the slopes ζk = max kC , kC .
D
As the diameter of an isolated metallic disk is directly proportional to the total capacitance the relative error is the same as for C:
∆d
. ζk + ζVG
d
(5.43)
However, as the quantum dot is never completely isolated from the environment the
largest error arises not from the error of the slopes, but from the wrong assumption of
an isolated dot. The relative error for the occupation of the dot is given by:
∆N
. 2 · (ζk + ζVG )
N
(5.44)
Again, the error for the occupancy of the dot is only applicable for a disk which is
totally isolated from the environment.
Non-Isolated Disk
The biggest error arises from the assumption that the quantum dot is an isolated disk
with a capacity of Ciso = 8εr ε0 R. In reality the disk is never completely isolated from
1
If y = f (x1 , . . . , xk ) ⇒
errors.
n |∆y|
1 X ∂f (x1 , . . . , xn )
≤
∆x
i , where ∆y and ∆xi are the absolute
|y|
|y| i=1
∂xi
88
CHAPTER 5. THEORY
the environment, especially in regions where transport is not completely blocked. If
the disk is brought from isolation to coupling with the environment, the capacity is
enhanced. The capacity of a non-isolated disk, Cni , is always bigger than that of an
isolated disk, even when both disks have the same geometry:
Ciso ≤ Cni
(5.45)
Even if the calculated value for the total capacity, C, in section 5.2.3 is correct, the
dot diameter, d, is always overestimated, as the capacity of the isolated disk would be
smaller. How much the real value for d varies from the estimated one is generally hard
to say. However, the calculated value for d gives an upper limit for the dot diameter.
Exited States
One problem with the estimation of the dot size with excited states is that, if any
states are seen, not all levels are necessarily resolved. If any excited level is seen, even
more levels may lie in between.
Further, the formula given in equation 5.39 is only applicable for a rectangular quantum dot with infinite barriers. Usually, neither the dot shape is rectangular nor are
the barriers infinite. However, usually the estimation of the excitation energy is often
amazingly accurate, at least for systems with few electrons. Also, for many-electron
systems the energy spectrum is most likely different from the one-electron picture on
which equation 5.39 is based.
Further problems may possibly arise from the spin splitting of the states. In quantum dots the spin-orbit interaction usually leads to lifting of the spin degeneracy. For
multi-electron-dots the magnitude of the spin splitting is hard, if not impossible, to
predict.
Chapter 6
Measurements
6.1
6.1.1
Measurement Setups
Cryostats
Electrical pre-characterizations of fabricated samples were done by immersion of the
samples into liquid nitrogen or helium. Further electrical measurements at low temperatures were performed in three different cryostats. A 4 He cryostat was used for testing
the MBE grown samples at temperatures between 1.5 K and 4.2 K. The SET samples
were measured in a 3 He cryostat and a 3 He/4 He dilution refrigerator with base temperatures of 270 mK and 30 mK, respectively.
Samples are introduced into the 4 He system with self-made Stycast sample holders,
while the other two cryostats are equipped with chip carrier holders for the Kyocera
CLCC (ceramic leadless chip carrier). As the 3 He refrigerator was originally equipped
and wired for the Stycast holders I rewired the system for the Kyocera CLCC during
this thesis.
4
He Cryostat with VTI
The 4 He cryostat consists of a 4 He immersion cryostat with a variable temperature
insert (VTI). The sample is placed inside the VTI, which is inserted in the helium
bath of the cryostat. Outside of the helium bath a double vacuum Dewar vessel (with
an integrated liquid nitrogen cooling shield) screens the liquid helium from the heat
outside. The VTI consists of two steel pipes. A vacuum between the pipes isolates the
89
90
CHAPTER 6. MEASUREMENTS
sample chamber from the helium bath. Liquid or gaseous1 helium can be introduced
into the sample chamber through a heatable capillary by opening a needle valve. By
pumping the helium gas the boiling point is reduced and temperatures between 1.5 K
and 4.2 K can be reached. [104] For temperatures above 4.2 K the brazen-plate where
the sample is mounted can be heated by resistive heating. Heating temperatures up to
room temperature are accessible.
The system is equipped with a supraconducting coil which is placed in the helium bath.
A maximum magnetic field of 7 T is possible by cooling the solenoid to liquid helium
temperature. By cooling the helium bath to 2.2 K by pumping, a magnetic field of 8 T
can be generated. [104]
3
He Cryostat
TM
The 3 He refrigerator consists of a 4 He immersion cryostat with a 3 He Heliox insert.
The main 4 He bath is thermally shielded from the surroundings by an outer vacuum
chamber (OVC). An inner vacuum chamber (IVC) isolates the 3 He chamber from the
main helium bath. 3 He is condensed by pumping through a 1K-pot, which is cooled
to 1.5 K by evaporation of 4 He. A heatable sorption pump (activated carbon pump)
reduces the vapor pressure of the 3 He when its temperature is below 40 K. With this
setup a temperature down to 270 mK is achievable. [104, 105, 106]
Once all of the 3 He gas is stored in the sortion pump it has to be released by heating
the pump above 40 K. Therefore, low temperatures of about 300 mK can only be kept
for about 2 days.
By cooling the integrated supraconducting solenoid to 4.2 K a magnetic field of 14 T
can be generated. Cooling further down to 2.2 K by a λ-pump2 allows magnetic fields
up to 16 T. [104, 106]
3
He/4 He Dilution Refrigerator
A schematic diagram of a dilution refrigerator is plotted in figure 6.1. In principle a
mixture of 4 He and 3 He is cooled below a critical temperature and separates into two
1
When measuring at temperatures above 4.2 K the inflowing helium can be pre-heated by a capillary heater.
2
The λ-point is the point of phase transition between helium I and helium II at a temperature of
2.17 K at a pressure of 50.4 mbar. The λ-pump is a rotary pump and cools the helium reservoir to a
temperature of about 2.2 K (i.e. the λ-point) by evaporation of 4 He.
6.1. MEASUREMENT SETUPS
91
phases. The lighter concentrated phase is rich in 3 He and is usually labeled ’liquid 3 He’,
while the diluted phase is termed ’3 He gas’. Cooling is obtained by ”evaporating” 3 He
from the concentrated phase to the dilute phase in the mixing chamber. [107]
The 3 He/4 He mixture is condensed by pumping through a 1 K pot with a temperature
of about 1.2 K. A temperature below 0.86 K is required to get phase separation. This
is achieved by cooling the incoming 3 He gas by reducing the vapor pressure in the
still. 3 He is pumped away from the liquid phase in the still, the temperature of which
is about 0.6 to 0.7 K. As the vapor pressure of 3 He is about 1000 times higher than
that of 4 He, mostly 3 He evaporates. Therefore, the concentration of 3 He in the diluted
phase in the still becomes lower than in the mixing chamber and the resulting osmotic
pressure difference drives a flow of 3 He to the still. The removed 3 He is used to cool
the incoming 3 He by heat exchangers and is pumped back by the external pump to
the concentrated phase. In this setup a base temperature lower than 30 mK can be
reached. [107]
A superconducting magnet consisting of solenoid sections allows magnetic fields of 15 T
(17 T) at 4.2 K (2.2 K). [107]
Further details and information about modifications of the system can be found in
[107] and in the PhD thesis of G. Pillwein [108].
6.1.2
DC Measurement Setup
The DC measurement setup was only used with the 4 He cryostat. Most of the Hall
measurements and other electrical characterizations were performed in this cryostat
with the DC setup. A list of all measurement devices used is given in table 6.1. All
instruments beside the Oxford PS 12010 and the Oxford HLM2 are controlled with
a LabView software that is on a PC connected to the devices with a GPIB (IEEE488.2) interface. The Oxford PS 12010 drives a current through the superconducting
scan coil. For a more accurate measurement of the resulting field the current through
the coils is measured by the voltage over the current shunt with a Keithley 196. The
temperature of the sample is measured and controlled by a Lakeshore DRC-93 CA
temperature controller. A Keithley 224 drives a current through the device. To get
more accurate measurements and to cancel thermovoltages or other offset voltages,
the current is altered periodically between positive and negative values. The resulting
voltages at the structure (e.g. longitudinal voltage and diagonal voltage on a Hall bar)
92
CHAPTER 6. MEASUREMENTS
Figure 6.1: Schematic diagram of a dilution refrigerator. [109]
93
6.1. MEASUREMENT SETUPS
Devices for the 4 He
model
#
10
Oxford PS 120 Magnet Power Supply 1
Oxford HLM2 Helium Level Meter
1
Keithley 196 System DIMM
1
Lakeshore DRC-93 CA Temp. Contr.
1
Keithley 224 Prog. Current Source
1
Fluke 8842A Digital Multimeter
2
Keithley 2400 Source Meter
0-1
Keithley 236 Source Measure Unit
0-1
Cryostat
usage
drives a current through the coil
helium level measurement
measures the current shunt voltage
controls the sample temperature
drives the source-drain current
measures DC voltages
LED current or gate voltage
LED current or gate voltage
Table 6.1: Devices for the 4 He Cryostat
are measured with two Fluke 8842A multimeter. Finally, the carrier density of the
samples can be controlled by an installed LED, or, if present, with the gate of the
device. The current through the LED and the voltage of the gate are defined by a
Keithley 2400 and a Keithley 236. The latter two instruments have to be shared with
the 3 He and the dilution refrigerator systems.
6.1.3
AC Measurement Setup
The ac measurement setup was used with the 3 He/4 He dilution refrigerator system, as
well as with the 3 He cryostat. Both electric setups are similar. They only differ in the
cryostat-specific control units, like temperature controllers, helium measurement, gas
handling system, and so on. All of the specific instruments, as well as two lock-in amplifiers (Stanford Research SR830) and one digital oscilloscope (Tektronix TDS 3012B)
normally stay fixed within the setup (see tables 6.3 and 6.4). All other instruments
have to be shared between the two systems (table 6.2).
In the following the ac setup used for the measurement of the SET devices, as plotted in figure 6.2, is described. A small ac signal is applied on the drain side (D) of the
Hall bar by the sine wave output of lock in amplifier 1 (Standford Research SR830).
As the voltage of the output is too large compared to the level spacing of quantum dot
devices the voltage is reduced by a voltage divider. Two resistors of 1 MΩ and 100 Ω
divide the voltage 1 : 10000. As the resistance of the Hall bar is large against the 100 Ω
94
CHAPTER 6. MEASUREMENTS
Devices shared for the 3 He Crystate and
model
#
Stanford Research SR560 Preamp
1
Stanford Research SR570 Current Preamp 1
Femto DLPVA Voltage-Amplifier
1
Femto DLPCA-200 Current Amp.
1
Keithley 2400 Sourcemeter
1
Keithley 236 Source Measure Unit
1
Keithley 2000 digital multimeter
2
Keithley 2700 digital multimeter
1
Fluke 8842A Digital Multimeter
0-2
the Dilution Refrigerator
usage
preamp for lock-in
sample current preamplification
preamp for lock-in
sample current amplification
VDS , gate voltage
gate voltage, VDS
probes a gate voltage or VDS
probes gate voltages
measures DC voltages
Table 6.2: Devices shared for the 3 He Cryostat and the 3 He/4 He Dilution Refrigerator System
Devices used for the 3 He
model
# usage
Oxford IPS 120-10 Magnet Power Supply 1 drives a current through the coil
Oxford Helium
1 helium level measurement
Oxford ITC 4 Temperature Controller
1 controlles the sorb temperature
Oxford ITC 503 Temperature Controller
1 controlles 1 K pot, 3 He pot
and sample temperature
Lakeshort 340 Temperature Controller
1 measures the sample temperature
Tektronix DM 5120 Digital Multimeter
1 measures the current shunt voltage
Stanford Research SR830 Lock-In Amp.
2 current and voltage, gate voltage
Keithley 213 quad voltage source
1 source-drain voltage
Tektronix TDS 3012B Oscilloscope
1 probes lock-in voltages
Table 6.3: Devices used only with the 3 He Cryostat System
6.1. MEASUREMENT SETUPS
Devices used for the 3 He/4 He Dilution Refrigerator
model
# usage
Oxford IPS 120-10 Magnet Power Supply 1 drives a current through the coil
Oxford ILM211 Level Meter
1 measures N2 and He levels
4
Oxford SMC Stepper Motor Control
1 sample rotation
PS
Oxford IDR Temperature Control
1 controlles all temperatures
IGH
Oxford Kelvinox
Gas Handling
1 valves and gas handling system
Nation Instruments GBIP-120A
1 Isolates the system from the PC
Stanford Research SR830 Lock-In Amp.
2 current and voltage, gate voltage
Tektronix TDS 3012B Oscilloscope
1 probes lock-in voltages
Table 6.4: Devices used only with the 3 He/4 He Dilution Refrigerator System
Figure 6.2: ac measurement setup used for the measurement of the SET and the
double SET structures. This setup applied for the 3 He/4 He dilution refrigerator
as well as for the 3 He cryostat.
95
96
CHAPTER 6. MEASUREMENTS
resistor, especially when the device is operated in the Coulomb blockade regime, the
voltage on the drain side should only depend on the output voltage of the lock-in amplifier and on the two resistors. However, the exact voltage is not really important, as
the voltage drop along the SET structure is measured at the two adjacent side contacts
of the Hall bar in a current-free mode. The voltage drop is amplified with a voltage
preamplifier (Stanford Research SR560 or Femto DLPVA) and measured at the voltage
input of a lock-in amplifier. Alternatively, one can omit pre-amplification and measure
the voltage drop with the A/B inputs of the lock-in amplifier. The current through
the Hall bar is amplified with a current amplifier (Stanford Research SR570 or Femto
DLPCA-200). The current amplifier converts the current strength to a proportional
voltage, which is measured at the voltage input of a lock-in. If no current amplifier is
available, the current can also be measured with the current input of the lock-in amplifier. To synchronize both lock-in amplifiers the TTL output of lock-in 1 is connected to
the reference input of lock-in 2. An additional DC source-drain voltage is applied with
a DC voltage source. To enhance the accuracy the voltage source is again connected
to drain by a voltage divider of 10 kΩ : 100 Ω. As DC voltage source most of the time
a Keithley 2400 was used. For the 3 He setup also the quad voltage source Keithley
213 was utilized. The voltages of the gates are controlled by the auxiliary outputs of
the lock-in amplifiers. Each lock-in offers four auxiliary DC outputs. The total sum
of eight outputs is sufficient to operate even the double dot structure. The auxiliary
outputs are connected to the gates over 1 MΩ resistors, which are placed in a self-built
resistor box. These resistors mainly reduce possible gate leakage currents, especially at
high temperatures. Once the sample is cold the leakage currents should be negligible as
the gate resistance should be at least more than 100 GΩ and the whole voltage drops
across gate and 2DEG. To enhance gate control a DC voltage source (e.g. Keithley
2400) can be used instead of the auxiliary outputs. Note that in general the quality
of the auxiliary output regarding to voltage stability and noise cannot compare with
high quality voltages sources such as the Keithley 2400 or the Keithley 236. However,
this solution, caused by a lack of high-quality voltage sources, has proofed to provide
sufficient results.
6.2. HALL MEASUREMENTS
6.2
97
Hall Measurements
The main reasons for measuring samples with a Hall technique are for one to find suitable epi-layer sequences for the realization of quantum structures, as well as to provide
the crystal growers with further information about their samples. From the analysis of
the Hall measurements growth parameters may be tuned and the quality of successive
structures maybe enhanced. While high mobility is per se not essential for quantum
devices, as transport is dominated by narrow constrictions or tunnel barriers, mobility
analysis still gives information on the crystal quality. Low mobilities are usually associated with high defect levels, which may inhibit working SET-structures. For example,
local modulation of the 2DEG could lead to a pinch-off of tunnel barriers, or defects
may charge and de-charge nearby a structure and disturb measurements because SETs
are very sensitive to charge fluctuations.
All measured samples were grown by D. Pachinger during his diploma thesis [34]
and are similar to sample MSG 1317 which was grown by M. Mühlberger during his
PhD thesis [110]. The sample MSG 1317 provides a remarkable high mobility of about
300000 Vs/cm2 and fractional quantum Hall effect [111] as well as the metal insulator
transition [112] was measured on this structure in the group of D. Tsui.
6.2.1
Hall Measurements at 1.5 K
Samples PSG n1377 and PSG n1378
Hall measurements of the samples PSG n1377 and PSG n1378 at various illuminations
are plotted in figure 6.3a and b, respectively. Both samples were only measured in the
4
He cryostat with a DC measurement setup and showed a parallel channel in addition
to the high mobility 2DEG. This low conducting channel is formed in the doping region
as for both samples the nominal doping concentration was too high to be completely
transfered into the 2DEG. To analyze the mobilities and carrier concentrations of the
samples a GUI-featured Matlab program was written to automatically fit the measured
resistances ρxx and ρxy to the theoretical curves which are calculated from the formulas
in section 5.1.2. The obtained carrier densities match well with the carrier densities
extracted from the periodicity of the SdH oscillations with equation 5.14.
Sample PSG n1377 was measured at a temperature of 1.7 K. The carrier concentration n in the 2DEG varied from about 6.4 × 1011 cm-2 without illumination to
98
CHAPTER 6. MEASUREMENTS
6.5 × 1011 − 7 × 1011 cm-2 for illumination of the sample with a continuous LED current
between 20 nA and 10 µA. The mobility varied from about 130000 Vs/cm2 without
light to 130000 − 150000 Vs/cm2 under illumination.
Sample PSG n1378 was measured at a somewhat lower temperature of 1.45 K. Analyzing the periodicity of the SdH oscillations, as well as fitting the curves the the theoretical curves calculated from the equations in section 5.1.2, showed that the carrier
density could be increased from 7.2 × 1011 cm-2 to 8.7 × 1011 cm-2 by constant illumination. The carrier mobility in the 2DEG changed from 120000 Vs/cm2 to 130000 Vs/cm2
when illuminated with a LED current of 5 µA. Carrier mobilities of ∼ 4000 Vs/cm2 and
∼ 2000 Vs/cm2 were found for the parallel channel without illumination and for illumination with 5 µA, respectively. By illuminating the sample the carrier density in the
parallel channel increased from 4.55 × 1010 cm-2 to 6.2 × 1010 cm-2 .
These samples are unsuited for the fabrication of quantum devices. First of all, all
electrons should be located in the 2DEG and no parallel channel should be formed.
Secondly, the high concentration in the well leads to several problems. High gates voltages are necessary to deplete the 2DEG beneath the gates which could lead to high
leakage current. Furthermore, it is highly probable that not only the ground state is
occupied but at least on higher lying state.
Samples PSG n1417 and PSG n1418
Figure 6.4a shows SdH oscillations and QHE of sample PSG n1417 measured at 1.4 K
with various illuminations. In figure 6.4b the sample was not exposed to light and
the carrier concentration was varied by changing the voltage of a top gate. Carrier
concentrations were analyzed by the periodicity of the voltage dips in the longitudinal
resistance ρxx (equation 5.14) and extracted from the slope of ρxy at low magnetic
fields (equation 5.4b) (e.g. before the quantum Hall effect is observed). The values
from both methods match perfectly, which means that the Hall factor rH (eq. 5.6) is
close to unity, as expected.
The variation of the carrier concentration with the top gate voltage VG at different
illuminations is plotted in figure 6.4c. The carrier density without illumination at a
gate voltage of VG = 0 V is 3.25 × 1011 cm-2 . With illumination the carrier density
can be increased to 4.1 × 1011 cm-2 . By applying negative voltages to the top gate the
99
6.2. HALL MEASUREMENTS
(a)
(b)
Figure 6.3: Hall measurements of samples PSG n1377 and PSG n1378. (a) Sample
PSG n1377 was measured at 1.7 K. The carrier concentration varies from 6.5 ×
1011 cm-2 to 7 × 1011 cm-2 when increasing illumination (b) Sample PSG n1378
was measured at 1.45 K. The carrier concentration can be varied between 7.2 ×
1011 cm-2 and 8.7 × 1011 cm-2 by changing the illumination strength.
carrier density can be decreased. From a self-consistent calculation solving Poisson’s
and Schrödinger’s equation [34], as well as from a simple estimation by assuming the
gate and the 2DEG to form a parallel plate capacity, one gets a linear behavior of
n(VG ). The slope dn/dVG is about 7 × 1011 cm-2 /V, which should lead to complete
depletion of the 2DEG by applying a few tenths of a Volt. Surprisingly, the carrier
concentration is still about 2 × 1011 cm-2 at a gate voltage of -2 V and the behavior of
n(VG ) is not linear. The origin of this effect is up to now not understood, but it seems
like some traps shield the voltage from the 2DEG. Tests with SET structures showed
a significant influence of the voltage applied to the gates during cool-down. When a
positive voltage is applied to the gates during cool down depletion occurs at much
lower negative voltages compared to cool-down with no voltage applied. Depletion was
not possible at all with samples cooled with negative voltages applied to the gates.
However, cool-down with different voltages at the top gate of a Hall bar structure was
not tested, but a similar behavior can be expected.
In figure 6.4d the mobility µ is plotted in dependence of the electron density n. The carrier density has significant influence on the mobility. Below a density of ∼ 2.5×1011 cm-2
(at gate voltages of about -2 V) the carrier density tends to zero. The sample shows
100
CHAPTER 6. MEASUREMENTS
(a)
(b)
(c)
(d)
Figure 6.4: (a) SdH and QH measurements of sample PSG n1417 at different
illuminations strengths. The carrier density can be tuned between 3.25×1011 cm-2
and 4.1×1011 cm-2 . (b) The same sample without illumination. The carrier density
is changed by applying different top gate voltages. (c) Carrier concentration n in
dependence of the gate voltage VG at different illuminations. Lines are guides to
the eye. (d) Carrier mobility µ in dependence of the electron density n at different
illuminations. Lines are guides to the eye.
101
6.2. HALL MEASUREMENTS
a mobility of 165000 Vs/cm2 without illumination and at a gate voltage of zero Volts,
which can be increased up to 215000 Vs/cm2 with illumination and positive gate voltages.
Sample PSG n1418 shows a quite similar behavior as the aforementioned sample
PSG n1417. The carrier density n in dependence of the gate voltage VG and the mobility
µ(n) are plotted in figures 6.5a and b, respectively. The carrier density at a gate voltage
of 0 V without illumination is 3.4 × 1011 cm-2 . At this set of parameters the mobility is
slightly below 100000 Vs/cm2 . By illuminating the sample the carrier concentration can
be increased to 4.4 × 1011 cm-2 . A maximum carrier mobility of about 145000 Vs/cm2
can be reached by illuminating the sample and applying positive gate voltages. This
value is still worse than sample PSG n1417 without illumination at VG = 0 V.
(a)
(b)
Figure 6.5: (a) Carrier concentration n in dependence of the gate voltage VG of
sample PSG n1418 at different illuminations. Lines are guides to the eye. (b)
Carrier mobility µ in dependence of the electron density n of the same sample at
different illuminations. Lines are guides to the eye.
Because of the superior properties (better mobility and lower carrier concentration)
of sample PSG n1417 only this sample was examined further.
102
6.2.2
CHAPTER 6. MEASUREMENTS
Hall measurements at 300 mK
To get further information on sample PSG n1417, it was cooled down to 300 mK in
the 3 He cryostat and measured with an ac measurement setup.
Figure 6.6a shows SdH measurements with a voltage source (blue line) and a current
source (red line). At some regions the longitudinal resistance increases rapidly. In figure
6.6b the SdH and QH measurements are plotted up to a magnetic field of 3 T. Surprisingly, ρxx increases whenever a QH plateau is reached instead of tending to zero.
This effect may be attributed to a Corbino effect. The layout of the mask used for
the Hall bar structure (mask “Uni-Linz”) features a somewhat bigger mesa than the
Ohmic contacts. This can lead to a current flowing around the Ohmic contacts and
to wrong potential measurements. Anyhow, analysis of the sample is done at lower
magnetic fields before spin splitting occurs. At these fields (below 0.8 T) no problems
with the Corbino effect arose.
The periodicity of the resistance dips in the SdH measurement (equation 5.14) yields
a carrier concentration of 3.28 × 1011 cm-2 . Together with the longitudinal resistance
at zero magnetic field ρxx |B=0 = ρ0 a carrier mobility of 140000 Vs/cm2 is obtained.
Astonishingly, this value is slightly smaller than the value obtained from the measurement at 1.4 K. Most likely this may be attributed to a different cool-down procedure.
For example, persistent carriers may exist if the sample is cooled down too fast or in
a not completely dark environment. It may also play a major role if the gate voltage
is set to zero or if the gate is kept floating during cooldown.
From the carrier mobility the transport lifetime τt can be immediately calculated
from equation 5.17. τt is expected to be about 15 psec. From the onset of the SdH
oscillations at 0.4 T the quantum lifetime τq can bet estimated to τq,onset = 2.7 psec. A
more precise estimation for τq should be obtained from a Dingle analysis (see section
5.1.3). In figure 6.6c ρxx is plotted over the inverse magnetic field 1/B. The Dingle
analysis is performed before the measurement is affected by spin splitting at values
greater than 1.25 T−1 . In figure 6.6d (∆ρxx /4ρ0 ) · (sinh χ1 /χ1 ) · (1/z1 ) is plotted versus
1/B. The quantum lifetime can be obtained from the slope of the trendline: τq,Dingle ≈
1.2 psec. This value is about 2 times smaller than the value obtained by the simple
estimation by the onset of the SdH oscillations. The Dingle temperatures obtained
from this two different values are TD,onset = 0.45 K and TD,Dingle ≈ 1 K. Comparing
103
6.2. HALL MEASUREMENTS
(a)
(b)
(c)
(d)
Figure 6.6: (a) SdH measurements of sample PSG n1417 at 300 mK. The blue
curve is obtained by applying an ac voltage at the drain. When measuring with
an ac current source the red curve is obtained. (b) SdH oscillations (blue line)
and QHE effect (green line) measured with a current source. The longitudinal
resistance increases at the QH plateaus instead of tending to zero. (c) ρxx plotted
versus 1/B. Dingle analysis is performed at values greater than 1.25/T. (d) Dingle
plot. From the slope of the trendline the quantum lifetime has been obtained.
104
CHAPTER 6. MEASUREMENTS
the quality of the SdH oscillations obtained at 1.4 K and 300 mK the rough estimation
TD,onset seems to be more reliable than the value obtained from the sophisticated Dingle
analysis. Or, viewed from the other side, if the value for τq,Dingle is approximately
appropriate it is hard to comprehend why the quality of the SdH oscillations gets so
much better at 300 mK. However, both Dingle ratios τt /τq,onset = 5.5 and τt /τq,Dingle =
12.5 are rather large, which means that large-range scattering dominates. The main
scattering mechanism in this sample may therefore be remote impurity scattering.
6.2.3
Hall measurements at 30 mK
A Hall bar structure on sample PSG n1417 was cooled down in the dilution refrigerator. The main reason for measuring this sample (BT771) was that it features a double
SET structure. However, this occasion was also used for transport measurements at low
temperatures. As the sample was of course processed on another piece than the sample
measured above, electrical properties may differ somewhat. Because of the different
Hall bar design - the lithographic “Quantum Mask” was used - a Corbino effect cannot
occur as in the measurements above. However, this Hall bar structure was designed
for measurements of SET structures. Even if the transport measurements look quite
exiting it must be stated that they may look even better with a Hall bar especially
designed for Hall measurements. For example the source and drain contacts should be
further away from the voltage probes and most important the Hall bar should be much
wider than the featured 20 µm of this structure.
Figure 6.7a shows SdH and quantum Hall measurements performed at 30 mK with
sample BT771(PSG n1417). The QH plateaus are very well pronounced, while the
longitudinal resistance vanishes. Above 1.5 T spin degeneracy is lifted and even plateaus
can be observed. At about 4 T valley splitting occurs and the 1/3 plateau can be
detected. First indications of the fractional quantum Hall effect (FQHE) can be seen
at magnetic fields larger than 10 T. The insert shows a zoom-in of the longitudinal
resistance up to a magnetic fields of 5 T. From the periodicity of the SdH oscillations the
carrier density is estimated to be n = 3.6 × 1011 cm-2 , which is slightly higher than the
one of the sample measured in the 4 He and 3 He cryostates. From ρ0 a carrier mobility
of µ = 144000 Vs/cm2 is obtained. This leads to a transport lifetime of 15.5 psec, which
is about the same value found in the other sample. Again, the SdH oscillations start
105
6.2. HALL MEASUREMENTS
(a)
(b)
(c)
Figure 6.7: (a) SdH (blue curve) and QH (green curve) measurements of sample
BT771(PSG n1417) at 30 mK. The sample shows well pronounced quantum Hall
plateaus and vanishing longitudinal resistance. At magnetic fields above 10 T first
indications of the fractional quantum Hall effect can be seen. The insert shows a
zoom-in of the longitudinal resistance. (c) ρxx plotted versus 1/B. Dingle analysis
is performed before spin degeneracy is lifted. (d) Dingle plot. From the slope of
the trendline a quantum lifetime of 1.06 psec has been obtained.
106
CHAPTER 6. MEASUREMENTS
at about 0.4 T and an estimated quantum lifetime τq,onset of 2.7 psec is obtained.
Figure 6.7b shows the longitudinal resistance plotted versus the inverse magnetic field.
A Dingle analysis is performed at values before spin splitting is observed, i.e. for values
larger than 0.8 T−1 . From the slope of the Dingle plot a quantum lifetime τq,Dingle
of 1.06 psec is derived. This value again fits well to the lifetime of 1.2 psec obtained
from the measurements at 300 mK. With these values one gets Dingle temperatures of
TD,onset = 0.45 K and TD,Dingle ≈ 1.1 K. The same discussion as in the section above is
applicable here. At least the quality of the SdH oscillations doesn’t significantly change
between 300 mK and 30 mK, which at least makes the quantum lifetime of 2.7 psec with
a Dingle temperature of 0.45 K reliable.
107
6.3. COULOMB BLOCKADE MEASUREMENTS
6.3
6.3.1
Coulomb Blockade Measurements
Sample BT741
Introduction and Sample Layout
(a)
(b)
Figure 6.8: Electron micrographs of sample BT741. a) The Hall bar viewed with a
scanning electron microscope. All contacts used in the measurements are labeled.
G1-G4 indicate the four gates, the numbers 1-12 indicate different contacts of
the Hall bar used for source, drain and voltage probes. b) Image of the gate
configuration after the measurements. A short between gate G1 and G2 can
clearly be identified. Moreover, gate G1 is lifted.
Sample BT741 was processed on a PSG n1417 substrate using the mask from my
diploma thesis. Figure 6.8a shows an electron micrograph of sample BT741. All contacts
used for the measurements are labeled in this picture. This labeling will be retained
during this section. Figure 6.8b shows an electron image of the gate configuration taken
after measurement.
Cool-Down and Ohmic Contact Resistance
The sample was installed in the 3 He cryostat. First tests with the sample revealed
some shorts between the contacts caused by threadbare wires of the cryostat cabling.
Therefore, the sample was taken out again and several tests with the cryostat inset
followed. After finding a rotation of the sample holder which did not seem to produce
any short-cuts the sample was mounted again. Unfortunately, soon afterwards the
shorts appeared again. Hence, the sample was unmounted again and the wiring of the
108
CHAPTER 6. MEASUREMENTS
inset was renewed and newly soldered. After this time-consuming operation no further
problems with the wiring emerged.
During cool-down of the sample the resistance was monitored. A 100 µV ac voltage was
1 and the current to ground ()
7
applied to contact was recorded. As the resistance
increased dramatically the ac voltage was increased to 500 µV for measurements below
77 K. The whole cool-down process is plotted in figure 6.9. The overall resistance R
(resistance of the Hall bar plus the two Ohmic contacts) increased from about 80 kΩ at
room temperature to 1.5 MΩ at 77 K. Inherently, the resistance at room temperature
is much higher than one could expect, but cooling the sample further down to 300 mK
1 and the total resistance raised to 600 MΩ. With
lead to nearly-freeze out of contact 2 3
such a high resistance no reasonable measurements are possible. Also contacts ,
12 froze out during cool down. Surprisingly, the contacts on the right side of
and 11
the Hall bar kept working, even though with quite high resistivities. As contact also maintained working, this contact was chosen as a stopgap drain. The new total
11 and source (contact )
7 showed a value of about
resistance between drain (contact )
1.5 MΩ, which is still extremely high. To further decrease the contact resistance, the
9 and ,
7 were connected in parallel. Due to the lack of
best contacts on the right side, 11 and the split-gate arrangement the voltage
further voltage probes between contact 11 and ,
4 which can be thought
along the gates was measured between the contacts as a kind of ”3-point”-measurement. Because of this arrangement the resistance along
the quantum dot could not be monitored individually, instead only the resistance of
11 was monitored.
the dot plus the resistance of contact I-V characteristics of the Schottky gates
As the feasibility of a Schottky-gate approach for SET applications on Si/SiGe heterostructures was generally questioned [8, 9, 113], besides the Coulomb blockade measurement also the I-V characteristics of the Schottky gates were characterized. For
testing the worst case condition, all four gates were connected in parallel to maximize possible leakage currents. The total gate area for the connected gates was about
150 µm. Down to a voltage of about -3 V the total leakage current is below 20 pA, which
is on the lower limit of our experimental setup [12]. The lowest voltage applied to a
gate for measuring Coulomb blockade in all my samples was -2.3 V, which is still in
the non-contacting part of the diode characteristics. In figure 6.10 the gate I-V char-
6.3. COULOMB BLOCKADE MEASUREMENTS
109
Figure 6.9: Cool-down of sample BT741. The resistance was calculated by dividing
1 and 7 through the current measured
the ac voltage applied between contacts 7
at contact .
During cooling of the sample the resistance increased from 80 kΩ
at room temperature to about 0.6 GΩ at 300 mK. The noise on the measurement
is due to a fluctuating temperature measurement during cool-down.
acteristic of the device is shown. The noise on the IV curve is due to measurement
uncertainties of the setup, which also lead to a few pA of measured positive currents
at negative gate voltages.
Coulomb Blockade Measurements
During the first tests with the gates it turned out that the gates G1 and G2 were
shorted. Examining the sample after measurements in a scanning electron microscope
clearly showed a short between gates G1 and G2 (see figure 6.8b). Examination of
the sample before measurement did not show this short. It seems that this short was
caused by electro-migration of palladium. Surprisingly, the same problem also occurred
when measuring sample BT740. Also here no indication of a short could be found when
examining the sample in the electron microscope before bonding. Secondly, the gate
G1 was lifted after the measurement. Also the lifting of the gate has to be caused
between bonding and examination of the sample after measurement.
Figure 6.11a shows a Coulomb blockade measurement performed at 300 mK by
scanning gate G3. Even as this measurement was the best in this measurement series
many glitches can be seen. Bringing samples to higher temperatures (“annealing”) and
cooling it again often shows better results in GaAs/Alx Ga1−x As samples. Therefore,
it seemed logical to also try this procedure in a silicon/germanium heterostructure.
110
CHAPTER 6. MEASUREMENTS
Figure 6.10: Gate I-V characteristic of sample BT741 measured at 300 mK. For
testing the worst case condition, all four gates were connected leading to a total
gate area of about 150 µm. Down to a voltage of about -3 V the leakage current
is on the lower limit of our experimental setup below 20 pA. The inset shows a
zoom-in of the I-V curve. The blue area indicates the voltage range which was
used for Coulomb blockade measurements of all samples which were measured in
this thesis.
The sample was “annealed” at 50 K while keeping the gate voltages fixed to the values
used for the measurement of the Coulomb diamond. After subsequent cool-down of the
sample to 300 mK the gates didn’t deplete the 2DEG anymore. Even more surprisingly
11 which was the only working contact on the left side before the anneal, did
contact ,
not conduct anymore.
Therefore, the sample was “annealed” a second time at 50 K. This time a voltage
of 0.5 V was applied to all gates. After this procedure depletion of the 2DEG with
11 still did not work. To decrease the
the gates was again possible. However, contact 1 ,
2 11 and 12 were connected in
contact resistance on the drain side the contacts ,
parallel. Still the resulting total resistance between drain and source was rather large
with a value of 3 MΩ.
With this parallel configuration on the drain side total depletion of the 2DEG with
11 as drain without any other contact in
the gates was not possible. Using contact parallel led to complete depletion. This indictates that the gates influenced a natural
11
quantum dot located in or near contact .
6.3. COULOMB BLOCKADE MEASUREMENTS
111
11 was voltage annealed [114] (or bias
To reduce the contact resistance, contact 11 as ground and applying a voltage of 10 V to contact .
12
annealed) by using contact This procedure is commonly done in GaAs-structures to enhance the IV-characteristics
of Ohmic contacts. Reference [115] reports on carrier activation in n-GaN Schottky
diodes by reverse bias annealing (RBA)3 . An increase of leakage currents in silicon
MOS capacitors by reverse bias annealing is reported in reference [116]. The increase
in strain-induced leakage currents is associated to trap-assisted tunneling [116]. After
11 and source decreased to 80 kΩ.
this procedure the total resistace between contact Coulomb diamond measurements performed after the voltage anneal by scanning
the gates G1-G2 are plotted in figures 6.11b-c. All these measurements seem to probe
a natural quantum dot localized at the contact, even if it is hard to comprehend that
the gates have such a large influence on a dot which is located about 50 µm away. If the
first measurement (figure 6.11a) performed before the annealing cycles also probed the
natural quantum dot, or if the sample was altered in such a critical way after annealing,
is hard to judge afterwards. At least the shape of the first measurement differs from the
other measurements. Because of the unknown DC voltage drop along the dot (caused
by the extremely high contact resistances) and the bad quality of the measurements
no reasonable analysis of the plots is possible. Resent measurements performed with
the same sample by G. Langer also showed clear evidences for a natural quantum dot
11 [117].
located in or near contact 3
In RBA the diode is reverse-biased, e.g. a negative voltage is applied to the metal contact of a
n-type Schottky diode
112
CHAPTER 6. MEASUREMENTS
(a)
(b)
(c)
(d)
Figure 6.11: Stability plot of sample BT740 recorded at 300 mK. The data in figure
(a) were recorded before the ”annealing”-cycles. Figures b-d were measured after
11
two times ”annealing” at 50 K and ”electro-annealing” of contact 113
6.3. COULOMB BLOCKADE MEASUREMENTS
6.3.2
Sample BT740
Introduction and Sample Layout
(a)
(b)
Figure 6.12: a) Schematic of the Hall bar of sample BT740. The contacts used
in the measurements are labeled. S and D, are the source and drain contacts,
respectively. P1-P4 indicate voltage probe contacts and G1-G4 are the four gates.
b) Scanning electron micrograph of the gate configuration of sample BT740 taken
before measurement. The half pitch between the upper gates is 90 nm.
Sample BT740 was processed together with sample BT741. Also this sample was
prepared on a PSG n1417 substrate. All technological processing steps are identical
to sample BT741. A schematic of the Hall bar is shown in figure 6.12a. The contacts
used for the measurements are labeled in the figure: source and drain contact S and
D, voltage probes P1-P4 and the four top gates G1-G4. Figure 6.12b shows a scanning
electron micrograph of the gate configuration taken at 2 kV before measuring the sample. The half pitch between the upper gates is 90 nm. The gates are again labeled, and
the labels introduced in this picture will be retained throughout this section.
Cool-Down and Ohmic Contact Resistance
During cool-down of the sample the total resistance of the sample, Rtot , and the resistance between the voltage probes P1-P4, R1−4 , was monitored. Figure 6.13 shows
resistance R1−4 and the contact resistance Rcont of sample BT740 during cool-down.
As the temperature sensors were not calibrated for high temperatures the resistances
in dependence of the time instead of sample temperature are plotted. The contact resistance is given by Rcont = (Rtot − R1−4 · lHb /l1−4 )/2, where lHb is the total length of
114
CHAPTER 6. MEASUREMENTS
the Hall bar and l1−4 the spatial distance of the voltage probes P1 and P4. As can be
seen in figure 6.13 R1−4 decreases rapidly between 1.65×105 sec and 1.8×105 sec. In this
period the temperature decreased from about 60 K to 10 K. For our heterostructures
the mobility of the 2DEG typically enhances at about 60 K−70 K, due to freeze out
of remote impurities and reduced phonon scattering. The resistance between P1-P4
amounted to about 920 Ω at low temperatures, which corresponds to a resistivity of
ρ = 150 Ω4 . In the same temperature range where the sample resistance decreased the
contact resistance Rcont increased due to freeze-out of the Ohmic contacts. The contact resistance increased to about 26 kΩ at low temperatures, which is rather large for
alloyed gold-antimony contacts.
Figure 6.13: Contact resistance and resistance between P1 and P4 of sample
BT740 during cool-down. Because of non-calibrated temperature sensors the resistances in dependence of the time instead of sample temperature are plotted.
All split-gates were connected in parallel and a positive voltage, VAU X , was applied
to them during the whole cool-down procedure. The voltage drop between the gates
and the 2DEG, VG , was monitored with a digital multimeter. The resistance of the
gate, RG , is given by RG = RS · VG /(VAU X − VG ), where RS is the serial resistance
of 1 MΩ (see section 6.1.3: AC Measurement Setup), and the current IG through the
gates is given by IG = (VAU X − VG )/RS .
L
, where L and W are the length and width of
In 2D-systems the resistance is given by R = ρ · W
the Hall bar, respectively. Therefore, the resistivity ρ is given by ρ = R · W
L and has the dimension Ω.
4
6.3. COULOMB BLOCKADE MEASUREMENTS
115
First a voltage of 0.1 V was applied to the gates. When the gate resistance increased
the voltage was increased to 0.2 V. Once the total gate resistance was above 20 kΩ the
voltage was increased to 0.25 V. This voltage was not changed anymore during further
cool-down. At low temperatures the gate resistance increased to several hundred MΩ
up to a few GΩ. The exact gate resistance cannot be given here because of a few mV
offset between the auxiliary outputs of the lock-in amplifier and the used multimeter.
Coulomb Blockade Measurements
By applying negative voltages to the top gates the 2DEG beneath them could be
depleted. A lateral quantum dot could be formed by applying voltages between −1.5 V
and −2.3 V to the gates. During testing of the gates and optimization of the gate
voltages it turned out that, as in sample BT741, gates G1 and G2 where shorted.
Therefore, only the same voltage could be applied to these two gates. The reason for
this short-cut is still unclear. Pictures taken with a scanning electron microscope before
bonding of the sample showed no indication for such a possible short.
The short seemes to have formed between the bonding process and measurement
of the sample. Most likely the short formed during mounting the sample on the sample
holder.
Because of the short between the gates the tunneling barrier on the drain side,
formed by gates G1 and G4 could not be defined independently of the plunger gate
voltage at G2. Therefore, only a few conductance peaks could be recorded as the
tunneling barriers pinched off at too low plunger gate voltages. A typical measurement
showing several conductance oscillations measured at 30 mK is shown in figure 6.14.
In this measurement a 200 µV low frequency ac signal was applied between source and
drain, and the voltage drop along the dot was monitored with the voltage probes P2
and P3. The conductance was recorded by scanning the voltage VG = VG1 = VG2 , while
maintaining the voltages at G3 and G4 fixed. Within the depicted range of VG the
constriction of the drain side (defined by G1 and G4) goes from complete pinch off on
the left hand side of the figure to its open condition on the right hand side. Within
this range several conductance peaks can be observed which are separated by vanishing
conductance in the Coulomb-blockade regions.
By applying an additional DC voltage VDS between drain and source, the differential
116
CHAPTER 6. MEASUREMENTS
Figure 6.14: Conductance oscillations measured at 30 mK by changing the gate
voltages of gates G1 and G2 (VG = VG1 = VG2 ) with fixed voltages G3 and G4.
One can distinguish different conductance peaks separated by vanishing conductance in the Coulomb-blockade regions. Lines are guides to the eye.
conductance as a function of VDS and VG was recorded. Figure 6.15 shows seven wellresolved Coulomb blockade diamonds, which were recorded at 30 mK over a period
of about 70 h with no indications of any transient in the number of electrons. In this
measurement a 100 µV ac voltage was applied between drain and source and the dc
voltage VDS was altered stepwise between -2.5 mV and 5.5 mV. The voltages at the
gates G3 and G4 were kept constant at −1.68 V and −2.3 V, while the voltage VG at
the gates G1 and G2 was swept from −1.5 V to −1.63 V. As one can see in figure 6.15
the diamonds are not symmetric relative to VDS = 0 V as one would expect. Instead
an offset of about 2 mV is observed. The origin of this offset is still unclear, but maybe
due to a thermo-voltage in the measurement setup [14]. Offsets in the source-drain
voltage were also observed in Alx Ga1−x As samples with this measurement setup [108],
which indicates a problem with the setup rather than a problem within the sample.
To make all seven diamonds visible, a different color scale was used for the lowest two
diamonds in the region of almost complete pinch off in figures 6.15a and b. In figure
6.15b all seven diamonds are numbered starting with zero for the lowest diamond. Also
lines are plotted which emphasize the diamonds. The slopes of these lines were used
for determinating the capacitances of the dot and for estimation of the resulting size.
117
6.3. COULOMB BLOCKADE MEASUREMENTS
(a)
(b)
Figure 6.15: a) Stability plot at 30 mK of the differential conductance through
the dot as a function of the DC voltage VDS between drain and source, and
the gate voltage VG applied to gates G1 and G2. Seven stability diamonds are
clearly visible. The color scale is spread for the lowest two diamonds to enhance
contrast. In this measurement a 100 µV ac voltage was applied between drain
and source and the DC voltage VDS was altered stepwise between −2.5 mV and
5.5 mV. The voltages at the gates G3 and G4 were kept constant at -1.68 V and
-2.3 V, respectively, while the voltage VG at the gates G1 and G2 was swept from
−1.5 V to −1.63 V. b) The same measurement but with labeled diamonds and
with lines that emphasize the diamonds. These lines were also used to determine
the dots capacitances.
Analysis of the Diamonds
The capacitances of the dot calculated by measuring the voltage difference ∆VG between neighboring diamonds and the confining slopes on the left hand (kCD ) and the
1 and 2 are listed in table 6.5.
right hand (kC ) side for the diamonds Relative errors for the slopes ζk and for the periodicity ζVG are assumed to be below
10% and 5%, respectively. From error analysis (section 5.2.4) one can estimate the
, from equation 5.42 to be below 15%. The
relative error of the total capacitance, ∆C
C
estimated errors lead to a uncertainty in the number of electrons below 30%. The
latter value is only true if the quantum dot is totally isolated from the environment.
The largest error in the estimation of the dot diameter and electron number is not
due to wrong evaluated slopes, but arises from the wrong assumption of an isolated
118
CHAPTER 6. MEASUREMENTS
Nr.
∆VG [mV]
1
2
2.70
26.2
k CD
kC
1.89 3.71
2.57 3.90
CG [aF] CD [aF]
5.93
6.12
11.2
15.7
C [aF]
d [nm]
N
33.3 ± 5 80.3 ± 12.0 18.3 ± 5.4
39.6 ± 6 95.5 ± 14.3 25.8 ± 7.7
Table 6.5: Capacitances and dot parameters estimated from the difference between neighboring dots ∆VG and the confining slopes of the dot kCD and kC for
1 and .
2
the diamonds If the dot is treated like an isolated disk, the resulting
dot diameter is about 68.3 to 110 nm.
disk as described in section 5.2.4. In table 6.5 the total capacitance gets smaller with
decreasing gate voltage. A decrease in gate voltage leads to decoupling of the dot from
the environment. Therefore, the dot gets closer to the ideal isolating case. Hence, the
dot’s capacity is decreased. Furthermore, a more negative gate voltage leads to a larger
depletion area and therefore to a smaller dot diameter, which furthermore decreases
the capacity. As the dot gets decoupled from the environment with decreasing gate
1 is more reliable. However, the real cavoltage, the total capacitance for diamond pacitance may be even much lower.
From the total capacity the dot diameter was estimated to be between 68.3 nm
and 110 nm. The number of electrons in the dot can be estimated from the size of the
dot and the carrier density n of the 2DEG. For the substrate PSG n1417 the carrier
density was determined in section 6.2 and varies between 3.25 × 1011 cm-2 for the gated
Hallbar (section 6.2.1) and 3.6 × 1011 cm-2 for sample BT771 (section 6.2.3). Because
of a similar processing used for the fabrication of BT740 and BT771 (e.g. no top gate),
and the fact that both sample pieces come from nearby-lying areas on the wafer, the
latter value is perhaps more reliable and was therefore used for further calculations.
The resulting number of electrons on the dot lies between 13 and 34. However, as
mentioned above, the capacity is most likely overestimated and thus the number of
electrons maybe much lower.
Another estimation of the dot size by analyzing an exited state is presented in the next
section.
6.3. COULOMB BLOCKADE MEASUREMENTS
119
Analysis of the Exited State
In figure 6.16 the same data as in figure 6.15, but with four marked points, are plotted.
0 This line can be
A dark line (marked with point 2) can be seen beside diamond .
attributed to an excited state, the energy of which can be estimated either by the
voltage difference in VG or by the difference in VDS . Both methods should yield the
same result, if the capacities were accurately determinded.
First we estimate the energy with the difference of the plunger gate voltage. At the
Figure 6.16: Stability plot. 4 special points are marked. Lines are guides to the
eye.
edge of a diamond the quantum dot is in a conducting state. To make another energy
level accessible the plunger gate voltage has to be changed until the electro-chemical
potential of the dot has changed by ∆E. Therefore we find:
∆E = ∆VG
CG
C
(6.1)
1 and
With ∆VG = 8 mV and the gate capacitances 5.93 aF and 6.12 aF for diamond 2 respectively, we find:
,

1.43 meV for diamond 1
∆E =
1.24 meV for diamond 2
Estimation of ∆E from the drain-source voltage, VDS , should give the same result.
A schematic of the analysis of the exited state with VDS is plotted in figure 6.17. In
figure 6.16 the points 1 and 2 lie at the some gate voltage, but have a difference in
120
CHAPTER 6. MEASUREMENTS
drain-source voltage of ∆VDS = 2.2 meV.
The schematic term diagram for point 1 in figure 6.16 is depicted in figure 6.17a. The
(a)
(b)
(c)
Figure 6.17: Term diagrams of a QD. a) A voltage difference is applied between
drain and source and a current flow is possible via the highest non-occupied
energy level. This depicted state corresponds to point 1 in figure 6.16. b) µD is
increased. When CD ≪ C the electro-chemical potential of the dot only slightly
changes. This results in a second current path via a second exited state (point
2 in figure 6.16). c) CD . C. If µD is increased also µdot changes recognizable.
If VDS is decreased enough a second currend path gets accessible via the highest
occupied state of the dot.
chemical potential on the drain side µD is aligned with the lowest non-occupied level
of the dot. µS lies about half the Coulomb energy below µD . To get from point 1 to
an exited state in the left plane of the figure two possibilities, depending on VDS and
the capacitances, exist. In figure 6.17b and c two extreme cases, regarding the value of
CD , are shown:
1. CD ≪ C (figure 6.17b): As CD is much smaller than C, most of ∆VDS will drop
above the tunnel-barrier on the drain side. Thus, the chemical potential of the
dot only shifts slightly. If VDS is decreased enough a second current path gets
accessible. Current can flow over the next lying non-occupied state, separated by
∆E. To reach this state, the energy change on the drain side, −e · ∆VDS , must be
equal to the change of the dots energy, −e CCD ∆VDS , plus the excitation energy,
∆E. Finally, we find:
CD
∆E = e
− 1 ∆VDS
(6.2)
C
This case should result in an exited state with a positive slope.
6.3. COULOMB BLOCKADE MEASUREMENTS
121
2. CD . C (figure 6.17c): As the drain barrier is more transparent than the source
barrier, most of the voltage drops along the source tunnel barrier. Therefore, µdot
shifts strongly with the drain voltage. If VDS is decreased enough, current can
flow by emptying the highest occupied state. To reach this state, the chemical
potential of the dot must be increased until the
energy level with the
occupied
e2
highest energy (with the initial energy µD − C + ∆E ) equals µS (with an
energy of µD + eVDS , where VDS is the drain-source voltage in point 1). Finally
we find:
e2
CD
∆VDS − − eVDS
(6.3)
∆E = −e
C
C
This case should result in an exited state with a negative slope.
As CS is about one third of C, and as VDS in point 1 is 1.5 meV, which is smaller than
the Coulomb gap of 4 meV−4.8 meV, one would expect case 1 to be more propable.
Actually, only case 1 can apply, as the exited state has a positive slope.
From equation 6.2 we find the energy of the exited state with the capacitances of
1 and :
2
diamond 
1.46 meV for diamond 1
∆E =
1.33 meV for diamond 2
These values fit perfectly to the values found from ∆VG , which implies that at least
the relative values CCG and CCD are reliable.
If one assumes that the exited state of the multi-electron dot can be roughly described
by single-electron wave-functions and one further assumes that the exited states of the
ideal quadratic dot approximately merge with our system, one finds the dot area from
equation 5.39. With this assumptions the dot diameter is estimated to be 45 nm−50 nm,
which results in an occupation of 6−7 electrons on the dot.
If one or two states lie between the boundary of the diamond and the non-conducting
state the dot diameter can be estimated to be 66−72 nm or 81−88 nm, if ∆E is assumed to be the energy of the second or third exited state, respectively. This results
in occupation numbers of N =12−15 and N =18−22. All values are again compiled in
table 6.6.
If the exited state is treated as the first exited state, the estimation ∆E ≪ e2 /C is
no more applicable, as ∆E is about one third of the Coulomb energy. From equations
122
CHAPTER 6. MEASUREMENTS
state [mV]
st
1
2nd
3rd
d [nm]
N
46.9−50.9 6.2−7.3
66.4−72.0 12.5−14.7
81.3−88.2 18.7−22.0
Table 6.6: Dot diameters and occupation numbers estimated from the exited
state. The resulting values for the dot diameter and number of electrons on the
dot are given for the assumption that the exited state is the first, second or third
excited energy level.
5.28 and 6.1 we find the gate capacity to be:
CG =
∆VG,CG
e
− ∆VG,∆E
(6.4)
where ∆VG,CG is the voltage difference between two neighboring Coulomb diamonds
and ∆VG,∆E is the voltage difference in VG used for the estimation of ∆E. Therefore,
CG may be overestimated by simply analyzing the difference of two Coulomb diamonds.
Anyhow, as CD , as well as C, are directly proportional to CG the ratios CCG and CCD
remain unchanged by this modification and the calculation of ∆E is still correct.
Term Diagrams
In figure 6.18 the term diagram for a total capacity of C = 33.3 aF corresponding to
1 is plotted. This total capacity leads to a Coulomb
the value obtained from diamond gap of 4.8 meV. From the estimated size of d = 80.3 nm the single particle excitation
energy can be estimated to be 0.497 meV. Each of the energy levels plotted in the
figure is fourfold degenerated. Generally spin-degeneracy is lifted in lateral quantum
dots because of the spin-orbit interaction. However, the exact splitting is hard, if not
impossible, to calculate for a multi-electron quantum dot. Anyhow, most likely, the
splitting is too low to be resolved in the measurement.
In figure 6.18a the state corresponding to point 1 in figure 6.16 is plotted. The lowest
non-occupied level is aligned with µD and µS lies 1.48 meV lower in energy than µD .
The highest occupied energy level, separated by the Coulomb energy, lies 4.8 meV below µD . If VDS is decreased by 2.2 mV (figure (b)), µD and µdot shift by 2.2 meV and
∆VDS · CCD = 0.74 meV, respectively. As µD shifts ∼1.46 meV relative to µdot , and ∆E
is ∼0.5 meV, three higher excited energy levels get accessible.
123
6.3. COULOMB BLOCKADE MEASUREMENTS
(a) point (1)
(b) point (2)
(c) point (3)
Figure 6.18: Term diagrams for the total capacity and energy levels estimated
1 a) The lowest non-occupied level is aligned
from analysis of Coulomb diamond .
with the chemical potential on the drain side. A voltage difference of 1.48 mV is
applied between drain and source. b) The drain voltage is decreased further by
2.2 mV, and thus µD are µdot are increased by 2.2 meV and 0.74 meV, respectively.
Three additional energy levels become accessible. c) Starting from state (a) the
gate voltage is increased by 8 mV and the triple point 3 in figure 6.16 is reached.
Current can flow over three additional exited states. Further increasing VG would
increase the amount of electrons in the dot and transport would get blocked.
In figure 6.18c the gate voltage, starting from the condition in figure (a), is increased
by 8 mV. Therefore, we reach point 3 in figure 6.16. On the way to point 3 more exited
states should get accessible, which cannot be seen in figure 6.16, because either the
estimated energy of the exited states is wrong, or because the states are not resolved
in the measurement. At point 3 the lowest non-occupied state gets aligned with µS
and any further increase of VG would permanently fill this level and block transport,
2 would be reached.
as than diamond In figures 6.19a-c again the term diagram a total capacity of 33.3 aF is plotted.
This time the single particle states, estimated from the distance of the exited state to
the edge of the Coulomb diamond ∆E = 1.46 meV, are drawn. Also, here each energy
state is fourfold degenerated. Figure 6.19a again drafts state 1 of figure 6.16. µD lies
1.48 meV higher in energy than µS , and the lowest non-occupied energy level in the
dot is aligned with the chemical potential on the drain side.
If the drain voltage is decreased by 2.2 meV, µdot shifts by 0.74 meV. This state is
plotted in figure 6.19b. In this state the next energy level, which lies higher in energy,
124
CHAPTER 6. MEASUREMENTS
(a) point (1)
(b) point (2)
(c) point (3)
1
Figure 6.19: Term diagrams for the total capacitance estimated from diamond and the single particle energy states estimated from the exited state. a) The chemical potential on the drain side lies 1.48 meV higher in energy than the chemical
potential on the source side. Transport occurs via the lowest non-occupied state.
b) The chemical potential of the drain is further increased by 2.2 meV and a second exited states becomes accessible. c) Starting in state (a) the electro-chemical
potential of the dot is decreased by 1.4 meV by increasing the gate voltage by
8 mV. Now two states lie energetically between drain and source. Any further
increase of VG would increase the number of electrons in the dot and transport
would get blocked because of the additional Coulomb energy. This state curresponds to the triple point 3 in figure 6.16
gets accessible and a current can flow over the two states. Figure 6.19c corresponds to
point 3 in figure 6.16. Starting from point 1 the gate voltage is increased and µdot shifts
downwards, while the chemical potentials on the drain and source side remain constant.
A voltage difference of 8 meV leads to a downward shift of the dot’s electro-chemical
potential by ∼1.4 meV, which, of course, is equal to the level spacing ∆E. As point 3
is the crossing point of the exited state with the next diamond, the next exited state
becomes accessible. At the same voltage the lowest non-occupied level gets aligned with
µS . Any further increase of the gate voltage would lead to blocking of transport as di2 would be reached and the number of electrons in the dot would increase by 1.
amond Estimation of the Depletion Region
The estimation of the depletion region around the split-gates is generally complicated,
because of the complex structure of the gate arrangement. Furthermore, many unknown
6.3. COULOMB BLOCKADE MEASUREMENTS
125
effects play a role, e.g. the influence of the antimony doping or local variations of the
Fermi level. As discussed in section 6.2, more negative gate voltages are needed to
deplete the 2DEG of our devices than predicted by theory. This behavior can be seen
in figure 6.20. In this measurement the same voltage was applied to all gates. The gate
voltage was slowly decreased from 0 V to −2.2 V, while measuring the conductance
through the gate arrangement. In the region labeled “conductance” the 2DEG beneath
the gates gets depleted and the resistance increases. Once the electron gas beneath
the gates is completely depleted (labeled “total depletion”) electron transport is only
possible through the formed point contacts. If the voltage is further reduced the point
contacts narrow and the conductances decreases further. Once the depletion region
pinches-off the point contact, transport is only possible by tunneling. As can be seen
in figure 6.20 the 2DEG beneath the gates gets completely depleted at about −1.5 V.
By assuming the gate and 2DEG to form a capacitor, complete depletion is assumed
to appear at −0.47 V, which is only one third of the voltage that is observed in the
measurement.
Figure 6.20: The voltage at gates G1−G4, VG , is decreased, starting from 0 V,
to −2.2 V. Above −1.5 V the 2DEG beneath the gates is conducting and gets
more depleted with decreasing voltage. At about −1.5 V the 2DEG beneath the
gates gets completely depleted and electron transport is only possible through the
constrictions between G1−G4 and G3−G4. Further decreasing VG narrows the
constrictions and reduces the conductivity. At about −1.9 V the 2DEG between
the point contacts gets completely depleted and a current flow is only possible
by tunneling of electrons.
126
CHAPTER 6. MEASUREMENTS
According to reference [118] the depletion length l around gates is given by:
εr ε0
l = VG
(6.5)
π·n·e
where n is the zero-voltage carrier density of the 2DEG. However, this formula is derived by neglecting the distance of the 2DEG to the sample surface, d. Therefore, this
formula may overestimate the depletion width of the gates.
According to references [119] and [120] the depletion length around the gates equals
the distance d between sample surface and 2DEG at the operation point where the
2DEG gets completely depleted. In our case this would result in a depletion length of
85 nm at a gate voltage of −1.5 V.
By analyzing the scanning electron micrograph in figure 6.12b the distances between
the tips of the point contacts G1-G4 and G3-G4 are estimated to lie between 130 nm
and 145 nm. As can be seen from figure 6.20 these points contacts form tunnel barriers
at a gate voltage of about −1.9 V. At this voltage the region between two opposite
split-gates gets completely depleted. Therefore, a depletion length of 65−72.5 nm can
be assumed at a gate voltage of −1.9 V. However, depletion lengths may be higher at
the sides of the gates than on the tip regions.
In table 6.7 estimated depletion lengths for different gate voltages based on the
discussion above are composed. Values calculated from equation 6.5 are given in column
2. In column 3 a pinch-off depletion length l0,po of 65−72.5 nm at a voltage VG,po of
−1.9 V is assumed. Starting from this point the depletion is calculated from the slope
dl/dVG of equation 6.5:
dl
εr ε0
(VG − VG,po ) = l0,po +
∆VG,po
(6.6)
lpo = l0,po +
π·n·e
dVG
In column 4 the same consideration as for column 3 was made. Only starting with
the gate voltage where the 2DEG gets completely depleted: VG,cd = −1.5 V. At this
voltage the depletion length, l0,cd , should equal the distance between surface and 2DEG,
d = 85 nm. Relative to this starting points the depletion width lcd is calculated.
Finally in column 5 and 6 an ideality factor, η, is taken into account. This factor
takes into account that depletion occurs at more negative voltages than predicted. η
is defined as the proportion of the voltage where complete depletion should occur,
Vdep,theo , and the voltage where depletion actually is observed, Vdep,meas :
Vdep,theo
= 0.338
0η =
Vdep,meas
127
6.3. COULOMB BLOCKADE MEASUREMENTS
V [V]
-1.50
-1.61
-1.68
-1.90
-2.30
l=
εr ε0 VG
π·n·e
[nm]
85.6
92.0
96.0
108.6
131.5
lpo [nm]
lcd [nm]
lpo,η [nm]
lcd,η [nm]
42.1−49.6
48.4−55.9
52.4−59.9
65.0−72.5
87.9−95.4
85.0
91.3
95.3
107.9
130.7
59.3−66.8
60.9−68.4
61.9−69.4
65.0−72.5
70.7−78.2
85.0
87.0
88.2
92.2
99.4
Table 6.7: Depletion lengths at different gate voltages, calculated by various methods.
Therefore, we find the depletion lengths lpo,η and lcd,η for pinch-off (column 5) and
complete depletion (column 6), respectively:
dl
(VG − VG,po )
dV
dl
= l0,cd + η
(VG − VG,cd )
dV
lpo,η = l0,po + η
(6.7)
lcd,η
(6.8)
The formulas for l and lcd give approximately the same results. However, the resulting values may be overestimated, as generally always more negative gate voltages are
necessary to deplete the 2DEG than predicted from theory. The values for lcd and lpo,η
seem to be a bit underestimated. At least a depletion length of 40−65 nm at a gate
voltage of −1.5 V seem to be too low. The values for lcd,η seem to make most sense. All
values are in the range of the depth of the 2DEG, d. Often this distance is used for a
rough estimation of the depletion length.
In figures 6.21a-c a scanning electron micrograph of sample BT740 is shown. The
depletion lengths l(VG ), lpo (VG ) and lcd,η (VG ) for the respective voltages of the gates
are plotted in figures (a), (b), and (c). For gates G1 and G2 the depletion lengths for
1
a voltage of −1.61 V, which is roughly the voltage for the recording of diamond ,
are drawn. For gates G3 and G4 voltages of −1.68 V and −2.3V, respectively, were
assumed. These voltages were used for the recording of the diamonds analyzed in the
section. However, this picture is oversimplified. For example, it is observed that the
gates influence each other because of the finite length of the Coulomb interaction. E.g.,
when the voltage of any gate is decreased, also all other gates get more depleting.
From figure 6.21 the resulting dot geometries can be estimated. All the simply depletion
schemes result in a rectangular shape of the dot. For l a dot area of 57×120 nm2
128
CHAPTER 6. MEASUREMENTS
(a) l
(b) lpo
(c) lcd,η
Figure 6.21: Scanning electron micrograph of sample BT740. The depletion zone
for (a) l, (b) lpo , and (c) lcd,η is draw in the picture in a dark blue color. An
approximate resulting dot geometry is draw in cyan.
is estimated. For lpo and lcd,η the resulting areas are 120×155 nm2 and 60×130 nm2 ,
respectively. The dot size estimated with l and lcd,η fit quite well to the dot sizes
estimated from the Coulomb diamonds.
Measurements at higher Temperatures
Figure 6.22 shows a comparison of three measurements recorded with the same parameters, but at different temperatures. In figure 6.22a the same measurement as in
figure 6.15, but with a smaller parameter range, is shown. The data were recorded
at a crystal temperature of 30 mK. However, recent analysis of the shape of Coulomb
oscillations in Alx Ga1−x As samples point to a higher electron temperatures [108]. The
electron temperature of the 2DEG may be 200 mK or higher, even with a base temperature of 30 mK of the cryostat. Figure 6.22b shows a measurement, taken with the
same parameters, but at a temperature of 300 mK. The measurement features only
about one half of the datapoints as the measurement in figure (a) and looks therefore
more blurred. Finally, the measurement data in figure 6.22c were again recorded with
the same set of voltages, but at a temperature of 2 K. At this temperature all the
diamonds are still well resolved. Note that the measurement features only about one
third of the measurement points as measurement (a). Higher temperatures than 2 K
were not accessible in our measurement apparatus, but appear to be possible, given
then well-resolved diamonds at 2 K. These results opens the possibility of measuring the
129
6.3. COULOMB BLOCKADE MEASUREMENTS
samples in our electron spin resonance apparatus (ESR), which has a base temperature
of about 1.6 K−1.9 K.
(a)
(b)
(c)
Figure 6.22: Coulomb diamonds recorded with the same set of voltages, but at
different temperatures. a) Data were recorded at a base temperature of 30 mK.
b) The same measurement as in (a), but measured at a temperature of 300 mK.
The measurements features only 1/2 of the datapoints as measurement (a). c)
Measurement at 2 K. Again the same set of voltages was used. At this temperature
still all diamonds are well resolved. This measurement features only 1/3 of the
amount of measurement points as the measurement in (a).
130
6.3.3
CHAPTER 6. MEASUREMENTS
Sample BT771
Introduction and Sample Layout
(a)
(b)
(c)
Figure 6.23: Scanning electron micrographs of sample BT771. a) The Hall bar
viewed with a scanning electron microscope. All 14 contacts and the 8 used gates
are labeled. b) Image of the gate configuration before the measurement. The
gates GL , GPL , GMB , GMT , GPR and GR form a double-dot structure. With GP1
and GP2 point contacts can be formed to monitor changes in the charge of the
dots. c) Image of the gate configuration after measurement. The sample has been
destroyed between bonding and examination of the sample after measurement.
Most likely the sample was destroyed during removement of the bond wires.
Sample BT771 was processed on a PSG n1417 substrate and features a doubleSET-structure and point contacts for charge readout on a Hall bar. The Hall bar was
processed using the “Quantum Mask”. Electron micrographs of the sample are shown
in figure 6.23. In figure 6.23a the Hall bar is shown. All 14 Ohmic contacts as well as
the 8 used gates are labeled. Figure 6.23b shows the gate configuration. This image
was taken before measurement of the sample at an acceleration voltage of 2 kV. The
layout is designed to define a left dot by depleting the 2DEG beneath the gates with
the gates GL , GPL , GMB and GMT . The tunnel barriers are then formed by the gates GL
and GMT on the drain side and with the gates GMT and GMB on the source side. With
the plunger gate GPL the size of the dot can be tuned. A right dot should be formed by
using the gates GMT and GMB for the drain tunnel barrier, the gates GMT and GR for
the other tunnel barrier and utilizing gate GPR as a plunger gate. By depleting all gates
mentioned above two dots are formed, the interaction of which can be tuned with the
middle gates GMT and GMB . Transport can be measured through one of these dots or
1 as drain and contact 7 as ground. The voltage
both dots together by using contact 6.3. COULOMB BLOCKADE MEASUREMENTS
131
13 and .
8 Furthermore, one
along the dot is then monitored by the voltage probes should be able to monitor charge fluctuations in the dots by forming point contacts
between the outer gates of the dots GL and GR and the corresponding gates GP1 and
1 and 3 should
GP2 , respectively. Steps in the conductance between the contacts appear whenever the number of electron in the left dot changes. The same should be
7 and .
4
observed for the right dot by measuring the conductance between Cool-Down and Ohmic Contact Resistance
Sample BT771 was measured in two different cryostates. First measurements were performed in the 3 He system. During cool-down the voltage on the gates was increased
from 0.1 to 0.3 V. After some measurements the sample was put out of the 3 He cryostat and was introduced into the dilution refrigerator. The contact resistance and the
resistance of the whole Hall bar during cool-down is plotted in figure 6.24. At low
temperatures the contact resistance is below 1.35k Ω and the resistance of the Hall bar
without contacts is about 1.65 kΩ, which corresponds of a resistivity ρ below 120 Ω.
Because a of leak in the cryostatic system only a few measurements were performed.
Figure 6.24: Contact resistance and resistance of the Hall bar without Ohmic
contacts measured during cool-down. The contact resistance at low temperature
is about 1.35 kΩ and the resistance of the Hall bar decreases during cool-down to
1.65 kΩ. The latter value corresponds to a resistivity of about 120 Ω.
Coulomb Blockade Measurements
First tests with the gates in the 3 He cryostat showed that the gates GPL and GMB
were shorted. Images taken in the scanning electron microscope before bonding and
132
CHAPTER 6. MEASUREMENTS
measurement showed no indication of a short (figure 6.23b). After measurements the
sample was again examined in the SEM. It turned out that the sample was destroyed
(figure 6.23c). Most likely this happened while removing the bond wires from the
sample.
Figure 6.25 shows the best Coulomb diamond measurement taken in the 3 He system.
This measurement was taken on the right dot. The voltage on gate GMT was scanned
between −1.35 V and −1.525 V, while the voltages at the gates GMB ,GPR and GR were
kept constant (VGPL =VGMB =−1.6 V, VGPR =−1.8 V and VGR =−1.6 V). To all other
gates, which were not used in this measurement, a voltage of −0.8 V was applied. Even
though this measurement is rather unstable and exhibits many glitches, individual
Coulomb diamonds can be identified.
Figure 6.25: Stability plot at 300 mK of the differential conductance through the
right dot as a function of the DC voltage VDS between drain and source, and the
gate voltage VG applied to the gate GMT . Four stability diamonds are visible.
The individual diamonds are labeled and the lines used for analyzing the dot are
plotted.
The estimated dot capacities evaluated by voltage differences ∆VG between neighboring diamonds and the slopes on the left hand (kCD ) and the right hand (kC ) side
of the diamonds are given in table 6.8. The slopes used for the analysis are shown in
figure 6.25. Because of the somewhat unstable measurement also the accuracy of the
133
6.3. COULOMB BLOCKADE MEASUREMENTS
Nr.
∆VG [mV]
k CD
kC
0
1
2
3
18.78
20.02
23.77
24.61
1.35
1.49
1.58
1.58
2.68
2.96
2.48
2.49
CG [aF] CD [aF]
8.53
8.00
6.74
6.51
11.5
12.0
10.6
10.3
C [aF]
34.4±10.3
35.6±10.7
27.3±8.2
26.5±8.0
d [nm]
N
83.0±25 19.5±11.7
86.1±26 20.9±12.5
66.0±20 12.3±7.4
64.0±19 11.6±7.0
Table 6.8: Capacitances and dot parameters estimated from the voltage difference
between neighboring dots ∆VG and the confining slopes of the dots kCD and kC .
The dot diameter is about 60 to 90 nm. This fits the value one gets by subtracting
the estimated depletion region of 2×85 nm from the geometrical size of the dot
of less than 250 nm.
analysis suffers, and the relative errors for the slopes ζk and for the periodicity ζVG are
assumed to be below 20% and 10%, respectively. From equation 5.42 one can estimate
, to be below 30%. The estithe maximum relative error of the total capacitance, ∆C
C
mated error leads to a uncertainty in the number of electrons below 60%. As discussed
in the previous section for sample BT740 this value would be only applicable if the
quantum dot is totally isolated from the environment. The expected trend that the
capacities decrease with decreasing gate voltage is clearly visible. This trend results
from the decoupling of the dot from the environment and by the reduced size of the
dot at lower gate voltages. The dot diameter was estimated to be between 64±12 nm
and 83±20 nm. From analysis of figure 6.23b the size of the right dot was estimated
to be below 250×250 nm2 . As discussed in section 6.3.2 the distance between sample
surface and 2DEG can be used as a rough estimate of the depletion width. The values
obtained from the Coulomb diamonds fit well with the geometrical size minus two
times the estimated depletion width of 85 nm: (250 − 2 × 85) nm = 80 nm. With a
carrier density for this sample of n = 3.6 × 1011 cm-2 , which was analyzed in section
6.2.3, the number of electrons on the dot is estimated to be roughly between 5 and 30.
Surprisingly, as in sample BT740 the measurement is not symmetric relative to VDS =
0V . An offset of the drain-source voltage VDS of about −0.65 mV is observed.
After a few further measurements the sample was placed into the dilution refrigerator system. Because of the problems with the dilution refrigerator, as mentioned above,
only a few measurements were performed in this system and no successful Coulomb
diamonds were recorded. However, figure 6.26 shows quantization of the resistance by
134
CHAPTER 6. MEASUREMENTS
changing the channel width between the point contacts GMT and GMB . All gates besides gates GMT , GL and GPL /GMB (the two shorted gates) were kept constant at a
voltage of −0.6 V. Constant voltages of −1.45 V and −1.48 V were applied to the gates
GMT and GL , respectively. The voltage at the gates GPL /GMB was slowly increased
from −1.6 V to −1.3 V. Between −1.4 V and −1.3 V nice conductance quantization
can be seen, even though the levels do not lie at the ideal integer multiplies of 4e2 /h
[121, 122]. However, the levels are not expected to lie at these values. First, not only
the resistivity of the point contact is measured, but also the resistance of the sourrounding gate configuration. Thus, the total conductivity is decreased. Secondly, the
levels do not necessarily have to be quantized to integer multiples of 4e2 /h. Generally,
the conductance through a narrow constriction is given by [123]
N
2e2
2e2 X
Tr tt†
Tn =
G=
h n=1
h
(6.9)
for zero temperature and by [123]
2e2
G=
h
Z
∂f
dE −
∂E
Tr tt†
(6.10)
for finite temperatures, where Tn is the transmission probability of the nth mode,
t is the matrix of the scattering amplitudes, and f is the Fermi distribution. The
inset in figure 6.26 shows the whole measurement. Between −1.4 V and −1.45 V the
conductance fluctuates between discrete levels. Below −1.45 V the point contact turns
into a tunneling barrier and no further conductance fluctuations are observed.
6.3. COULOMB BLOCKADE MEASUREMENTS
Figure 6.26: Conductance quantization of the point contact GMT -GMB measured
at 30 mK. Voltages of −1.45 V and −1.48 V were applied to the gates GMT and
GL , respectively. The conductance was recorded while sweeping the voltage of
the gates GPL /GMB from −1.6 V to −1.3 V. All other gate voltages were kept
constant at −0.6 V. The zoom-in shows the whole measurement. Between −1.4 V
and −1.45 V the conductance fluctuates between discrete levels. Below −1.45 V
no more quantization is possible, as the point contact turns into a tunneling
barrier.
135
136
CHAPTER 6. MEASUREMENTS
Chapter 7
Discussion and Unsolved Problems
7.1
Discussion
The experiments demonstrate that Schottky gate leakage currents are evidently not a
generic limitation of modulationdoped Si/SiGe heterostructures, in contrast to recent
reports in the literature. Based on my results I can only try to comment on the reasons
brought forward by groups that had problems with the reliable formation of Schottky
barriers on their Si/SiGe heterostructures. Three major reasons were named:
1. Schottky barrier lowering [124] by high doping concentration in the layers beneath
the Schottky gate. [11] This seems to be more of a problem for heterostructures
grown by chemical vapor deposition (CVD): Because of the limited range of
growth temperature associated with CVD, doping segregation from the doping
supply into the cap layer(s) is difficult to suppress, and some reactor types have
additional problems with autodoping from the chamber walls. Similar effects may
also apply to MBE material, if the growth temperature for the cap layers is not
sufficiently reduced, or if these layers are too thin.
2. Leakage currents along threading dislocations. This can be a general problem in
all Si/SiGe heterostructures that are deposited on strain-relaxed SiGe pseudosubstrates. Even well-designed pseudosubstrates with thick, linearly or step-graded
SiGe layers have typical threading dislocation densities of 105 cm-2 . [1] However,
it is also well known that threading dislocations are associated with deep levels
[125] that would pin the Fermi level near midgap [126] rather than provide an
137
138
CHAPTER 7. DISCUSSION AND UNSOLVED PROBLEMS
electrically active current path. On the other hand, threading dislocations can
become decorated by metal contaminations either in the epireactor, or during
subsequent device handling and processing [127], and may thus turn into detrimental current paths for the Schottky gates.
3. Extended morphological defects with the shape of inverted pyramids were described in Ref. [11] as a possible cause for shortage of the Schottky gates. Although such defects are occasionally reported, they are usually associated with
carbon contaminations [128] or with particles from the reactor walls. In most
reactors this type of defect should be well controlled.
Our experiments demonstrated that Schottky-barrier-reducing mechanisms can be
overcome by adequately designed Si/SiGe heterostructures, at least when grown by
MBE. This may not apply to all types of CVD reactors, and long term stability as
well as sensitivity to details of device processing may be a concern in the presence of
threading dislocations.
7.2
7.2.1
Unsolved Problems
Ohmic Contacts
While in the most samples Ohmic contacts realized with an AuSb alloy work quite well,
sometimes poor conductivities of these types of contacts are observed. This problem is
mainly attributed to:
1. Non-reproducible layer thicknesses: While the layer thickness of the first layer of
gold deposited on the sample surface with the deposition chamber in the cleanroom is well reproduceable, the other layers deposited with the other deposition
chamber lack this attribute. Furthermore, the rate controller often quits working
during deposition which of course leads to completely wrong layer thicknesses.
A new rate controller for the deposition chamber has been acquired. Once the
controller is installed all layer thicknesses should be well controllable and no
further problems with not reliable layer thicknesses should occur.
2. Non-constant conditions in the annealing furnace: The flow of the used annealing
gases (N2 and Ar/H2 ) can be only roughly controlled, which leads to different
7.2. UNSOLVED PROBLEMS
139
cooling with each run. Together with a missplaced temperature sensor, the temperature of the oven varies with each run. Moreover, the contact surface between
sample and oven is not flat which influences the thermal coupling between sample
and furnace.
A new annealing oven which should provide more reliable results has been designed by D. Gruber during his PhD-thesis [129].
With the new rate controller and the new annealing oven fabrication of Ohmic contacts
should be very reliable, as the layer thicknesses and the annealing temperatures should
be well controllable.
7.2.2
Short Between Gates and Lifted Gates
The problem with the short between two adjacent gates is perhaps the only serious
problem one has to deal with. Without electrically isolated gates one is never capable
of fully controlling the dot. The reason for the shorts between the split-gates is still
unclear, but it seems that these shorts are formed by electro-migration of palladium.
To avoid forming of these short-cuts one has to passivate the surface of the samples.
This, has of course, to be done with an insulator. A passivation layer above the gates
should additionally prevent them from lifting-off. In our institute an insulating layer
atop of the structures could be produced with the following methods:
Plasma deposition A layer of SiO2 or Si3 N4 could be deposited in a plasma assisted CVD process in our plasma deposition facility. Deposition temperatures,
which provide good oxide qualities, lie above 400◦ C, which are not compatible
with our process technology. E.g., the annealing temperature of the Ohmic contacts lies below 400◦ C and the palladium gates could form a silicide. However,
passivating layers do not need the same quality as a gate oxide. For example,
plasma-deposited silicon nitride (SiNx Hy ) is commonly used as passivation material in the semiconductor industry. The low deposition temperatures between
250◦ C and 350◦ C allow this material to be used over metalization layers [70]. A
temperature up to 300◦ C may well be compatible with our technology. However,
a problem could occur with palladium in a plasma assisted process. Ashing samples with palladium gates showed that palladium migrates and forms needle-like
structures on the surface. Figures 7.1a-c show this process. In figure 7.1a the
140
CHAPTER 7. DISCUSSION AND UNSOLVED PROBLEMS
original palladium gate structure after lift-off is shown. Figure 7.1b shows the
same structure after ashing for 20 min. Needle-like structures are formed on the
gate fingers. Finally, figure 7.1c again shows the same structure this time after
additional 60 min of ashing. The needles have a length up to 450 nm and a thickness of about 10 nm. As the original gate structure nearly vanishes, the needles
seem to form by material transport from the gates. This effect also shows that
palladium easily forms whiskers, which can cause shorts.
(a)
(b)
(c)
Figure 7.1: Palladium needles formed on a palladium split-gate structure by ashing. a) The original structure. b) The same structure after ashing for 20 min.
Whiskers are formed on the split-gates. c) Again the same structure after additional annealing for 60 min. The original gate structure has nearly vanished,
instead large needles have formed. This indicates material transport from the
gates to the whiskers.
Photoresist This may be the easiest possibility to passivate the surface. A layer of
standard photoresist, e.g. Shipley S18xx, may solve the problems with the shortcuts, even if it is questionable if the resist is hard enough to prevent the gates
from lifting-off.
Overexposed PMMA This is possibly the better alternative to the photoresist. If
a PMMA electron resist is overexposed by about 10 times the clearing dose,
the PMMA molecules crosslink with each other and form a network of larger
molecules. Therefore, PMMA, which is commonly used as a positive resist, can
also be used as a negative resist. Crosslinked PMMA (Plexiglas) is a tough substance which is resistant to most solvents and etchants [130]. PMMA already
has been used to isolate split-gates from other metallic layers in GaAs structures
7.2. UNSOLVED PROBLEMS
141
[130, 131, 132, 133]. Disadvantages are the long exposure times caused by the
high dose needed to crosslink the PMMA and a possible damage of the 2DEG
by the electrons during exposure. Therefore, one would likely only expose the
needed area to protect the gates with a high beam current to shorten writing
times. Low beam energies (i.e. low acceleration voltages) should be used to avoid
mechanical damage of the 2DEG.
Polyimide Using polyimides is another more or less simple technique to fabricate
isolating layers. Polyimides can be spin-coated and the curing temperatures lie
below 200◦ C. Polyimides have been successfully used to isolate Schottky gates
from top gates lying above [134, 135, 136].
7.2.3
Gate Insulator
Even if leakage currents do not seem to be a problem in our devices, a gate insulator
could eventually enhance the performance of our devices and would make a larger
voltage range accessible. The following methods could be used to provide an adequate
insulator between the sample surface and the gates:
Thermal oxide A layer of SiO2 produced by thermal oxidation is obviously the most
preferable method presented here. Thermal oxidation is a standard process which
is used commonly for fabrication of gate oxides for silicon devices. A thermal oxide
may be produced with our rapid thermal processor (RTP). Because of the high
process temperatures of 900◦ C−1200◦ C this could lead to smearing of the silicon
channels. Especially when using double-channel heterostructures this may lead
to major problems. Of course this process step has to be performed subsequently
after sample growth before the other processing step are performed.
Chemical vapor deposition Dielectric films produced by chemical vapor deposition
are mainly used for insulation and passivation of semiconductor devices [21].
Generally the oxide quality becomes better which higher process temperatures.
Therefore, one could deposit a layer of SiO2 or Si3 N4 at high temperatues after
epitaxial growth of the samples. The maximum usable temperature in our reactor
is specified to 750◦ C. Alternatively, the films could be deposited at temperatures
below 300◦ C before fabrication of the split-gates. If the quality of the films is
sufficient has to be tried. A high density of traps in the insulator changes the onset
142
CHAPTER 7. DISCUSSION AND UNSOLVED PROBLEMS
voltage of the device, which must not be a problem. However, an inhomogeneous
density of traps could lead to a modulation of the chemical potential in the
2DEG. Also this must not be a problem, as the insulating layer is again separated
from the 2DEG by the cap layers which leads to smearing out of the potential
modulations.
Al2 O3 Metal-oxide-semiconductor field-effect-transistors using atomic-layer-deposited
(ALD) Al2 O3 as gate dielectric on Si/Si1−x Gex heterostructures were successfully realized as reported in reference [137]. The Al2 O3 layer was deposited at
a substrate temperature of 300◦ C, using alternately pulsed chemical precursors
of Al(CH3 )3 and H2 O in a carrier N2 gas flow. At a temperature of 300 mK the
carrier density of the 2DEG was well controllable, without virtually any leakage
current. [137]
Crosslinked PMMA As mentioned above, crosslinked PMMA has successfully been
used to isolate different gate layers from another [130, 131, 132] and as gate
dielectric [133]. Of course the quality cannot compare with a thermal oxide, but
because of the simplicity of the fabrication it could be worth trying.
Polyimide Polyimides have been successfully used as gate dielectric to isolate Schottky gates from metallic top gates [134, 135, 136]. Also this technique can easily
be tested because of its simplicity.
7.2.4
Layer between Silicon Surface and Gates
Figure 7.2 shows electron micrographs of split-gates on silicon surfaces examined under
a tilted angle. Between the palladium gates (bright color) and the silicon surface an
additional layer can be seen. To highlight this layer images of samples with lifted gates
were chosen. The origin of this layer is not clear. Most likely a layer of palladium
silicide forms during the evaporation process. Ref. [138] reports on formation of Pd2 Si
on a Si(111) surface at 200◦ C, where the silicide is slightly underreacted and the top
layers are palladium rich. In ref. [139] formation of Pd2 Si at 190◦ C on a Si(001) surface
is reported. On Si(111) surfaces formation of Pd2 Si was shown at room temperature
[140]. Finally, it has been demonstrated that silicide was formed spontaneously by Pd
deposition even at ∼150 K. The phase of the silicide was Pd2 Si, and films of Pd2 Si
were grown epitaxially. [141]
143
7.2. UNSOLVED PROBLEMS
This layer does not seem to have any negative effect on our samples. However, it would
be interesting to know the exact properties of this layer. For example, if this layer
consists of conducting palladium silicide lifted gates would be no problem.
(a)
(b)
Figure 7.2: Electron micrographs of palladium split-gate structures on silicon
surfaces. The images are made at a tilt angle of 60◦ to make this layer visible.
The composition of this layer is still unclear. Most likely the layer consists of
palladium silicide formed due the thermal energy of the evaporated palladium.
7.2.5
Stained Samples
This is not really a problem but, possibly a visual annoyance. Whenever palladium (or
other metals) are evaporated on a PMMA resist which was prior dipped in diluted HF,
stains appear on the sample surface after lift-off. Figures 7.3a-c show such a stained
sample. Figure 7.3a shows spots around a test array of SET structures. Figures 7.3b
and c show zoom-ins of a larger spot consiting of many small spots with diameters
around 10 nm. The following points have been observed:
• Without an HF-dip before deposition these spots do not occur
• Also without subsequent deposition of metal stains do not appear
• More layers of PMMA do not change the density, shape or size of the stains
• Increasing the dip time from 30 sec to 5 min does not change the density, shape
or size of the stains
144
CHAPTER 7. DISCUSSION AND UNSOLVED PROBLEMS
• The stains are near the sample surface and flat, as they can only be detected
with the in-lens detector of the SEM (left side of figure 7.3d) and not with the
SE2 detector (right side of figure 7.3d)
• The size of the dots is often smaller than 10 nm, while the resist thickness used was
alway greater than 250 nm. From geometrical considerations, no palladium could
reach the sample surface if the PMMA layer would be sponge-like. Palladium
could only deposit on the sample surface if more or less vertical holes exist in the
resist. Dots with a size of 10 nm can be formed either by exact vertical holes with
a diameter of 10 nm, or by non-vertical bigger holes by shadowing effects. Because
of the high density of spots the latter can be excluded, as the dots remain distinct
and do not merge as is should happen with larger hole diameters. It is more than
unlikely that HF produces exactly vertical holes. Therefore, this theory can be
excluded.
Because of the observations and considerations above I do not think that the stains are
palladium dots. More likely, I think that HF soaks into the PMMA resist and reacts
with the silicon surface due to the high temperature during the deposition process.
Developers for PMMA resists usually consist of a mixture of IPA (isopropyl alcohol)
and MIBK (methyl isobutyl ketone) [142, 79]. The developer used in this thesis also
consists of this mixture [143]. This developer swells the resist as IPA/MIBK diffuses
into the resist layer [79]. It is also well known that PMMA is dissolved in an HF/ethyl
alcohol mixture [144]. Together this could lead to diffusion of HF into the PMMA
resist.
An AFM (atomic force microscopy) analysis of the sample surface should give new
interesting results about this phenomena.
145
7.2. UNSOLVED PROBLEMS
(a)
(b)
(c)
(d)
Figure 7.3: Electron micrographs of a stained silicon surface. a) Spots around
an SET test array. b) and c) Zoom-ins. The spots consist of many smaller spots
with spot sizes of about 10 nm. d) The stains can be visualized with the in-lens
detector of our SEM, but not with a regular SE2 detector.
146
CHAPTER 7. DISCUSSION AND UNSOLVED PROBLEMS
Chapter 8
Conclusion and Outlook
8.1
Conclusion
In this thesis the technological preconditions for the fabrication of lateral quantum
dots realized with a Schottky split-gate technique on high mobility silicon/silicongermanium modulation doped samples were developed. Different kinds of Ohmic contacts were tested, the mesa etching parameters were optimized, and a new optical mask
suited for various types of split-gate based quantum devices was developed. Furthermore, a new scanning electron microscope (LEO Supra 35 FE-SEM) was installed and
the appropriate e-beam lithography system was brought to working conditions.
The lateral quantum dots were realized on modulation-doped, strained Si/SiGe heterostructures, the carrier densities of which were determinded by Hall and Shubnikovde Haas measurements. The heterostructure used for the fabrication of the devices
showed at low temperatures an electron mobility of about 1.5×105 cm2 /Vs at carrier
densities between 3.2 and 3.6×1011 cm−2 . The split-gate structures were perpared by
e-beam lithography into polymethyl methacrylate (PMMA) resist with a Raith Elphy control unit on two different scanning electron microscopes. The split-gates were
fabricated by lift-off of a palladium metalization layer. Finally, connections from the
split-gates to the bond pads were made by optical lithography, using palladium or
chromium/gold lift-off.
Electrical measurements were performed down to 30 mK in a 3 He cryostat and in a
3
He/4 He dilution refrigerator. Measurements of the IV-characteristics of the split-gates
showed well controlled leakage currents. Coulomb-blockade and stability diamonds were
147
148
CHAPTER 8. CONCLUSION AND OUTLOOK
recorded, showing that the dots contain only a few electrons.
Our experiments demonstrated that Schottky-barrier reducing mechanisms can be
overcome by adequately designed Si/SiGe heterostructures and that SET functionality can be achieved in modulation-doped Si/SiGe heterostructures with a standard
split-gate approach that can easily be integrated into an array of coupled SETs as
suggested in reference [6].
8.2
Outlook
Regarding technological aspects, the most important task will be the passivation of
the split-gates to prevent them from forming short-cuts. The approaches presented in
7.2.2 could more or less easily be tried, but a plasma-assisted deposition may be the
most promising candidate. Furthermore, a gate oxide could possibly enhance the performance of our devices. Here a thermal oxide produced in an RTP will be favorable.
Samples with intrinsic back gates which are currently developed in the PhD thesis of
D. Gruber [129] could bring another degree of freedom to our samples and could be
used instead or together with the plunger gate to tune the electrochemical potential
in the dots. Possibly, annealed Au/Sb contacts will produce shorts between the 2DEG
and such an intrinsic back gate layer and ion implanted contacts have to be used for
these type of samples. Together with an additional top gate and a double quantum
well sample with different germanium contents in the channels individual electrons in
an SET structure could be brought in and out of resonance in an ESR (electron spin
resonance) apparatus [34, 5, 15, 145, 146, 147].
As single quantum dots are working, the next step will be to get functioning double SET structures. Also, working point contacts for charge readout of the individual
dots will be a necessary precondition for further applications. In longer terms, preparation, measurements of Rabi oscillations and implementation of a SWAP operation,
as allready demonstrated in GaAs samples [148], should be applied to silicon/silicongermanium based heterostructures. For this purpose the cryostates will possibly have
to be rewired with high-bandwidth coaxial lines for rapid pulsing of the gates.
Appendix A
Layer Sequence and Band
Structure of PSG n1417
A.1
Growth Parameters
• 1000 Å Si-buffer (750 ◦ C)
• 2.5 µm Si0.95 Ge0.05 ⇒ Si1−x Gex in 1% steps (750 ◦ C)
• 0.5 µm Si1−x Gex (end: ⇒ 600 ◦ C)
• 150 Å Si channel (⇒ 550 ◦ C)
• 150 Å Si1−x Gex Spacer (550 ◦ C)
• cool ⇒ 300 ◦ C
• 12 s Sb pre-deposition
• 200 Å SiGe:Sb LT (300 ◦ C)
• 450 Å Si1−x Gex (⇒ 600 ◦ C)
• 100 Å Si cap (600 ◦ C)
• 1 min 600 ◦ C
149
150APPENDIX A. LAYER SEQUENCE AND BAND STRUCTURE OF PSG N1417
A.2
Layer Sequence and Band Structure
Figure A.1: Layer sequence and band structure of sample PSG n1417
Appendix B
List of Samples
Used Abbreviations
HB
EBL
RIE
VdP
SET
TLine
BG
SetHB
US
EBR
lito
TriL
dev
st
sp
···
···
···
···
···
···
···
···
···
···
···
···
···
···
···
Hall bar
e-beam lithography
reactive ion etching
Van-der Pauw
single electron transistor
transmission line
back gate
Hall bar for single electron transistor
ultra sonic
edge bead remove
lithography
triple lines
development
stopping
spilling
List of Samples
1316
1353
1353
HB w/o gate, MSG n1316
HB w/ gate, MSG n1353, straight
HB w/ gate, MSG n1353, diagonal
151
152
1317
1317
BT601
BT602
1417
1418
BT603
BT604
BT605
BT606
BT607
BT608
BT609
BT610
BT611
BT612
BT613
BT614
BT615
BT616
BT617
BT618
BT619
VRIET
SRIET
ToRIET
MFCRIET
BGET
BT619
BT620
BT621
BT622
BT623
BT624
BT625
BT626
APPENDIX B. LIST OF SAMPLES
HB w/ gate, MSG n1317, straight
HB w/ gate, MSG n1317, diagonal
EBL test exposure set test1 Jeol
EBL test exposure set test2 Jeol
HB w/ gate, PSG n1417
HB w/ gate, PSG n1418
RIE test, 10 mTorr, O2 20%, SF6 100%, RF 15%, 1 min
RIE test, 22 mTorr, O2 20%, SF6 100%, RF 15%, 1 min
RIE test, 34 mTorr, O2 20%, SF6 100%, RF 15%, 1 min
RIE test, 46 mTorr, O2 20%, SF6 100%, RF 15%, 1 min
RIE test, 100 mTorr, O2 20%, SF6 100%, RF 15%, 1 min
RIE test, 22 mTorr, O2 20%, SF6 100%, RF 5%, 1 min
RIE test, 22 mTorr, O2 20%, SF6 100%, RF 25%, 0.7+0.5 min
RIE test, 22 mTorr, O2 20%, SF6 100%, RF 50%, 0.6+0.4 min
RIE test, 22 mTorr, O2 20%, SF6 100%, RF 100%, 0.8 min
RIE test, 10 mTorr, O2 20%, SF6 100%, RF 10%, 1.8 min
RIE test, 10 mTorr, O2 20%, SF6 100%, RF 30%, 1.1 min
RIE test, 10 mTorr, O2 20%, SF6 100%, RF 70%, 0.9 min
RIE test, 10 mTorr, O2 20%, SF6 100%, RF 100%, 0.8 min
RIE test, 5m Torr, O2 20%, SF6 100%, RF 15%, 1.2 min
RIE test, 2m Torr, O2 5%, SF6 25%, RF 15%, 1.2+2.5 min
RIE test, 0.5 mTorr, O2 2.5%, SF6 12.5%, RF 15%, 4 min
RIE test, 2m Torr, O2 1.25%, SF6 6.35%, RF 30%, 1 min
3x RIE tests w/ AZ5218, carbonization test
4x RIE tests, sputter rate of Au
3x RIE tests w/ gate and resist
2x RIE, influence of mass flow controller on etching time
BG etching test, 3x RIE → ∼ 3µm
BH etch and Vdp: aluminum and anneal
Vdp w/ Ni, 5 min @ 510◦ C
HB w/ gate, PSG n1417
HB w/ gate, PSG n1418
Discs + TLine, Ni, 5 min @ 510◦ C, CrAu
Discs + TLine, Ni, 5 min @ 510◦ C
Discs + TLine, Pd, 5 min @ 510◦ C
Discs + TLine, Ti, 30 min @ 600◦ C
153
BT627
BT628
BT629
BT630
BT631
BT632
BT633
BT634
BT635
BT636
BT637
BT638
BT639
BT640
BT641
BT642
BT643
BT644
BT645
BT646
BT647
BT648
BT649
BT650
BT651
BT652
SetHBs1
BT653
BT654
BT655
BT656
BT657
BT658
BT659
BT660
BT661
Discs + TLine, Pd, 30 min @ 600◦ C
PSG n1315, implanted contacts, mesa for BG, BG, later terrible gates
PSG n1315, impl. contacts, mesa for BG, BG, later BG separated from mesa
PSG n1314, failed HB, HF in acetone-flask!
PSG n1301, failed HB, HF in acetone-flask!
PSG n1314, failed HB, HF in acetone-flask!
PSG n1301, failed HB, HF in acetone-flask!
PSG n1433, TLine, Ti 5 min @ 650◦ C, BG
PSG n1433, TLine, Ti 30 min @ 600◦ C, BG
PSG n1433, unfinished
PSG n1433, unfinished
PSG n1301, HB w/ gate
PSG n1314, HB w/ gate
PSG n1314, HB, SetHBmask, 200 nm SiO2 , gate
PSG n1314, HB, SetHBmask, 350 nm SiO2 , gate
EBL test structures for SEM test
EBL test structures for SEM test
EBL test structures
EBL test structures
EBL test structures
EBL test structures
EBL test structures
EBL test, w/ ashing tests
EBL test, ash 10 sec, HF-Dip
EBL test, HF-Dip
EBL test, ash 10 sec
2×PSG n1317, 3×PSG n1417, SetHB-mask
EBL test for writing onto HB
EBL test for writing onto HB
EBL test on unfinished SetHB
SET auf SetHB1417
SET auf SetHB1417
SET auf SetHB1417
SET auf SetHB1317
p contact test, LSG p1510, VdP, Al 3 min @ 430◦ C, CrAu
p contact test, LSG p1511, VdP, Al 3 min @ 430◦ C, CrAu
154
BT662
BT663
BT664
BT665
BT666
BT667
BT668
BT669
BT670
BT671
BT672
BT673
BT674
BT675
BT676
BT677
BT678
BT679
BT680
BT681
BT682
BT683
BT684a
BT684b
BT684c
BT684d
BT685e
BT685f
BT685g
BT685h
BT684d
BT684e
BT684f
BT684g
BT686
BT687
APPENDIX B. LIST OF SAMPLES
p contact test, LSG p1510, VdP, Al 5 min @ 450◦ C, CrAu
p contact test, LSG p1511, VdP, Al 5 min @ 450◦ C, CrAu
p contact test, LSG p1511, TLine, Al, never annealed
p contact test, LSG p1511, TLine, Al, never annealed
p contact test, LSG p1510, TLine, Al, never annealed
p contact test, LSG p1510, TLine, Al, never annealed
first LEO EBL sample
EBL test, TiPd
EBL test, 631.04 resist, 2 kV, 5 kV
EBL test, 631.04 resist, 2 kV, 5 kV
EBL test, 631.04 resist, 2 kV, 1 kV
EBL test, 631.04 resist, 5 kV, 2 kV
EBL test, 631.01 resist, 5 kV, 2 kV, 30 kV, Cr, 5 kV
EBL test, 671.04 resist, 5 kV, 30 kV, Pd
EBL test, breaking test, 671.04 resist, 5 kV
EBL test, breaking test, 671.04 resist, 30 kV
EBL test, 671.04 resist, 5 kV, 30 kV, Pd
EBL test, breaking test, 671.04 resist, 5 kV, Cr
EBL test, breaking test, 671.04 resist, 30 kV, Cr
EBL test cause of asymmetry, carbon pad, piranha, 671.04, 5 kV, 30 kV, Pd
EBL test cause of asymmetry, silver paint, piranha, 671.04, 5 kV, 30 kV, Pd
EBL test gun align, 671.04, 5 kV, 30 kV, Pd
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 20 sec, US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 5 sec, US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 10 sec, US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF ¿60 sec, no US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 8+4+4 sec, no US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 10 sec, no US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 15 sec, no US
oxide test, gate, mesa, oxide 12.5 min 40◦ C 315 nm, HF 20 sec, no US
oxide test, gate, mesa, no EBR, lito, oxide, lift-off no US, gate connection
oxide t., gate, mesa, no EBR, lito, ox., l-o 1 min w/o, 1 min US, gate connection
oxide t., gate, mesa, EBR, lito, ox., l-o 15 min US, Me 5 min US, gate connection
oxide t., gate, mesa, EBR, lito, ox., l-o 15 min w/o US, Me w/o US, gate connection
EBL test because of asymmetry: structure, rotated stage, piranha, 671.04, 30 kV, Pd
EBL test because of asymmetry: structure, stage normal, piranha, 671.04, 30 kV, Pd
155
BT688
BT689
BT690
BT691a
BT691b
BT692
BT693
BT694a
BT694b
BT694c
BT694a
BT695
BT696
BT697
BT698a
BT698b
BT698c
BT699
BT700
BT701
BT702
BT703
BT704
BT705
BT706
BT707
BT708
BT709
BT710
BT711
BT712
BT713
BT714
BT715
BT716
BT717
EBL test because of asymmetry: step size, piranha, 671.04, 30 kV, Pd
VCSEL dose test, 7µm, MBEM1841, 5 kV
VCSEL by over-exposing, Si, 671.04, 5 kV
condenser, CrAu, lito, oxide 40◦ C, lift-off, gate hole
condenser, CrAu, lito, oxide 100◦ C, lift-off, oxide does not stick completely
EBL test, w/ new beam blanker, piranha, 671.04, 30 kV, Pd
EBL test, w/ new beam blanker, piranha, 671.04, 5 kV, Pd
stained sample test HF and Pd, 671.04, 30 kV, HF, Pd → stains
stained sample test HF and Pd, 671.04, 30 kV, no HF, Pd → no stains
stained sample test HF and Pd, 671.04, 30 kV, HF, Cr → stains
stained sample test HF and Pd, 2×671.04, 30 kV, HF, Pd → stains
VCSEL 671.04, 5 kV, 30 kV
VCSEL dose test, 5 kV, 30 kV
VCSEL test on PbEuTe, 5 kV, 30 kV
stained sample test Temp, 671.04, bake, dev/st/sp, HF, Pd → stains
stained sample test Temp, 671.04, bake, dev/st/sp, bake, HF, Pd → stains
stained sample test Temp, 671.04, bake, dev/st/sp, HF, bake, Pd → rings
VCSEL
EBL test after exchange of turbo pump, 671.04, 5 kV, 30 kV, Pd
condenser v2, CrAu, SiO2 40◦ C, ohmic HF, gate CrAu, lift-off
condenser v2, CrAu, SiO2 40◦ C, ohmic HF, gate CrAu, lift-off
condenser v2, CrAu, SiO2 110◦ C, ohmic HF, gate CrAu, lift-off
condenser v2, CrAu, SiO2 110◦ C, ohmic HF, gate CrAu, lift-off
VCSEL4lift-off, new switch box, 5 kV, Pd
EBL SET-test, new switch box, 671.04, 5 kV, 30 kV, Pd
EBL SET, TriL, VCSEL, 671.04, 30 kV, Pd
EBL SET, TriL, VCSEL, 671.04, 5 kV, Pd
EBL SET, TriL, VCSEL, 671.04, 30 kV, Pd
EBL SET, TriL, VCSEL, 671.04, 30 kV, Pd
EBL SET, TriL, VCSEL, 671.04, 30 kV, Pd
EBL test, 631.01 10 nm, 5 kV, 30 kV
EBL test, 631.01 10 nm, 5 kV, 30 kV, RIE, ash
EBL test blanker test, 671.04, 30 kV, Pd
VCSEL lift-off test, 671.04, 5 kV, Pd
EBL SET test + single SET, 671.04, 30 kV, 5 kV, Pd
EBL SET test + single SET, 671.04, 30 kV, 5 kV, Pd
156
BT718
BT719
BT720
BT721
BT722
BT723
BT724
BT724
BT725
BT726a
BT726b
BT726c
BT726d
BT726e
BT727
BT728
BT729
BT730
BT731
BT732
BT733
BT734
BT735
BT736
BT737
BT738
BT739
BT740
BT741
BT742
BT743
BT744
BT745
BT746
BT747
BT748
APPENDIX B. LIST OF SAMPLES
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, 5 kV, Pd
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, 5 kV, Pd
SetHB, rate controller defect, stopped processing after anneal
SetHB, rate controller defect, stopped processing after anneal
SetHB, rate controller defect, stopped processing after anneal
SetHB, rate controller defect, stopped processing after anneal
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
as 724, 671.04, 30 kV, bake 150◦ C, Pd, smeared out, although stains
HF, bake 160◦ C, 671.04, dev/st/sp, HF, Pd, lift-off → stains
HF, 671.04, dev/st/sp, HF → structure in resist
HF, 671.04, dev/st/sp, HF, Pd → Pd+PMMA lifts → stains
HF, 671.04, dev/st/sp, HF, bake 150◦ C, Pd, lift-off → stains
HF, 671.04, dev/st/sp, HF 5 min, Pd, lift-off → stains
as 724, 671.04, 30 kV, Pd, ash 20 min, ash 60 min
SetHB
SetHB
SetHB
SetHB
Sb calibration for Edwards deposition chamber
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
EBL SET test + single SET w/ & w/o marks, 671.04, 30 kV, Pd
EBL SET test on failed HB
EBL SET test, settling time increased to 10/15, 671.04, 30 kV, Pd
EBL SET test, settling time increased to 10/15, 671.04, 30 kV, buffered, Pd
SET on HB BT728
SET on HB BT729
test sample for ”Nanopraktikum”, 671.04, 30 kV, 5 kV, Pd
test sample for ”Nanopraktikum”, 631.01, 30 kV, 5 kV
SET HB QuantumMask, PSG n1417, broken during processing
SET HB QuantumMask, PSG n1417
SET HB QuantumMask, PSG n1417
SET HB QuantumMask, PSG n1417
SET HB QuantumMask, PSG n1433 for testing of Ohmic contacts
157
BT749
BT750
BT751
BT752
BT753
BT754
BT755
BT756
BT757
BT758
BT759
BT760
BT761
BT762
BT763
BT764
BT765
BT766
BT767
BT768
BT768
BT769
BT770
BT771
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
EBL
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
test double dot, 671.04, 30 kV, Pd
ash test, 671.04, 30 kV, ash 10 sec, Pd
ash test, 671.04, 30 kV, ash 30 sec, Pd
ash test, 671.04, 30 kV, ash 60 sec, Pd
ash test, 671.04, 30 kV, ash 10 sec, Pd, analysis in SEM, lift-off
ash test, 671.04, 30 kV, ash 30 sec, Pd, analysis in SEM, lift-off
ash test, 671.04, 30 kV, ash 60 sec, Pd, analysis in SEM, lift-off
test, double dot & dots, 671.04, 30 kV, Pd
test, double dot & dots, 671.04, 30 kV, Pd
test double dot, coating a long time ago, 30 kV, Pd, lift-off in 1165
test double dot, newly coated, pipette refilled, 30 kV, Pd, Pd, lift-off in 1165
test double dot, newly coated, pipette refilled, 30 kV, Pd, Pd, lift-off in 1165
test double dot on HB 1433, 30 kV, Pd → not successful
test exposure after cathode exchange, 30 kV, Pd, Pd, lift-off in 1165
test exposure after cathode exchange, 30 kV, Pd, Pd, lift-off in 1165
test double dot on Quantum-HB 1433
double dot on Quantum-HB 1417
158
APPENDIX B. LIST OF SAMPLES
Acknowledgements
I would like to thank the following people for their direct or indirect support on this
thesis, only a few will be mentioned by name as there are too many people that should
be named, and I am also afraid to overlook someone:
• Prof. Dr. Friedrich Schäffler for the interesting topic, for the productive discussions and for his ongoing support in every respect.
• Ao. Univ. Prof. Dr. Gottfried Strasser for taking on the second report.
• DI Dietmar Pachinger for growing such excellent heterostructures, as well as
DI Herbert Lichtenberger and Dr. Michael Mühlberger who keeping the MBE
running.
• DI Georg Pillwein for his great support regarding low-temperature measurements,
as well as for helping me repairing electron microscopes and other nearly permanently broken stuff. I also want to thank him for the endless discussions about
quantum dots during work and for always having a open ear for everthing else
during the coffee-breaks.
• DI Daniel Gruber for his self-sacrificing help with problems concerning computer
and linux.
• All colleagues at the institute for the homely atmosphere. Especially my colleagues in the office (the “Elitebüro - Office of Excellence”) who are experts for
everthing, indeed. They were always open for fruitful discussions which gave me
a better insight in physics. From them I learned much about physics, perhaps
even more about non-physical matters, and sometimes I learned things I never
ever wanted to know. And of course I really enjoyed the post-work activies with
them.
159
160
ACKNOWLEDGEMENTS
• All my friends, which are too many to be named, and of course to ”the family“,
for being good friends in good times and even better ones in hard times. They
made my life so much more cheerful ... and how could one enjoy the beauty of
physics if one cannot enjoy the beauties of life.
• And of course to my parents and my sister, which awoke the interest in nature
in technics since the early beginning of my life.
Curriculum Vitae
Feb. 25, 1976 born in Braunau am Inn, Austria
Sep. 1982 - July 1986 Volksschule (primary school) in Braunau
Sep. 1986 - July 1990 Bundesrealgymnasium (secondary school) in Braunau
Sep. 1990 - June 1995 Technical College HTL Braunau for Electronic, education branch:
Informatics
June 1995 School leaving examination (Matura) with honours
Oct. 1995 - Sept. 2001 Study of Technical Physics at the Johannes Kepler Universität
Linz
June 2000 - August 2001 Diploma thesis at the Department for Semiconductor Physics
at the Johannes Kepler University Linz on the topic: “Fabrication of Quantum
Point Contacts in the AlGaAs-System”
Sept. 21, 2001 Graduation in Technical Physics
Oct. 1, 2001 - Sept. 30, 2002 Alternative civilian service at the AKh - Allgemeines
Krankenhaus (general hospital) Linz at the central x-ray institute
Oct. 1, 2002 - Feb., 2007 PhD thesis at the Department for Semiconductor Physics at
the Johannes Kepler University Linz
161
162
CURRICULUM VITAE
List of Publications and List of Presentations
List of Publications
T. Berer, D. Pachinger, G. Pillwein, M. Mühlberger, H. Lichtenberger, G. Brunthaler
and F. Schäffler, “Lateral quantum dots in Si/SiGe realized by a Schottky splitgate technique”, Appl. Phys. Lett., 88, 162112 (2006)
T. Berer, D. Pachinger, G. Pillwein, M. Mühlberger, H. Lichtenberger, G. Brunthaler
and F. Schäffler, “Lateral quantum dots in Si/SiGe realized by a Schottky splitgate technique”, Physica E, 34, 456-459 (2006)
T. Berer, D. Pachinger, G. Pillwein, M. Mühlberger, H. Lichtenberger, G. Brunthaler
and F. Schäffler, “Lateral quantum dots in Si/SiGe realized by a Schottky splitgate technique”, Semicond. Sci. Technol., 22(1), 137-139 (2007)
List of Conference Presentations
Oral Presentations
ISTDM 2006, May 15-17, 2006
Princeton, New Jersey, USA
Lateral Quantum Dot in Si/SiGe realized by a Schottky Split-Gate Technique
Thomas Berer, Dietmar Pachinger, Georg Pillwein, Michael Mühlberger, Herbert
Lichtenberger, Gerhard Brunthaler and Friedrich Schäffler
ICPS 2006, July 24-28, 2006
Vienna, Austria
Lateral Quantum Dot in Si/SiGe realized by a Schottky Split-Gate Technique
Thomas Berer, Dietmar Pachinger, Georg Pillwein, Michael Mühlberger, Herbert
Lichtenberger, Gerhard Brunthaler and Friedrich Schäffler
LIST OF PUBLICATIONS AND LIST OF PRESENTATIONS
163
Poster Presentations
EP2DS-16, July 10-15, 2005
Albuquerque, New Mexico, USA
Single-Electron Transistor in Strained Si/SiGe Heterostructures
Thomas Berer, Dietmar Pachinger, Georg Pillwein, Michael Mühlberger, Herbert
Lichtenberger, Gerhard Brunthaler and Friedrich Schäffler
14th International Winterschool on New Developments in Solid State Physics, 13-17
February, 2006
Mauterndorf, Austria
Single-electron transistor in strained Si/SiGe heterostructures
Thomas Berer, Dietmar Pachinger, Georg Pillwein, Michael Mühlberger, Herbert
Lichtenberger, Gerhard Brunthaler and Friedrich Schäffler
164
CURRICULUM VITAE
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