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Transcript

ESSCIRC A LowVoltage Fully Balanced OTA with Common Mode Feedforward and Inherent Common Mode Feedback Detector Ahmed Nader Mohieldin Edgar SnchezSinencio Jos SilvaMartnez Department of Electrical Engineering, Texas AampM University, College Station, Texas , USA Abstract A pseudo differential fully balanced CMOS OTA architecture with inherent common mode detection is proposed. Through judicious arrangement, the commonmode feedback circuit can be economically implemented. The OTA achieves a good CMRR and is suitable for low voltage operation. As an example of the applications of th the proposed OTA, a MHz order linear phase OTAC filter is presented. The measured group delay ripple is , the filter dynamic range is dB. It consumes .mW per complex poles. proposed. It is shown that a separate CMFB circuit can be avoided with appropriate arrangement of cascaded pseudo differential OTAs, for example in a filter. This approach takes advantage of the OTAs used for the differential mode operation to render low common mode gain without extra circuitry. The proposed OTA has inherently the common mode detector, hence the CMFB is economically realized. . Proposed OTA architecture In general operational transconductance amplifiers can be divided into two main groups Fully Differential FD and Pseudo Differential PD. FD is based on a differential pair with tail current source and PD is based on two independent inverters without tail current source. Avoiding the voltage drop across the tail current source, in a PD structure, allows achieving wider linear input range and makes the architecture attractive for low voltage applications. Removing the tail current source, however, results in a poor rejection to common mode noise. Using a common mode feedforward CMFF technique, ACM at low frequency is in the order of unity . A separate transconductance is often used for common mode detection . This approach adds more load to the driving stage due to the connection of two input transistors, one for the differential transconductance and the other one for the common mode transconductance, thus doubling the input capacitance. The CMFF improves the rejection to common mode signals but it is incapable to fix the DC common mode output voltage. Figure shows the circuit implementation of the proposed OTA. It can be described as a conventional three current mirror single ended OTA, without the tail current, plus the additional branches dashed lines. Thus the OTA becomes fully balanced and fully symmetric with enhanced features to be described. . Introduction In general, a fully differential structure has an improved dynamic range over its single ended counterpart. This is due to better common mode noise rejection, better distortion performance, and increased output voltage swing. One important disadvantage of fully differential structures is the need of an extra common mode feedback CMFB circuit. A CMFB circuit is needed for two reasons To fix the common mode voltage Vcm at different high impedance nodes. to suppress the common mode signal components, on the whole band of differential operation that tends to saturate different stages. A CMFB circuit is classically performed by means of a CMFB loop. The CMFB loop has to be designed carefully to avoid potential stability problems. This often increases the complexity of the design, the power consumption, and the silicon area used. The frequency response of the differential path is also degraded due to the added parasitic components involved in conventional CMFB schemes. In some cases and due to the system configuration, the CMFB requirements can be relaxed. For instance, if the common mode gain is sufficiently small, as would be the case of a conventional differential pair based OTA with a tail current, the CMFB bandwidth might be reduced. Its primary function will be to set the common mode voltage and it will not consume much power. Nevertheless, for good power supply rejection, a wide bandwidth CMFB is needed. In other cases, when the output is loaded by low impedance, the DC output voltage is well defined and assuming that the common mode gain is small enough, there may be no need for the CMFB circuitry as would be the case of filters built using lossy integrators . In this work, a practical pseudo differential OTA is . Inherent common mode detection It can be shown, using the quadratic IV characteristics of a transistor neglecting all short channel effects, that current I I in Figure provides the information about the common mode level of the inputs as follows v K W I I . P V dd V icm VTP d L where Vi Vicmvd/, and Vi Vicmvd/. the effective carrier mobility eff is no longer constant and is a function of both the longitudinal and transversal electric fields. CMFB can be implemented by judiciously connecting at least two of the proposed OTAs.V . eff/E/EC. we have I VSS Figure . CMFB and CMFF arrangements Although the CMFF provides rejection to the common mode components at the output. For short channel devices. sat is the saturation carrier drift velocity. with minimum length L. due to the cross product of differential and common mode signals. Note that the value of in must be modified to include the effect of the transversal electric field. the drain current I of a transistor in saturation region is given by Vout I I I I Vi I M M ViI VoutI I I I I I M M M M VZ M M VSS Figure . Thus the excess phase is given by gm s tan nd M M VX M M Note that CZ as well as gm are functions of W . OTA with CMFF and CMFB MBM . yields . Due to transistor mismatches. is the lowfield mobility. Linearity issues Note from that the linearization of the output current depends on the cancellation of the quadratic components of the individual currents I and I. VDD I I I I . even neglecting all mismatches. L can be chosen to be minimum to reduce the excess phase although it will sacrifice the DC gain. Cox is the oxide capacitance per unit channel area. Using taylor series expansion. Thus. and fedback by M . with VdVPeakcost. and /LEC. This can be achieved by adding the four transistors M M and M M. Proposed OTA architecure . then VSGVTPVovvd/ VSDVDCkvd/ where VovVddVicmVTP is the overdrive voltage. is the output impedance constant. E is the longitudinal electric field. Considering the degradation of mobility due to these effects and the channel length modulation effect. and EC is the critical electric field. In the proposed OTA architecture. as shown in Figure . The signal common mode components are suppressed by the action of the CMFF. L is the device electrical channel length.V and . this cancellation is not perfect and some second order distortion will result. thus involves an iterative design procedure. Frequency response and excess phase The differential mode transconductance of the proposed OTA. yielding for MBM I I K W I B P Vdd Vicm VTP vd L K W I od I I B P Vdd Vicm VTP vd Gm v d L VDD iod gm g m g m vd g m sCZ s / nd where CZ is the total parasitic capacitance at node VZ. to be . can be written as K W V DC V ov v d / vd I P L V ov v d / where /Vov.Note that after extracting the common mode information. The DC level of the output is sensed at node VX of the next OTA. VDD VDD VX from next stage VX from next stage Vref M M M M VX M M M VDD Vout I Vi M M Vi I Vout I VY I M M M M M M VZ M M M VY K P W V SG VTP VSD L V SG VTP where KPeffCox. for MM. and k/VDC. the common mode current I I/ is subtracted at the output nodes of the OTA. we still need to fix the DC common mode output voltage. The main nonlinearity contribution for the proposed OTA structure is due to short channel effects. If a differential signal is applied. respectively. Substituting and in . the common mode signal has to be suppressed as much as possible . ECsat/. Even order harmonics can also appear. This arrangement has the advantage that the differential mode signals and the common mode signals share basically the same loop. id is then compared with the proper current id fixing the DC output level to the required value. and the transconductance of the CMFB loop is the same as the differential mode transconductance. and k is the gain from the input to node Vz see Figure . The value of and have been determined for the used technology by a best fit to the simulated device characteristics. g m g sC X ACM s g m sCZ g m sC X GCMFB s g sC L A direct tradeoff between linearity and frequency response excess phase is observed from . CMFB CMFB g m sC Z g m sC X g o sC L g o sC L Note that the flow of the common mode information from one stage to the other is done in a natural way. Increasing Vov also improves the linearity at the expense of power consumption. Using and . . Consider only the integrated thermal noise power. yields HD .m CMOS process. .Vov Vov Vov . Note that ACM. ACMFB should be made as high as possible at DC. where CX and CZ is the total parasitic capacitance at node VX and node VZ respectively. the last stage of the first biquad. is much less than unity. This can be accomplished by increasing the length of the channel /L which at the same time increases the parasitic capacitances. and consequently the SNR. and the last stage of the second biquad do not need to have a CMFB since their outputs are common with other OTAs which will automatically fix the output DC level of the output. the common mode gain. where fMHz and fdB. lt. at low frequency. Measurement results The filter has been fabricated in AMI . The transconductance gm needs also to be maximized to reduce the noise contribution of subsequent transistors. The CMFB is idealy transparent to differential signals and acts at low frequencies as a resistor of value /gCMFB gCMFBgm is the small signal CMFB transconductance for common mode signals. the output common mode level needs to be fixed only once for any number of OTAs sharing the same output. which is also used for differential mode operation.BW . Filter architecture For a given HD. some of the fully fledged OTAs with CMFB and CMFF may be replaced by ones with CMFF only as that shown in Figure . The smaller is. In this design B is chosen to be unity to maintain the ability for high frequency operation. the maximum input voltage. where V nKT. Increasing B will reduce the noise. Similarly. For instance. CL is the load capacitance.HD . CMFFCMFB g m A C A g m A CMFF Vin g m A g m A VBPCommon Mode Information VLP where BW is the equivalent noise bandwidth.VPeak Vov Vov Vov .BW .BW/gm. ACM. Increasing gm will also reduce the noise.xf.KT . the payment is in the power consumption in this case. It . m g m g m g m B g m B C A CMFF Fig. gmB. Thus. Noise performance The encircled transistors in Figure contribute to common mode noise only due to the symmetric configuration and thus their effect can be neglected.HD Vov Vov Vov V Peak Neglecting channel length modulation effect for k. increase the effective transconductance and consequently gCMFB. is computed as g m. The requirement is a group delay error less than for frequencies up to . m g m VBP CMFF g mB VLP CMFFCMFB CMFF CMFFCMFB g mB g m B CB g mB C B VLP VBP Figure . VBP VLP Vin CMFFCMFB Fig. CMFB loop design considerations The open loop gain of the CMFB. for MM. . The CMFB loop . The accuracy of the current mirror is also less for large values of B. can increased by increasing VOV.g m SNR log log g g m g m V n rms . and its bandwidth should be as high as the differential mode bandwidth. The chip micrograph is shown in Figure . The block diagram of the filter with the required CMFB arrangement is shown in Figure .xf.Vin rms Vov Vov Vov is compensated for stability purposes by the load capacitance CL. Thus for MM. and VDCgtVov and substitute the value of in . Filter architecture A fourth order linear phase BesselThompson OTAC filter has been implemented. the input referred noise becomes V n rms g g m g m KT . gmA. the following expression for the SNR can be obtained Vin rms . g is the output conductance. the wider the linear range for a given HD. is given by g m g m g m G s A s . but it directly deteriorates the excess phase as CZ increases. this is a result of the action of both CMFB and CMFF circuits. . The common mode level is sensed only once per output. at MHz. The proposed OTA features very attractive linearity properties and inherent common mode detection. Chip micrograph Ripple on lt group delay f lt . no. vol. The group delay ripple is for frequencies up to the dB frequency. November . pp. dB. IEEE J.J. The same principle can be applied to any OTA with CMFF to incorporate the detection of the common mode information of the previous stage for CMFB stabilization. Measured results assured the good performance of the proposed transconductance building block and its suitability for high frequency and low voltage operation. . no.V . Nov. th A MHz order linear phase OTAC filter has been implemented in . IEEE J. Spectrum for a mVpp MHz input signal area of . The filter consumes mA from a . .fdB Max Input mVpp THD dB Output noise .MHz GmC LPF. IEEE J. SolidState Circuits. .. and W. Equirriple This Work th Order Bessel f dB MHz MHz lt f lt fdB mVpp dB N/A gt dB MHz lt f lt fdB mVpp dB Vrms dB Figure . pp. IEEE Custom Integrated Circuits. and is dB. July . . Castello. March . The measured CMRR. pp. . . The measured group delay ripple is about for frequencies up to MHz. V power supply.m CMOS process and occupies an A. A V MHz BiCMOS pseudo differential continuoustime filter. respectively. can be tuned by changing Vicm. . pp. IEEE International Symposium on Circuits and Systems. equiripple linear phase filter. Steyaert. Group delay .. V. Shoval. W. Avoiding common mode feedback in continuoustime GmC filters by use of lossy integrators. Snelgrove and A. . Equirriple th Order .. M. Figure shows the measured phase response of the filter. Rezzi. A balanced . Tanimoto.mm only... Sansen. N. Dehaene. A V MHz continuoustime seventh order . no. References . Phase response Figure . Baschirotto. no. Arai. SolidState Circuits.m CMOS Figure . and T. A MHz standard CMOS pulse equalizer for hard disk read channels. respectively. The transconductance. Figure shows the filter output spectrum for a differential input signal of amplitude mVpp and frequency MHz. Filter Performance Parameters Filter type and order th Order . V mA . vol.m CMOS Include filter boost V mA . SolidState Circuits. PSRR . Table contains a summary of different filter performance parameters compared with previously reported works in and . dB. and R. and dB. Figure . A Vpp linear input range fully balanced CMOS transconductor and its application to a . IEEE J. Contreras. Conclusions A pseudo differential fully symmetric fully balanced OTA architecture has been presented. T. H.. pp. M. vol.S. Schaumann. pp. . and R. . This is done at minimum cost of area and power consumption. This corresponds to dB of dynamic range DR for . Table .occupies a small area of x m . . The total inband integrated output noise is about Vrms. Balan. SolidState Circuits. and consequently the dB frequency of the filter. Itakura. vol. THD at MHz. A. and PSRR at MHz is dB. This is achieved by changing the CMFB reference voltage Vref see Figure . F. and dB. Ueno. W. It has been demonstrated that the structure made it easy to incorporate the CMFB arrangement.m BiCMOS . The group delay is shown in Figure . . m CMOS transconductanceC filter tunable over the VHF range. T. Rao. mVrms DR dB Power supply V Current drain mA Technology . vol.