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Transcript
I. Introduction
Rapid advances in the technology of high-end multimedia, processors, and
networking, which require data links with ever-increasing capacity, have demanded highspeed optical communication systems due to their superiority in low loss, low
interference and wide bandwidth performance. Optical communication devices and
systems are now being explored not only in long-haul and high density applications such
as synchronous digital hierarchy (SDH)/synchronous optical network (SONET) systems,
and wavelength division multiplexing (WDM) network systems, but also in short-haul
applications, such as local area network (LAN), fiber-to-the-curb/home/building/desktop
(FTTX), and board-to-board interconnections [1].
Typical optical communication systems consist of laser diode, laser driver, optical
media, photodiode, and receiver. In such systems, the laser driver is one of the key
components, where it performs as the interface between the electronic devices and the
optical devices. Its design, although simple in concept, is very challenging because of its
stringent specifications such as large output current requirement and clean operation at
high speed. Therefore, suitable circuit structures, suitable decoupling techniques, and a
series of optimization steps are necessary for the laser driver design.
Laser drivers have traditionally necessitated the use of expensive technologies
such as GaAs [2-7], Silicon bipolar [1,8], and InP [9], especially for data rates
approaching 10 Gigabit per second (Gbps) or beyond. However, in low-cost and highvolume applications such as LAN and metropolitan area network (MAN), there has been
an increasing interest in commercial CMOS technology for implementing the laser driver
because CMOS technology has its unique advantages such as low power and low cost of
1
fabrication due to high yield and a higher degree of integration. The objective of the
proposed research is to implement a low-power, low-cost, and high-speed CMOS laser
driver that can be employed in short-haul applications such as LAN, MAN, FTTX, and
board-to board interconnection applications.
Section 1 of this proposal discusses the origin and history of the problem by
reviewing the concept of optoelectronic links, properties of semiconductor lasers that
impact the design of the laser driver, some examples of circuit topology in laser drivers,
and bandwidth enhancement techniques to allow high-speed operation in CMOS
technology. Also provided in section 1 are some preliminary results from the proposed
research. Section 2 discusses the proposed research in more detail and describes the
work remaining to be done along with the facilities needed.
II. Origin and History of Problem
2.1 Optoelectronic Links
The system block diagram for optoelectronic links is shown in Figure 2.1. It is
consisted of an optical transmitter, optical source, optical media, photodetector, and
optical receiver. On transmitting side, the optical transmitter converts the input signal
coming from the optical source into a large current used to modulate the optical source.
The light output propagates through the optical media. The light signal from the optical
media is collected by a photodetector which generates the electrical current. The optical
receiver converts the optical signal into an electrical signal with the photodetector and
amplifies it enough to be treated as a digital signal.
2
While the system topology of figure 2.1 has not changed much over the past
several decades, the design of its building blocks and the levels of integration have.
Motivated by the evolution and affordability of IC technologies as well as the demand for
higher performance, this change has created new challenges, requiring new circuit and
architecture techniques[10].
Figure 2.1 Simple block diagram of optoelectronic links
2.2 Semiconductor Laser
Light-emitting diodes (LEDs) and semiconductor lasers are used as the main
optical source in communication systems. A advantage of the laser over the LED, such as
its the unique size, spectral region of operation, high efficiency, and high-speed operation
have led to dramatic improvements in high-speed optical communication systems. The
trend in the early stages of semiconductor laser development was toward optimizing laser
structures for improvements in the static lasing characteristics in terms of threshold
current, quantum efficiency, linearity of light versus current characteristic, operation at
high optical power, and long-term reliability [11]. As the laser fabrication technology
3
improved, their high-speed dynamic characteristics become a subject of increasing
importance. A plot of the light output power from a semiconductor laser and LED is
shown figure 2.2.
Figure 2.2 The L-I curve for Laser and LED. Ith indicates the threshold current of laser
If the current is less than a threshold value, Ith, the optical power of laser is small
and the device operates as an LED, utilizing spontaneous emission. As the current
increase above the threshold value, the stimulated emission become dominant and the
laser begins operating in linear region with a high slope efficiency (dL/dI) compared with
LED.
2.2.1 Modulation Bandwidth in Semiconductor Lasers
One of the most interesting characteristics of lasers in optical communication
systems is the maximum modulation speed of the laser. The small-signal response of the
4
laser is obtained by linearizing the rate equations. The resulting dynamic solution for
small signal modulation is a second-order transfer function [12].
Po    s
P

J  1

1

2
  s Po    s      j    s Po 
 p
 p


(1)
where P is the photon density in a mode of the laser cavity,  s is a collection of constants
describing the strength of the optical interaction;  s is the spontaneous recombination life
time of the carriers;  p is the photon life time, which is the average time a photon stays
in the cavity; Po is the steady-state photon density; and  is the fraction of spontaneous
emission entering the lasing mode. At large frequencies, the  2 term in the denominator
dominates and the small signal response of laser rolls off rapidly with frequency above a
critical value [11, 12]. The critical frequency for modulation is when the denominator is
minimized,
f 
1
2
 g g o  i I  I th 
 s Po

p
qV
(2)
where  i is the internal quantum efficiency;  is the optical confinement factor;  g is the
group velocity of optical mode; q is the electron charge; V is the active region volume;
I  I th  is the bias current above threshold;
and g o is the differential gain[13].
The modulation bandwidth of the laser is accepted to be equal to f . Illustrated in
figure 2.3, the output power by current modulation, is a fairly flat function at low
frequency, but shows a peaking in the near f . The resonance in the modulation response,
known as the relaxation oscillation in laser [11], physically results from coupling
between the intensity and the population inversion via stimulated emission. Such
5
oscillation causes distortion (ringing) in the output light pulse shape, requiring some time
to settle. Thus this oscillation limits the speed of laser.
Equation (2) suggests three ways to increase the modulation bandwidth of laser by
increasing the optical gain coefficient  s or the photon density Po, or by decreasing the
photon life time  p .
Figure 2.3 Output power vs. Frequency. f is the relaxation oscillation frequency.
The gain coefficient can be increase roughly by a factor of five by cooling the
laser from room temperature to 77 oK [11]. To increase photon density, the cavity of laser
should have higher reflectivity, which results in a smaller threshold current. The third
way to increase the modulation bandwidth is to reduce the length of laser cavity.
However, the maximum frequency only increases as the square root of changes in power
of photon lifetime, so it is not easy to make dramatic improvement in the frequency
response.
2.2.2 Turn-On Delay
When the laser is turned on, the photon generation begins as spontaneous
emission until the carrier density exceeds a threshold level. Thus, stimulated emission
6
occurs after some delay. This turn-on delay is illustrated in figure 2.4 and causes the
output has jitters. The turn-on delay time  D is given by

I

P
 ,
 D   Th ln 
I

I

I
 P B Th 
(3)
where IP is the modulation current, IB is the bias current and  Th is the delay at threshold,
typically 2ns [14].
Figure 2.4 Effect of variable delay in lasers
Equation (3) implies that the turn-on delay will be reduced if we use a large modulation
current and a low threshold current laser. Therefore, for a fast switching operation, it is a
common practice to bias the laser diode slightly above the threshold to avoid turn-on
delay.
2.2.3 Frequency Chirping
As pulses get shorter with an increase in the bit rate, chromatic dispersion, the
change of index of refraction with wavelength, becomes important and plays a significant
role in limiting the performance of optical communication system. When the current
through the laser is modulated, the laser wavelength is also modulated with the power
7
output from the laser. This effect is called frequency chirping. The principal consequence
of chirping is the broadening of the light spectrum, leading to substantial dispersion in
optical fibers carrying such signals, thereby creating intersymbol interference (ISI) [10].
This spectrum broadening coupled with the dispersive properties of optical fibers limits
the maximum fiber transmission distance at high frequency. An approximate equation for
chirping is given as:
 t  

  1 dP(t )

 P(t ) 
4  P(t ) dt

(4)
where  =2  V d hv ,  d is the differential quantum efficiency, h is a Planck’s constant,
 is the optical frequency,  is the linewidth enhancement factor[15], and  is the
nonlinear gain coefficient. Equation (4) implies the frequency shift  t  is proportional
to the rate of change of the optical output power dP(t)/dt[13].
2.2.4 Temperature effects
Laser does not maintain a constant optical output if the device temperature is
changed. The threshold current can be approximately expressed in terms of the working
temperature such as:
I th (T )  I 0  K 1e
T
Ti
(5)
where I0, K1, and Ti are laser-specific constants. Example constants for a DFB laser are
I0=1.8mA, K1=3.85mA, and Ti=40oC [16].
The slope efficiency (S) is defined as the ratio of the optical output power to the
input current. As the temperature is increased, the slope efficiency is decreased. The
following equation provides an estimation of the slope efficiency as a function of
temperature:
8
S (T )  S o  K S e
T
TS
(6)
For the same DFB example laser as above, the characteristic temperature, Ts, is close
to 40oC, So=0.485mW/mA, and Ks= 0.033mW/mA [16].
2.3 Laser Driver
Generally, in most optical systems, it is the electro-optic interface that limits the
maximum speed of system. Therefore, laser drivers and optical receivers are very
important components which determine the performance of optical system. It is
imperative that the laser driver be able to function reliably at high speed as an optical
signal generator. One of the critical challenges of the laser driver is to deliver tens of
milliamperes of current with very shot rise and fall times since bandwidth is trade off for
large output current.
A laser driver can be considered a simple current switch that responses to the
input signal modulated with data stream. The light output from a laser is defined as a
function of the input current rather than voltage as the figure 2.2. For this reason, and
because of the speed advantages of current switching, laser diodes are driven by currents.
There are two categories in optical transmitter circuitry with respect to the
modulation methods. One is the directly modulated transmitter, consisting of a laser
driver directly modulating the laser and a laser diode, which has been used in long and
short haul transmission system. As shown in figure 2.5 (a), the signal imposes onto the
laser bias current yielding an intensity modulation of optical beam. As the data rate is
increased, the fiber dispersion induces ISI due to laser chirp and begins to degrade the
system performance. However, the current research has been focused on developing the
9
direct modulated laser because this type of transmitter has advantages such as low-cost,
low power consumption, and simple structure. As a consequence, for a 10 Gbps short
distance system, much effort has been devoted to the directly modulated transmitter.
The other type of optical transmitters is the externally modulated transmitter,
consisting of a laser driver, a laser diode, and an external modulator, which can achieve a
lower chirp, or even negative chirp to support the dispersion in the fiber [17]. This type of
transmitter has more power consumption than directly modulated transmitter due to the
additional voltage required for the external modulator. In this modulation scheme, shown
in figure 2.5 (b), the laser is operating in CW to drive external modulator which imposes
the RF signal.
Figure 2.5 Direct modulation (a) vs. External modulation (b)
Typically the design of laser driver circuits incorporates the use of various
feedback loops to compensate for the effects of variation of input data stream,
temperature and aging. One simple laser driver circuit used to connect the output of a
current driver circuit directly to the laser diode is shown in Figure 2.6 (a) [18].
10
Figure 2.6 schematic of simple laser drivers
The threshold current for a laser is provided by Vb and modulation current is provided by
source resistor, Rmod, respectively. This type of single-ended laser driver is typically used
with low operating speed due to the unwanted parasitic inductance from the package’s
bonding wires, L1. When this parasitic inductance is combined with the high impedance
of the laser driver circuits and the low impedance of the lasers, it degrades output of the
laser’s rise time and causes the power supply current ripple.
The laser driver shown in the figure 2.6 (b) [19] makes use of the open collector
topology. The laser is directly connected to the collector of one transistor of a differential
pair with the bias current supplied by the current source, Imod. The laser current is the
sum of the collector currents of Q2 and Idc. These currents can be controlled in order to
exceed threshold and reach a point substantially up the lasing region of the L-I curve
whenever light output is called for. It is necessary to employ a matching circuitry
11
between the driver and the laser to overcome the large impedance mismatch in this
topology.
2.4 Bandwidth Enhancement Techniques
Many bandwidth enhancement techniques have been invented to allow higher
speed in CMOS technology.
2.4.1 Shunt peaking
Although inductors are commonly used with narrow-band circuits, they are useful
in broadband circuit as well. A simple common source amplifier is illustrated in figure
2.7. For simplicity, the parastic capacitance, channel length modulation and body effects
are neglected. The frequency response of this amplifier 2.7(a) is given as:
gm R
Vout
( ) 
Vin
1  j RC
(7)
When the inductor L is connected in series with load resistor in the amplifier,
called shunt peaking, shown in figure 2.7 (b), the frequency response of the amplifier is
changed as:
g m  R  j L 
Vout
( ) 
Vin
1  j RC   2 LC
(8)
The small-signal transfer function shows a zero at frequency R/L which extends the
bandwidth of the stage. However, this inductance value can result in a significant gain
peaking which causes signal degradation in broadband application. Thus, when this
technique applied to laser driver design, the optimized value of inductance should be
used[20, 21].
12
Figure 2.7 schematics of common mode amplifier with and without shunt peaking.
2.4.2 Source degeneration
The bandwidth of the differential amplifier can be widened by including
resistance and capacitance between sources as shown in figure 2.8. This is achieved at the
cost of a reduction in the low-frequency gain. To evaluate the effect of the resistance and
capacitance on frequency response, the figure 2.8 (b) employs the half circuit of
differential amplifier. Its effective transconductance is shown as:
Gm 
1  g m 1  RS CS s  
 

 Rs
1  2  g m RS  2 1  RS CS s 

1  g m  //
 2 2Cs s 
gm
(9)
The transconductance hence contain a zero at 1/RSCS and a pole at (1+gmRS/2)/(RSCS). If
the zero cancel the pole at the drain, RSCS=RDCL, then the overall amplifier’s bandwidth
is increased by the factor of 1+gmRS/2. The gain is, as mentioned, is decreased by the
factor of 1+gmRS/2 at low frequencies[22].
13
Figure 2.8 (a) Differential pair with capacitive degeneration, (b) small signal model with half circuit.
2.4.3 Cherry-Hooper Topology
Cherry-Hooper topology is widely used as providing broadband characteristics
with high gain. Figure 2.9(a) shows the schematic diagram of the circuit topology. The
differential mode half circuit of the amplifier in figure 2.9(a) is shown in figure 2.10(b).
The low-frequency gain is calculated as:
Vout g m3 Rd g m1 R f  1 g m3 g m1 Rd R f
g m3 Rd



Vin
1  g m1 Rd
1  g m1 Rd
1  g m1 Rd
(10)
If g m1 Rd  1 and Rf >> (gm1)-1, then,
Av  g m 3 R f 
g m3
 g m3 R f
g m1
(11)
The gain is equal to that of a simple common source (CS) stage having a load resistance
of Rf. The pole frequencies of this circuit can be approximately considered as ωp1 ≈ gm3/C3
and ωp2 ≈ gm1/C2, much higher than those of a CS stage circuit, (RC)-1. Thus, this topology
14
provides a voltage gain of approximately gm3Rf and high-frequency poles. However, this
amplifier faces headroom problems when it used in low supply voltage technology. To
solve the gain-headroom trade-off, modified Cherry-Hooper topologies has been reported
and utilized in high speed circuits[22-24].
Figure 2.9 (a) standard form of Cherry-Hooper amplifier (b) small signal half circuit
III. The preliminary research
3.1 High speed CMOS laser driver design
The aggressive demand for more bandwidth in communication systems has led to
increases in the density of integration and the switching speed of transistors. As the
switching speed increases, a large current (I) switching within a short time period can
generate considerable dI
V  L dI
dt
dt
, and inductance L can lead to sizable voltage fluctuations
. This inductance results from the off-chip bonding wires and the on-chip
15
parastic inductance of the power supply rails. This noise, called simultaneous switching
noise, delta I noise, or  I noise[25, 26], can seriously degrade signal integrity and is one
of main noises which impact the design of laser drivers.
Differential drivers provide many advantages over single-ended circuits. First,
they can maintain a relative constant supply current by canceling unwanted commonmode signal, thus minimize delta I noise. Secondly, they can reduce crosstalk if the
signals remain truly symmetric. Thirdly, the complementary signals with symmetric
transients simplify design of wideband signal transmission interconnect resulting in
improved eye diagrams at higher data rates [27]. Lastly, they have low common-mode
gain, which can help prevent oscillation despite the presence unwanted common mode
feedback due to packaging parasitics. Thus, in this research a differential topology for
laser driver has been employed.
The laser driver is designed to modulate a laser with a serial data stream and
provides dc bias current to laser. The circuit schematic for laser driver is depicted in
Figure 3.1. It consists of a current mirror and a current switch. The current switch
consists of two matched enhanced MOS transistors, M1 and M2. To achieve the proper
driving current into laser, the current sink (I2) is set to Imod and the current sink (I1) is
fixed at Ibias. In the case of logic ‘one’, the M1 transistor is ‘on’ and the M2 is ‘off’ and
the total current, Ibias, flows into the laser. At the logic ‘zero’, the M1 transistor is ‘off’
and the M2 is ‘on’. Then, the current Ibias + Imod flows the laser. Thus, the Ibias current
was designed to have the equal value or slightly larger than the threshold current of laser
diode.
16
Figure 3.1 Schematics of laser driver
One of two differential outputs can be connected to the laser diode and the other
is connected to a dummy load (Z1) implemented by on-chip diode or on-chip resistors.
The characteristics of this dummy load are carefully selected such that it had electrical
characteristics similar to that of laser diode. This allowed for circuit matching and hence
reduced the switching noise.
On-chip matching resistors have been used at the input lines, which are excluded
in the figure 3.1, to minimize the return loss, which can generate timing jitter and
oscillation. Compared to off-chip matching, the return loss is substantially improved
when the on-chip matching resistors are used on the external transmission lines [28].
17
The design goals were determined to meet the needs of two groups of researchers,
a corporate research partner and the integrated optoelectronics group at Georgia Institute
of Technology. Table I shows the summarized specifications used in this research. The
laser driver was designed to have up to 10mA modulation currents and 10mA bias current
at 10 Gbps.
Specifications
Goal
Speed
Greater than 10Gbps
Current
Laser bias current: >10mA
Modulation current : >10mA
Current Density
< 1mA/um square meter
Power Consumption
As low as possible
Table I: Predetermined design goals of laser driver
3.2 Simulation
Simulations have been performed using HSPICE on the overall laser driver
circuitry using Twain Semiconductor Manufacturing Company (TSMC) CMOS 0.18 um
BSIM3 model parameters provided by MOSIS service. Cadence schematic tool has used
for the functionality of the topology of laser driver. Then, the circuitry has been resimulated by using the extracted SPICE file from Cadence layout tool because parastic
parameters, which can be generated and calculated from layout, are not generally
considered in schematic simulation but play a significant role in high speed circuit
performances.
18
Figure 3.2 shows the transient response of the driver at 10 Gbps. As shown in the
figure, the top trace represents the pseudo random bit sequence (PRBS) input signal at
10Gbps and middle one is the output currents of laser diode. The bottom plot shows the
eye diagram used to examine the intersymbol interference (ISI) effects that result from
the limited circuit bandwidth or any imperfection that affects the magnitude or phase
response of a system[10].
Figure 3.2 Simulated transient response of laser driver design with on chip parasitics only.
The eye diagram is useful tool to observe the deviation of the crossings of
waveform from their ideal position, called jitter. This jitter represents the extent to which
19
the zero crossings of a waveform are corrupted. As shown in the simulation results, the
laser driver is working properly with 10mA modulation current at laser diode and
variable laser bias currents at design specification when only on chip parasisitcs are
considered.
In the figure 3.3, the block diagram of the packaging parasitic simulation is
illustrated to determine the value of decoupling capacitors to suppress the delta I noise,
which can not completely be removed by differential topology only. Figure 3.4 shows the
transient response with the line parastics, where the parasitic inductance was assumed to
be 10nH for power supply interconnect, 5nH from traces on the test board, and 2nH from
bonding wires. The top trace represents the current following laser diode and the second
trace is the eye diagram of the first trace. The third and fourth traces represent the voltage
fluctuation in power supply rails. The eye diagram shown in Figure 3.4 shows that circuit
operation is degraded significantly due to these supply parasitics.
Fig 3.3 Block diagram of line parasitic simulation with laser driver
for determination of the value of the decoupling capacitors
20
Figure 3.4 Transient simulations with line parasitics and no decoupling capacitors.
The effectiveness of decoupling capacitors can be proved by the simple equations.
I C
dV
dV
I


dt
dt C
(3.1)
As shown in the above equation, the decoupling capacitor between power supply rails can
reduce the voltage fluctuation. However, in the real situation, the value of capacitors
should be carefully chosen because the real capacitors also have their own parastic
inductance and resistance.
21
In this research, an on-chip metal-insulator-metal (MiM) capacitor which is based
on the equivalent model provided by MOSIS foundry, which is depicted in figure 3.5,
was used as the decoupling capacitor. The Figure 3.5 (b) shows that this MiM capacitor
can be used at 10 Gbps. Figure 3.6 shows the transient response of laser driver at 10 Gbps
with MiM capacitors and the line parasitic.
(a)
(b)
Figure 3.5 (a) MiM capacitor equivalent circuit. (b) the MiM capacitor simulated s-parameters, S21
(top) shows broad coupling.
By using 90 parallel MiM capacitors for a total capacitance is around 85.59nF, the eye
diagram of the laser driver shows that the circuit is working properly at given speed and
meets the desired specification.
22
Figure 3.6 Transient simulation of laser driver with MiM capacitors and line parasitics
Temperature effects should also be considered to make sure that circuit works
well at high temperature. This is necessary since the integrated circuits slow as
temperature increases due to the mobility variation. Figure 3.7 shows the transient
response of the laser driver with temperatures of 27oC, 100oC and 200oC. The output
become little bit slower as temperature increases but still works within design
specifications, as indicated by the open eyes diagram at 200oC.
23
Figure 3.7 The eye diagram of laser driver at 10 Gbps with the variation of temperature.
The yellow line is at 27oC, the red line is at 100oC, and the cyan line is at 200oC
Figure 3.8 shows the electrical equivalent circuit model [29] of a laser diode
including package parastics for this simulation.
Figure 3.8 The laser diode equivalent circuit and parameter fitting for bias information
However, this model does not include the dc voltage drop between anode and
cathode and wire bonding, thus, the model is modified by adding a diode (D1) with
optimized diode parameters and bonding wires to match into the dc characteristics of
24
original model in simulation. The right side of the figure 3.8 shows the results of
optimization of the diode parameters. By using this model, optical output of the laser is
considered as an electrical output, which can be displayed by SPICE. For the equivalent
model of the thin-film laser diode, which will be made by the integrated optoelectronics
group at Georgia Institute of Technology, the inductance of bonding wire and small
signal resistance will be varied. However, this change does not critically effect the
circuit’s operation. Figure 3.9 shows the simulation results with the thin-film laser diode
model. This simulation assumes that the inductance of bonding wire is 0.1nH and the
small signal resistance is calculated by the initial L-I thin film data.
Figure 3.9. Transient response of thin-film laser.
3.3 Layout
As the operating speed increases, the effects of layout parasitics should be
considered as mentioned in the section 3.2. Thus, layout is one of critical stages when
implementing high-speed circuitry. The laser driver was laid out carefully to minimize
25
unwanted behaviors such as common mode noise and crosstalk as shown in the figure
3.10. The transistor size for high speed operation has been optimized and a multiple
finger structure has been used to reduce the input capacitances which are the dominant
factor of switching delay.
Matching the performance of two input transistors is very important to overall
laser driver operation. Thus, the input transistor M1 and M2 have identical shape with
respect to signal path. Though the surroundings seen by M1 and M2 are different due to
the presence of current mirrors, matching performance can normally be improved by
making the intermediate surroundings identical. This general rule has been applied
repeatedly to all components.
A screen capture of the chip image is shown in figure 3.11. The laser driver is
located in the middle of the chip and the receiver circuitry is located in the left half of the
chip. The right side of figure 3.11 shows the test structures for characterization of
transistors.
The metal lines and vias have the current density rule in the process. Therefore,
the width of metal lines and the number of vias should be carefully optimized, for
example, the width of power supply rail should be over 20um for the current driving
capacity of 20mA. As the line width increase, the parastic capacitance and resistance also
increase, which can degrade the performance or generate unwanted noise.
To minimize the degradation of input and output signal due to the packaging
effects at 10 Gbps or higher speed, Cascade 100um pitch to pitch ground-signal-groundsignal-ground (GSGSG) probes are used at the input and output. These probes are
supposed to operate up to 40 GHz. Electrostatic discharge (ESD) protection circuits are
26
connected to all pads. A block diagram of the ESD protection circuit is illustrated in
figure 3.12. The current flow is always in the diode’s forward direction and positive ESD
pulses are clamped to the ESD_VDD, and negative ESD pulses are clamped to ESD_VSS.
27
G
S
G
S
G
G
S
G
S
G
MiM decoupling
capacitors
ESD Protection
Circuit
Laser driver
Figure 3.10 Layout of the laser driver with MiM capacitors, showing ESD protection circuit and
exploded view of laser driver circuitry.
28
Structure for
characterization of
the transistor
Laser drivers
Transimpedance
amplifier
Figure 3.11 The layout out of whole chip which includes laser driver, transimpedance amplifier. The
empty space in the middle of chip is the laser and detector integration site.
Figure 3.12 The block diagram for ESD protection scheme
29
3.4 Test Setup
The chip is fabricated by using TSMC 0.18 um mixed signal/RF process (CM018)
using non-epitaxial wafers. This CMOS process has silicide block, thick gate oxide (3.3
V), NT_N, deep n_well, Thick Top Metal (inductor), and MiM options [30].
Figure 3.13 illustrates the test set up block diagram for the testing of the laser
driver. It consists of an HP 71512B Bit Error Rate Tester (BERT), which generates
different modes of pseudo random bit streams (PRBS) and measures the probability of a
transmitted data error rate through the device under test; Keithley 236 and 238 Source
Measurement Units (SMU) to provide a precise modulation and laser dc bias currents; a
New Focus 1014 Photodetector for measuring the optical signal output from laser diode;
and a Tektronix CSA 8000A oscilloscope to monitor the output of laser driver and
measure the eye diagram.
Figure 3.13 Block diagram of Test setup
30
Figure 3.14 is a picture of the FR4 printed circuit board used for measurement.
This test board is only used for provide the power supplies, dc bias, modulation current
and ESD power supplies. The input and output will be performed by probing with
GSGSG probe. The box on the back side of test board indicates the external decoupling
chip capacitor site in case internal on-chip capacitors are not enough to suppress the
supply noise.
Figure 3.14 Picture of test board
31
IV. The Proposed research
With the results of preliminary simulations in section III, the proposed research will
realize 10 Gbps laser driver in the 0.18um process. Before optical performance is tested,
the electrical performance of laser driver will be tested when the chip fabrication is
completed by the foundry service. The transient measurement with eye diagrams and
BER measurements will be done by using various PRBS inputs. These results will
provide optimal operating points and conditions for driving laser diodes and compared
with simulation results.
The next step of this research is to build the transmitter with optical sources.
However, there are several obstacles in implementing the transmitter with laser diode
including, compatibility with the variation of laser characteristics, interconnection
between circuitry and laser diode, difficulty in collecting enough light power from the
laser diode and problems with getting high speed laser diodes. The research proposed
herein can provide an approach to realize the high speed CMOS transmitter by using thinfilm laser diode integration onto CMOS circuitry.
To the best of author’s knowledge there are no CMOS laser driver circuits with
thin-film laser reported. The specifications of recently published laser drivers are
summarized at table II. There are two papers reporting 10 Gbps 0.18um technology
CMOS driver circuits. One of them is a modulator driver which means this is not suitable
for direct modulation of laser diode [21]. The other paper has only reported electrical
performance of the driver not actual laser data [32]. More detail comparison of proposed
research and other laser drivers are summarized in table III.
32
The thin-film laser diode integration process and fabrication will be performed by
the integrated optoelectronics group at the Georgia Institute of Technology. The thin-film
laser diodes will be independently optimized for high speed operation and fabricated. By
using the currently available transferring technique and bonding processes for the thin
film laser, this thin film laser will be transferred and bonded onto a fabricated CMOS
chip. Before the integration onto CMOS circuitry, the optical and electrical performance
of thin-film laser will be measured. This will provide the information and requirement for
compatibility with CMOS laser circuit. After the integration onto CMOS circuit, the
optical performance of the proposed CMOS laser driver will be provided.
Year
Speed
Mod.
Current
Bias
Current
[33] Haralabidis,
2000
2.5 Gbps
0~40mA
0~40mA
2Vpp
0.8 um CMOS
[34] Chen. X.
2001
2.5 Gbps
40mA
N/A
PECL
0.35 um CMOS
[35] Annen R.
2002
500Mbps
2.1mApp
N/A
tr,tf=82ps
[36] Chan C.T.
2001
2.5 Gbps
20mApp
N/A
TSMC 018
[20] Chen G.C.
2002
2.5 Gbps
20mApp
5~10mA
PECL
0.35um CMOS
[37] Lin C.H.
2002
2.5 Gbps
5~20mApp
4~10mA
PECL
TSMC 0.35
[32] Petersen A. K
2002
10 Gbps
30mApp
40mA
[21] Cao. J
2002
10 Gbps
8mApp
N/A
Authors
Input
Etc.
500mVpp
0.18 um CMOS
LVDS
0.18 um CMOS
Table II. The Comparison of CMOS laser driver specification
Petersen’s
work [32]
This
proposed
research
Operation
data rate
Optical
performance
BER
Measurement
Power
consumption
Technology
10 Gbps
None
None
492.9mW
Intel CMOS 0.18u
Expect
10 Gbps
Will be done
Will be done
Expect
62.5mW
TSMC CMOS 0.18u
Table III. The comparison of proposed laser driver and Peterson’s laser driver
33
V. Work Remaining to be Done
The electrical performance of the designed CMOS laser driver will be tested when
the fabricated chip is back from foundry service. The chip will be mounted onto the test
board, which was designed and simulated in ADS to verify its high-speed operation. All
pads will be wire-bonded except the input and output pads, which will be probed with a
100um pitch-to-pitch GSGSG probe. Then, the electrical measurement, including dc
characterization and high-speed characterization, will be done.
With the successful electrical measurements of the CMOS laser driver including
eye diagram and BER measurement, the next step is to integrate a thin film laser onto
CMOS laser driver circuit. The goal of the chip integration is to have the transmitter
operating at 10 Gbps. Once the integration is completed, the device will go through a
series of tests again. The first test will be the DC characterization test, which includes the
L-I measurements for laser. The thin film laser will be probed on standard probe station
with the light being coupled into multimode fiber. By this DC characterization results, the
required current level, modulation and bias, will be figured out. Following the DC
characterization will be the speed measurements, which will include BER testing with the
eye diagrams for the device. After the initial optical performance of transmitter was
measured, the optimization of thin-film laser such as cavity length and area of active
region will be done. A timetable for the remaining work is shown in Table IV.
34
Work remaining
Thin film laser
developing
Electrical DC
testing
Electrical Speed
testing
Feb.15 –
Mar. 15
Feb.15 –
Feb. 29
Mar.15 –
Mar.30
Apr.1 – Apr.
30
May.1 –
May. 30





Circuit integration

Optical DC testing

Optical Speed
testing
Device size
optimization




Table IV. Timetable for remaining works
VI. Facilities needed
4.1 Simulation Tools
 Workstation
 MATLAB
 Cadence toolset
 HP Advanced Design systems
 Avant! Star-HSPICE
4.2 Measurement Tools
 CSA 8000A communication analyze system (~50GHz)
 HP Bit Error Performance Tester (71512B): 1~12GHz
 Lightwave Component Analyzer (HP 8703A) : 0.13~20GHz
 Probe Station
 Impedance Standard Substrate
35
 GSGSG and lightwave probe (Cascade ACP40-D-GSGSG-100)
 Tektronix 236 and 238 Source Measurement Unit
 Bias Tee (Picosecond BT5501A) and DC block (Picosecond DCB5501)
 high precision automatic translation stages
36
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